src/flash/nand.h

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on linux/include/linux/mtd/nand.h                     *
   6  *   Copyright (C) 2000 David Woodhouse <dwmw2@mvhi.com>                   *
   7  *   Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com>         *
   8  *   Copyright (C) 2000 Thomas Gleixner <tglx@linutronix.de>               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifndef NAND_H
  26 #define NAND_H
  27
  28 #include "flash.h"
  29
  30 struct nand_device;
  31
  32 #define __NAND_DEVICE_COMMAND(name) \
  33                 COMMAND_HELPER(name, struct nand_device *nand)
  34
  35 /**
  36  * Interface for NAND flash controllers.  Not all of these functions are
  37  * required for full functionality of the NAND driver, but better performance
  38  * can be achieved by implementing each function.
  39  */
  40 struct nand_flash_controller
  41 {
  42         /** Driver name that is used to select it from configuration files. */
  43         char *name;
  44
  45     const struct command_registration *commands;
  46
  47         /** NAND device command called when driver is instantiated during configuration. */
  48         __NAND_DEVICE_COMMAND((*nand_device_command));
  49
  50         /** Register controller specific commands as a TCL interface to the driver. */
  51         int (*register_commands)(struct command_context *cmd_ctx);
  52
  53         /** Initialize the NAND device. */
  54         int (*init)(struct nand_device *nand);
  55
  56         /** Reset the NAND device. */
  57         int (*reset)(struct nand_device *nand);
  58
  59         /** Issue a command to the NAND device. */
  60         int (*command)(struct nand_device *nand, uint8_t command);
  61
  62         /** Write an address to the NAND device. */
  63         int (*address)(struct nand_device *nand, uint8_t address);
  64
  65         /** Write word of data to the NAND device. */
  66         int (*write_data)(struct nand_device *nand, uint16_t data);
  67
  68         /** Read word of data from the NAND device. */
  69         int (*read_data)(struct nand_device *nand, void *data);
  70
  71         /** Write a block of data to the NAND device. */
  72         int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size);
  73
  74         /** Read a block of data from the NAND device. */
  75         int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size);
  76
  77         /** Write a page to the NAND device. */
  78         int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  79
  80         /** Read a page from the NAND device. */
  81         int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
  82
  83         /** Check if the controller is ready for more instructions with timeout. */
  84         int (*controller_ready)(struct nand_device *nand, int timeout);
  85
  86         /** Check if the NAND device is ready for more instructions with timeout. */
  87         int (*nand_ready)(struct nand_device *nand, int timeout);
  88 };
  89
  90 #define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name)
  91
  92 /**
  93  * Representation of a single NAND block in a NAND device.
  94  */
  95 struct nand_block
  96 {
  97         /** Offset to the block. */
  98         uint32_t offset;
  99
 100         /** Size of the block. */
 101         uint32_t size;
 102
 103         /** True if the block has been erased. */
 104         int is_erased;
 105
 106         /** True if the block is bad. */
 107         int is_bad;
 108 };
 109
 110 struct nand_oobfree {
 111         int offset;
 112         int length;
 113 };
 114
 115 struct nand_ecclayout {
 116         int eccbytes;
 117         int eccpos[64];
 118         int oobavail;
 119         struct nand_oobfree oobfree[2];
 120 };
 121
 122 struct nand_device
 123 {
 124         char *name;
 125         struct nand_flash_controller *controller;
 126         void *controller_priv;
 127         struct nand_manufacturer *manufacturer;
 128         struct nand_info *device;
 129         int bus_width;
 130         int address_cycles;
 131         int page_size;
 132         int erase_size;
 133         int use_raw;
 134         int num_blocks;
 135         struct nand_block *blocks;
 136         struct nand_device *next;
 137 };
 138
 139 /* NAND Flash Manufacturer ID Codes
 140  */
 141 enum
 142 {
 143         NAND_MFR_TOSHIBA = 0x98,
 144         NAND_MFR_SAMSUNG = 0xec,
 145         NAND_MFR_FUJITSU = 0x04,
 146         NAND_MFR_NATIONAL = 0x8f,
 147         NAND_MFR_RENESAS = 0x07,
 148         NAND_MFR_STMICRO = 0x20,
 149         NAND_MFR_HYNIX = 0xad,
 150         NAND_MFR_MICRON = 0x2c,
 151 };
 152
 153 struct nand_manufacturer
 154 {
 155         int id;
 156         char *name;
 157 };
 158
 159 struct nand_info
 160 {
 161         char *name;
 162         int id;
 163         int page_size;
 164         int chip_size;
 165         int erase_size;
 166         int options;
 167 };
 168
 169 /* Option constants for bizarre disfunctionality and real features
 170  */
 171 enum {
 172         /* Chip can not auto increment pages */
 173         NAND_NO_AUTOINCR = 0x00000001,
 174
 175         /* Buswitdh is 16 bit */
 176         NAND_BUSWIDTH_16 = 0x00000002,
 177
 178         /* Device supports partial programming without padding */
 179         NAND_NO_PADDING = 0x00000004,
 180
 181         /* Chip has cache program function */
 182         NAND_CACHEPRG = 0x00000008,
 183
 184         /* Chip has copy back function */
 185         NAND_COPYBACK = 0x00000010,
 186
 187         /* AND Chip which has 4 banks and a confusing page / block
 188          * assignment. See Renesas datasheet for further information */
 189         NAND_IS_AND = 0x00000020,
 190
 191         /* Chip has a array of 4 pages which can be read without
 192          * additional ready /busy waits */
 193         NAND_4PAGE_ARRAY = 0x00000040,
 194
 195         /* Chip requires that BBT is periodically rewritten to prevent
 196          * bits from adjacent blocks from 'leaking' in altering data.
 197          * This happens with the Renesas AG-AND chips, possibly others.  */
 198         BBT_AUTO_REFRESH = 0x00000080,
 199
 200         /* Chip does not require ready check on read. True
 201          * for all large page devices, as they do not support
 202          * autoincrement.*/
 203         NAND_NO_READRDY = 0x00000100,
 204
 205         /* Options valid for Samsung large page devices */
 206         NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK),
 207
 208         /* Options for new chips with large page size. The pagesize and the
 209          * erasesize is determined from the extended id bytes
 210          */
 211         LP_OPTIONS = (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR),
 212         LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
 213 };
 214
 215 enum
 216 {
 217         /* Standard NAND flash commands */
 218         NAND_CMD_READ0 = 0x0,
 219         NAND_CMD_READ1 = 0x1,
 220         NAND_CMD_RNDOUT = 0x5,
 221         NAND_CMD_PAGEPROG = 0x10,
 222         NAND_CMD_READOOB = 0x50,
 223         NAND_CMD_ERASE1 = 0x60,
 224         NAND_CMD_STATUS = 0x70,
 225         NAND_CMD_STATUS_MULTI = 0x71,
 226         NAND_CMD_SEQIN = 0x80,
 227         NAND_CMD_RNDIN = 0x85,
 228         NAND_CMD_READID = 0x90,
 229         NAND_CMD_ERASE2 = 0xd0,
 230         NAND_CMD_RESET = 0xff,
 231
 232         /* Extended commands for large page devices */
 233         NAND_CMD_READSTART = 0x30,
 234         NAND_CMD_RNDOUTSTART = 0xE0,
 235         NAND_CMD_CACHEDPROG = 0x15,
 236 };
 237
 238 /* Status bits */
 239 enum
 240 {
 241         NAND_STATUS_FAIL = 0x01,
 242         NAND_STATUS_FAIL_N1 = 0x02,
 243         NAND_STATUS_TRUE_READY = 0x20,
 244         NAND_STATUS_READY = 0x40,
 245         NAND_STATUS_WP = 0x80,
 246 };
 247
 248 /* OOB (spare) data formats */
 249 enum oob_formats
 250 {
 251         NAND_OOB_NONE = 0x0,    /* no OOB data at all */
 252         NAND_OOB_RAW = 0x1,             /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
 253         NAND_OOB_ONLY = 0x2,    /* only OOB data */
 254         NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
 255         NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
 256         NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
 257         NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
 258         NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
 259 };
 260
 261
 262 /**
 263  * Returns the flash bank specified by @a name, which matches the
 264  * driver name and a suffix (option) specify the driver-specific
 265  * bank number. The suffix consists of the '.' and the driver-specific
 266  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 267  * to the second (e.g. DM355EVM).
 268  */
 269 struct nand_device *get_nand_device_by_name(const char *name);
 270
 271 struct nand_device *get_nand_device_by_num(int num);
 272
 273 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 274                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 275 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 276                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 277
 278 int nand_read_status(struct nand_device *nand, uint8_t *status);
 279
 280 int nand_calculate_ecc(struct nand_device *nand,
 281                 const uint8_t *dat, uint8_t *ecc_code);
 282 int nand_calculate_ecc_kw(struct nand_device *nand,
 283                 const uint8_t *dat, uint8_t *ecc_code);
 284
 285 int nand_register_commands(struct command_context *cmd_ctx);
 286 int nand_init(struct command_context *cmd_ctx);
 287
 288 /// helper for parsing a nand device command argument string
 289 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 290                 struct nand_device **nand);
 291
 292
 293 #define         ERROR_NAND_DEVICE_INVALID               (-1100)
 294 #define         ERROR_NAND_OPERATION_FAILED             (-1101)
 295 #define         ERROR_NAND_OPERATION_TIMEOUT    (-1102)
 296 #define         ERROR_NAND_OPERATION_NOT_SUPPORTED      (-1103)
 297 #define         ERROR_NAND_DEVICE_NOT_PROBED    (-1104)
 298 #define         ERROR_NAND_ERROR_CORRECTION_FAILED      (-1105)
 299 #define         ERROR_NAND_NO_BUFFER                    (-1106)
 300
 301 #endif /* NAND_H */