1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "time_support.h"
32 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
35 static int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 /* NAND flash controller
39 extern struct nand_flash_controller davinci_nand_controller
;
40 extern struct nand_flash_controller lpc3180_nand_controller
;
41 extern struct nand_flash_controller orion_nand_controller
;
42 extern struct nand_flash_controller s3c2410_nand_controller
;
43 extern struct nand_flash_controller s3c2412_nand_controller
;
44 extern struct nand_flash_controller s3c2440_nand_controller
;
45 extern struct nand_flash_controller s3c2443_nand_controller
;
46 extern struct nand_flash_controller imx31_nand_flash_controller
;
48 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
50 static struct nand_flash_controller
*nand_flash_controllers
[] =
52 &davinci_nand_controller
,
53 &lpc3180_nand_controller
,
54 &orion_nand_controller
,
55 &s3c2410_nand_controller
,
56 &s3c2412_nand_controller
,
57 &s3c2440_nand_controller
,
58 &s3c2443_nand_controller
,
59 &imx31_nand_flash_controller
,
60 /* &boundary_scan_nand_controller, */
64 /* configured NAND devices and NAND Flash command handler */
65 static struct nand_device
*nand_devices
= NULL
;
69 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
72 * Pagesize; 0, 256, 512
73 * 0 get this information from the extended chip ID
74 * 256 256 Byte page size
75 * 512 512 Byte page size
77 static struct nand_info nand_flash_ids
[] =
79 /* start "museum" IDs */
80 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
81 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
82 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
83 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
84 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
85 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
86 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
87 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
88 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
89 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
91 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
92 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
93 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
94 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
95 /* end "museum" IDs */
97 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
98 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
99 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
100 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
102 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
103 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
104 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
105 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
107 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
108 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
109 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
110 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
113 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
114 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
115 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
116 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
118 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
120 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
122 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
123 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
124 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
125 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
127 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
128 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
129 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
130 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
132 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
133 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
134 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
135 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
137 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
138 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
139 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
140 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
142 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
143 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
144 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
145 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
147 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
148 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
149 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
150 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
152 {NULL
, 0, 0, 0, 0, 0 }
155 /* Manufacturer ID list
157 static struct nand_manufacturer nand_manuf_ids
[] =
160 {NAND_MFR_TOSHIBA
, "Toshiba"},
161 {NAND_MFR_SAMSUNG
, "Samsung"},
162 {NAND_MFR_FUJITSU
, "Fujitsu"},
163 {NAND_MFR_NATIONAL
, "National"},
164 {NAND_MFR_RENESAS
, "Renesas"},
165 {NAND_MFR_STMICRO
, "ST Micro"},
166 {NAND_MFR_HYNIX
, "Hynix"},
167 {NAND_MFR_MICRON
, "Micron"},
172 * Define default oob placement schemes for large and small page devices
176 static struct nand_ecclayout nand_oob_8
= {
187 static struct nand_ecclayout nand_oob_16
= {
189 .eccpos
= {0, 1, 2, 3, 6, 7},
195 static struct nand_ecclayout nand_oob_64
= {
198 40, 41, 42, 43, 44, 45, 46, 47,
199 48, 49, 50, 51, 52, 53, 54, 55,
200 56, 57, 58, 59, 60, 61, 62, 63},
206 COMMAND_HANDLER(handle_nand_list_drivers
)
208 command_print(CMD_CTX
, "Available NAND flash controller drivers:");
209 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
210 command_print(CMD_CTX
, " %s", nand_flash_controllers
[i
]->name
);
214 static COMMAND_HELPER(create_nand_device
, const char *bank_name
,
215 struct nand_flash_controller
*controller
)
217 if (NULL
!= controller
->commands
)
219 int retval
= register_commands(CMD_CTX
, NULL
,
220 controller
->commands
);
221 if (ERROR_OK
!= retval
)
224 struct nand_device
*c
= malloc(sizeof(struct nand_device
));
226 c
->name
= strdup(bank_name
);
227 c
->controller
= controller
;
228 c
->controller_priv
= NULL
;
229 c
->manufacturer
= NULL
;
232 c
->address_cycles
= 0;
237 int retval
= CALL_COMMAND_HANDLER(controller
->nand_device_command
, c
);
238 if (ERROR_OK
!= retval
)
240 LOG_ERROR("'%s' driver rejected nand flash", controller
->name
);
246 struct nand_device
*p
= nand_devices
;
247 while (p
&& p
->next
) p
= p
->next
;
255 COMMAND_HANDLER(handle_nand_device_command
)
259 LOG_ERROR("incomplete nand device configuration");
260 return ERROR_FLASH_BANK_INVALID
;
263 // save name and increment (for compatibility) with drivers
264 const char *bank_name
= *CMD_ARGV
++;
267 const char *driver_name
= CMD_ARGV
[0];
268 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
270 struct nand_flash_controller
*controller
= nand_flash_controllers
[i
];
271 if (strcmp(driver_name
, controller
->name
) != 0)
274 return CALL_COMMAND_HANDLER(create_nand_device
,
275 bank_name
, controller
);
278 LOG_ERROR("No valid NAND flash driver found (%s)", driver_name
);
279 return CALL_COMMAND_HANDLER(handle_nand_list_drivers
);
282 static const struct command_registration nand_config_command_handlers
[] = {
285 .handler
= &handle_nand_device_command
,
286 .mode
= COMMAND_CONFIG
,
287 .help
= "defines a new NAND bank",
291 .handler
= &handle_nand_list_drivers
,
293 .help
= "lists available NAND drivers",
295 COMMAND_REGISTRATION_DONE
297 static const struct command_registration nand_command_handlers
[] = {
301 .help
= "NAND flash command group",
302 .chain
= nand_config_command_handlers
,
304 COMMAND_REGISTRATION_DONE
307 int nand_register_commands(struct command_context
*cmd_ctx
)
309 return register_commands(cmd_ctx
, NULL
, nand_command_handlers
);
312 struct nand_device
*get_nand_device_by_name(const char *name
)
314 unsigned requested
= get_flash_name_index(name
);
317 struct nand_device
*nand
;
318 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
320 if (strcmp(nand
->name
, name
) == 0)
322 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
324 if (++found
< requested
)
331 struct nand_device
*get_nand_device_by_num(int num
)
333 struct nand_device
*p
;
336 for (p
= nand_devices
; p
; p
= p
->next
)
347 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
348 struct nand_device
**nand
)
350 const char *str
= CMD_ARGV
[name_index
];
351 *nand
= get_nand_device_by_name(str
);
356 COMMAND_PARSE_NUMBER(uint
, str
, num
);
357 *nand
= get_nand_device_by_num(num
);
359 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
360 return ERROR_INVALID_ARGUMENTS
;
365 static int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
371 if ((first
< 0) || (first
>= nand
->num_blocks
))
374 if ((last
>= nand
->num_blocks
) || (last
== -1))
375 last
= nand
->num_blocks
- 1;
377 for (i
= first
; i
< last
; i
++)
379 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
381 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
382 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
383 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
385 LOG_WARNING("bad block: %i", i
);
386 nand
->blocks
[i
].is_bad
= 1;
390 nand
->blocks
[i
].is_bad
= 0;
393 page
+= (nand
->erase_size
/ nand
->page_size
);
399 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
402 return ERROR_NAND_DEVICE_NOT_PROBED
;
404 /* Send read status command */
405 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
410 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
413 nand
->controller
->read_data(nand
, &data
);
414 *status
= data
& 0xff;
418 nand
->controller
->read_data(nand
, status
);
424 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
428 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
430 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
432 nand
->controller
->read_data(nand
, &data
);
433 status
= data
& 0xff;
435 nand
->controller
->read_data(nand
, &status
);
437 if (status
& NAND_STATUS_READY
)
442 return (status
& NAND_STATUS_READY
) != 0;
445 int nand_probe(struct nand_device
*nand
)
447 uint8_t manufacturer_id
, device_id
;
452 /* clear device data */
454 nand
->manufacturer
= NULL
;
456 /* clear device parameters */
458 nand
->address_cycles
= 0;
460 nand
->erase_size
= 0;
462 /* initialize controller (device parameters are zero, use controller default) */
463 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
467 case ERROR_NAND_OPERATION_FAILED
:
468 LOG_DEBUG("controller initialization failed");
469 return ERROR_NAND_OPERATION_FAILED
;
470 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
471 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
472 return ERROR_NAND_OPERATION_FAILED
;
474 LOG_ERROR("BUG: unknown controller initialization failure");
475 return ERROR_NAND_OPERATION_FAILED
;
479 nand
->controller
->command(nand
, NAND_CMD_RESET
);
480 nand
->controller
->reset(nand
);
482 nand
->controller
->command(nand
, NAND_CMD_READID
);
483 nand
->controller
->address(nand
, 0x0);
485 if (nand
->bus_width
== 8)
487 nand
->controller
->read_data(nand
, &manufacturer_id
);
488 nand
->controller
->read_data(nand
, &device_id
);
493 nand
->controller
->read_data(nand
, &data_buf
);
494 manufacturer_id
= data_buf
& 0xff;
495 nand
->controller
->read_data(nand
, &data_buf
);
496 device_id
= data_buf
& 0xff;
499 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
501 if (nand_flash_ids
[i
].id
== device_id
)
503 nand
->device
= &nand_flash_ids
[i
];
508 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
510 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
512 nand
->manufacturer
= &nand_manuf_ids
[i
];
517 if (!nand
->manufacturer
)
519 nand
->manufacturer
= &nand_manuf_ids
[0];
520 nand
->manufacturer
->id
= manufacturer_id
;
525 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
526 manufacturer_id
, device_id
);
527 return ERROR_NAND_OPERATION_FAILED
;
530 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
532 /* initialize device parameters */
535 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
536 nand
->bus_width
= 16;
540 /* Do we need extended device probe information? */
541 if (nand
->device
->page_size
== 0 ||
542 nand
->device
->erase_size
== 0)
544 if (nand
->bus_width
== 8)
546 nand
->controller
->read_data(nand
, id_buff
+ 3);
547 nand
->controller
->read_data(nand
, id_buff
+ 4);
548 nand
->controller
->read_data(nand
, id_buff
+ 5);
554 nand
->controller
->read_data(nand
, &data_buf
);
555 id_buff
[3] = data_buf
;
557 nand
->controller
->read_data(nand
, &data_buf
);
558 id_buff
[4] = data_buf
;
560 nand
->controller
->read_data(nand
, &data_buf
);
561 id_buff
[5] = data_buf
>> 8;
566 if (nand
->device
->page_size
== 0)
568 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
570 else if (nand
->device
->page_size
== 256)
572 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
573 return ERROR_NAND_OPERATION_FAILED
;
577 nand
->page_size
= nand
->device
->page_size
;
580 /* number of address cycles */
581 if (nand
->page_size
<= 512)
583 /* small page devices */
584 if (nand
->device
->chip_size
<= 32)
585 nand
->address_cycles
= 3;
586 else if (nand
->device
->chip_size
<= 8*1024)
587 nand
->address_cycles
= 4;
590 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
591 nand
->address_cycles
= 5;
596 /* large page devices */
597 if (nand
->device
->chip_size
<= 128)
598 nand
->address_cycles
= 4;
599 else if (nand
->device
->chip_size
<= 32*1024)
600 nand
->address_cycles
= 5;
603 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
604 nand
->address_cycles
= 6;
609 if (nand
->device
->erase_size
== 0)
611 switch ((id_buff
[4] >> 4) & 3) {
613 nand
->erase_size
= 64 << 10;
616 nand
->erase_size
= 128 << 10;
619 nand
->erase_size
= 256 << 10;
622 nand
->erase_size
=512 << 10;
628 nand
->erase_size
= nand
->device
->erase_size
;
631 /* initialize controller, but leave parameters at the controllers default */
632 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
636 case ERROR_NAND_OPERATION_FAILED
:
637 LOG_DEBUG("controller initialization failed");
638 return ERROR_NAND_OPERATION_FAILED
;
639 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
640 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
641 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
642 return ERROR_NAND_OPERATION_FAILED
;
644 LOG_ERROR("BUG: unknown controller initialization failure");
645 return ERROR_NAND_OPERATION_FAILED
;
649 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
650 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
652 for (i
= 0; i
< nand
->num_blocks
; i
++)
654 nand
->blocks
[i
].size
= nand
->erase_size
;
655 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
656 nand
->blocks
[i
].is_erased
= -1;
657 nand
->blocks
[i
].is_bad
= -1;
663 static int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
671 return ERROR_NAND_DEVICE_NOT_PROBED
;
673 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
674 return ERROR_INVALID_ARGUMENTS
;
676 /* make sure we know if a block is bad before erasing it */
677 for (i
= first_block
; i
<= last_block
; i
++)
679 if (nand
->blocks
[i
].is_bad
== -1)
681 nand_build_bbt(nand
, i
, last_block
);
686 for (i
= first_block
; i
<= last_block
; i
++)
688 /* Send erase setup command */
689 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
691 page
= i
* (nand
->erase_size
/ nand
->page_size
);
693 /* Send page address */
694 if (nand
->page_size
<= 512)
697 nand
->controller
->address(nand
, page
& 0xff);
698 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
700 /* 3rd cycle only on devices with more than 32 MiB */
701 if (nand
->address_cycles
>= 4)
702 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
704 /* 4th cycle only on devices with more than 8 GiB */
705 if (nand
->address_cycles
>= 5)
706 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
711 nand
->controller
->address(nand
, page
& 0xff);
712 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
714 /* 3rd cycle only on devices with more than 128 MiB */
715 if (nand
->address_cycles
>= 5)
716 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
719 /* Send erase confirm command */
720 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
722 retval
= nand
->controller
->nand_ready
?
723 nand
->controller
->nand_ready(nand
, 1000) :
724 nand_poll_ready(nand
, 1000);
726 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
727 return ERROR_NAND_OPERATION_TIMEOUT
;
730 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
732 LOG_ERROR("couldn't read status");
733 return ERROR_NAND_OPERATION_FAILED
;
738 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
739 (nand
->blocks
[i
].is_bad
== 1)
742 /* continue; other blocks might still be erasable */
745 nand
->blocks
[i
].is_erased
= 1;
752 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
757 return ERROR_NAND_DEVICE_NOT_PROBED
;
759 if (address
% nand
->page_size
)
761 LOG_ERROR("reads need to be page aligned");
762 return ERROR_NAND_OPERATION_FAILED
;
765 page
= malloc(nand
->page_size
);
767 while (data_size
> 0)
769 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
770 uint32_t page_address
;
773 page_address
= address
/ nand
->page_size
;
775 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
777 memcpy(data
, page
, thisrun_size
);
779 address
+= thisrun_size
;
780 data
+= thisrun_size
;
781 data_size
-= thisrun_size
;
789 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
794 return ERROR_NAND_DEVICE_NOT_PROBED
;
796 if (address
% nand
->page_size
)
798 LOG_ERROR("writes need to be page aligned");
799 return ERROR_NAND_OPERATION_FAILED
;
802 page
= malloc(nand
->page_size
);
804 while (data_size
> 0)
806 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
807 uint32_t page_address
;
809 memset(page
, 0xff, nand
->page_size
);
810 memcpy(page
, data
, thisrun_size
);
812 page_address
= address
/ nand
->page_size
;
814 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
816 address
+= thisrun_size
;
817 data
+= thisrun_size
;
818 data_size
-= thisrun_size
;
827 int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
832 return ERROR_NAND_DEVICE_NOT_PROBED
;
834 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
835 if (nand
->blocks
[block
].is_erased
== 1)
836 nand
->blocks
[block
].is_erased
= 0;
838 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
839 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
841 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
844 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
847 return ERROR_NAND_DEVICE_NOT_PROBED
;
849 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
850 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
852 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
855 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
860 return ERROR_NAND_DEVICE_NOT_PROBED
;
862 if (nand
->page_size
<= 512)
864 /* small page device */
866 nand
->controller
->command(nand
, NAND_CMD_READ0
);
868 nand
->controller
->command(nand
, NAND_CMD_READOOB
);
870 /* column (always 0, we start at the beginning of a page/OOB area) */
871 nand
->controller
->address(nand
, 0x0);
874 nand
->controller
->address(nand
, page
& 0xff);
875 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
877 /* 4th cycle only on devices with more than 32 MiB */
878 if (nand
->address_cycles
>= 4)
879 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
881 /* 5th cycle only on devices with more than 8 GiB */
882 if (nand
->address_cycles
>= 5)
883 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
887 /* large page device */
888 nand
->controller
->command(nand
, NAND_CMD_READ0
);
890 /* column (0 when we start at the beginning of a page,
891 * or 2048 for the beginning of OOB area)
893 nand
->controller
->address(nand
, 0x0);
895 nand
->controller
->address(nand
, 0x0);
897 nand
->controller
->address(nand
, 0x8);
900 nand
->controller
->address(nand
, page
& 0xff);
901 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
903 /* 5th cycle only on devices with more than 128 MiB */
904 if (nand
->address_cycles
>= 5)
905 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
907 /* large page devices need a start command */
908 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
911 if (nand
->controller
->nand_ready
) {
912 if (!nand
->controller
->nand_ready(nand
, 100))
913 return ERROR_NAND_OPERATION_TIMEOUT
;
920 if (nand
->controller
->read_block_data
!= NULL
)
921 (nand
->controller
->read_block_data
)(nand
, data
, data_size
);
924 for (i
= 0; i
< data_size
;)
926 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
928 nand
->controller
->read_data(nand
, data
);
934 nand
->controller
->read_data(nand
, data
);
944 if (nand
->controller
->read_block_data
!= NULL
)
945 (nand
->controller
->read_block_data
)(nand
, oob
, oob_size
);
948 for (i
= 0; i
< oob_size
;)
950 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
952 nand
->controller
->read_data(nand
, oob
);
958 nand
->controller
->read_data(nand
, oob
);
969 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
976 return ERROR_NAND_DEVICE_NOT_PROBED
;
978 nand
->controller
->command(nand
, NAND_CMD_SEQIN
);
980 if (nand
->page_size
<= 512)
982 /* column (always 0, we start at the beginning of a page/OOB area) */
983 nand
->controller
->address(nand
, 0x0);
986 nand
->controller
->address(nand
, page
& 0xff);
987 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
989 /* 4th cycle only on devices with more than 32 MiB */
990 if (nand
->address_cycles
>= 4)
991 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
993 /* 5th cycle only on devices with more than 8 GiB */
994 if (nand
->address_cycles
>= 5)
995 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
999 /* column (0 when we start at the beginning of a page,
1000 * or 2048 for the beginning of OOB area)
1002 nand
->controller
->address(nand
, 0x0);
1004 nand
->controller
->address(nand
, 0x0);
1006 nand
->controller
->address(nand
, 0x8);
1009 nand
->controller
->address(nand
, page
& 0xff);
1010 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
1012 /* 5th cycle only on devices with more than 128 MiB */
1013 if (nand
->address_cycles
>= 5)
1014 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1019 if (nand
->controller
->write_block_data
!= NULL
)
1020 (nand
->controller
->write_block_data
)(nand
, data
, data_size
);
1023 for (i
= 0; i
< data_size
;)
1025 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1027 uint16_t data_buf
= le_to_h_u16(data
);
1028 nand
->controller
->write_data(nand
, data_buf
);
1034 nand
->controller
->write_data(nand
, *data
);
1044 if (nand
->controller
->write_block_data
!= NULL
)
1045 (nand
->controller
->write_block_data
)(nand
, oob
, oob_size
);
1048 for (i
= 0; i
< oob_size
;)
1050 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1052 uint16_t oob_buf
= le_to_h_u16(data
);
1053 nand
->controller
->write_data(nand
, oob_buf
);
1059 nand
->controller
->write_data(nand
, *oob
);
1067 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
1069 retval
= nand
->controller
->nand_ready
?
1070 nand
->controller
->nand_ready(nand
, 100) :
1071 nand_poll_ready(nand
, 100);
1073 return ERROR_NAND_OPERATION_TIMEOUT
;
1075 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
1077 LOG_ERROR("couldn't read status");
1078 return ERROR_NAND_OPERATION_FAILED
;
1081 if (status
& NAND_STATUS_FAIL
)
1083 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1084 return ERROR_NAND_OPERATION_FAILED
;
1090 COMMAND_HANDLER(handle_nand_list_command
)
1092 struct nand_device
*p
;
1097 command_print(CMD_CTX
, "no NAND flash devices configured");
1101 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1104 command_print(CMD_CTX
, "#%i: %s (%s) "
1105 "pagesize: %i, buswidth: %i,\n\t"
1106 "blocksize: %i, blocks: %i",
1107 i
, p
->device
->name
, p
->manufacturer
->name
,
1108 p
->page_size
, p
->bus_width
,
1109 p
->erase_size
, p
->num_blocks
);
1111 command_print(CMD_CTX
, "#%i: not probed", i
);
1117 COMMAND_HANDLER(handle_nand_info_command
)
1124 struct nand_device
*p
;
1125 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1126 if (ERROR_OK
!= retval
)
1131 return ERROR_COMMAND_SYNTAX_ERROR
;
1137 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], i
);
1142 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], first
);
1143 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], last
);
1147 if (NULL
== p
->device
)
1149 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1153 if (first
>= p
->num_blocks
)
1154 first
= p
->num_blocks
- 1;
1156 if (last
>= p
->num_blocks
)
1157 last
= p
->num_blocks
- 1;
1159 command_print(CMD_CTX
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1160 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1162 for (j
= first
; j
<= last
; j
++)
1164 char *erase_state
, *bad_state
;
1166 if (p
->blocks
[j
].is_erased
== 0)
1167 erase_state
= "not erased";
1168 else if (p
->blocks
[j
].is_erased
== 1)
1169 erase_state
= "erased";
1171 erase_state
= "erase state unknown";
1173 if (p
->blocks
[j
].is_bad
== 0)
1175 else if (p
->blocks
[j
].is_bad
== 1)
1176 bad_state
= " (marked bad)";
1178 bad_state
= " (block condition unknown)";
1180 command_print(CMD_CTX
,
1181 "\t#%i: 0x%8.8" PRIx32
" (%" PRId32
"kB) %s%s",
1183 p
->blocks
[j
].offset
,
1184 p
->blocks
[j
].size
/ 1024,
1192 COMMAND_HANDLER(handle_nand_probe_command
)
1196 return ERROR_COMMAND_SYNTAX_ERROR
;
1199 struct nand_device
*p
;
1200 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1201 if (ERROR_OK
!= retval
)
1204 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1206 command_print(CMD_CTX
, "NAND flash device '%s' found", p
->device
->name
);
1208 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1210 command_print(CMD_CTX
, "probing failed for NAND flash device");
1214 command_print(CMD_CTX
, "unknown error when probing NAND flash device");
1220 COMMAND_HANDLER(handle_nand_erase_command
)
1222 if (CMD_ARGC
!= 1 && CMD_ARGC
!= 3)
1224 return ERROR_COMMAND_SYNTAX_ERROR
;
1228 struct nand_device
*p
;
1229 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1230 if (ERROR_OK
!= retval
)
1233 unsigned long offset
;
1234 unsigned long length
;
1236 /* erase specified part of the chip; or else everything */
1237 if (CMD_ARGC
== 3) {
1238 unsigned long size
= p
->erase_size
* p
->num_blocks
;
1240 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1241 if ((offset
% p
->erase_size
) != 0 || offset
>= size
)
1242 return ERROR_INVALID_ARGUMENTS
;
1244 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1245 if ((length
== 0) || (length
% p
->erase_size
) != 0
1246 || (length
+ offset
) > size
)
1247 return ERROR_INVALID_ARGUMENTS
;
1249 offset
/= p
->erase_size
;
1250 length
/= p
->erase_size
;
1253 length
= p
->num_blocks
;
1256 retval
= nand_erase(p
, offset
, offset
+ length
- 1);
1257 if (retval
== ERROR_OK
)
1259 command_print(CMD_CTX
, "erased blocks %lu to %lu "
1260 "on NAND flash device #%s '%s'",
1261 offset
, offset
+ length
,
1262 CMD_ARGV
[0], p
->device
->name
);
1264 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1266 command_print(CMD_CTX
, "erase failed");
1270 command_print(CMD_CTX
, "unknown error when erasing NAND flash device");
1276 COMMAND_HANDLER(handle_nand_check_bad_blocks_command
)
1281 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 3) || (CMD_ARGC
== 2))
1283 return ERROR_COMMAND_SYNTAX_ERROR
;
1287 struct nand_device
*p
;
1288 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1289 if (ERROR_OK
!= retval
)
1294 unsigned long offset
;
1295 unsigned long length
;
1297 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1298 if (offset
% p
->erase_size
)
1299 return ERROR_INVALID_ARGUMENTS
;
1300 offset
/= p
->erase_size
;
1302 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1303 if (length
% p
->erase_size
)
1304 return ERROR_INVALID_ARGUMENTS
;
1307 length
/= p
->erase_size
;
1310 last
= offset
+ length
;
1313 retval
= nand_build_bbt(p
, first
, last
);
1314 if (retval
== ERROR_OK
)
1316 command_print(CMD_CTX
, "checked NAND flash device for bad blocks, "
1317 "use \"nand info\" command to list blocks");
1319 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1321 command_print(CMD_CTX
, "error when checking for bad blocks on "
1322 "NAND flash device");
1326 command_print(CMD_CTX
, "unknown error when checking for bad "
1327 "blocks on NAND flash device");
1333 struct nand_fileio_state
{
1340 enum oob_formats oob_format
;
1347 struct fileio fileio
;
1349 struct duration bench
;
1352 static void nand_fileio_init(struct nand_fileio_state
*state
)
1354 memset(state
, 0, sizeof(*state
));
1355 state
->oob_format
= NAND_OOB_NONE
;
1358 static int nand_fileio_start(struct command_context
*cmd_ctx
,
1359 struct nand_device
*nand
, const char *filename
, int filemode
,
1360 struct nand_fileio_state
*state
)
1362 if (state
->address
% nand
->page_size
)
1364 command_print(cmd_ctx
, "only page-aligned addresses are supported");
1365 return ERROR_COMMAND_SYNTAX_ERROR
;
1368 duration_start(&state
->bench
);
1370 if (NULL
!= filename
)
1372 int retval
= fileio_open(&state
->fileio
, filename
, filemode
, FILEIO_BINARY
);
1373 if (ERROR_OK
!= retval
)
1375 const char *msg
= (FILEIO_READ
== filemode
) ? "read" : "write";
1376 command_print(cmd_ctx
, "failed to open '%s' for %s access",
1380 state
->file_opened
= true;
1383 if (!(state
->oob_format
& NAND_OOB_ONLY
))
1385 state
->page_size
= nand
->page_size
;
1386 state
->page
= malloc(nand
->page_size
);
1389 if (state
->oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1391 if (nand
->page_size
== 512)
1393 state
->oob_size
= 16;
1394 state
->eccpos
= nand_oob_16
.eccpos
;
1396 else if (nand
->page_size
== 2048)
1398 state
->oob_size
= 64;
1399 state
->eccpos
= nand_oob_64
.eccpos
;
1401 state
->oob
= malloc(state
->oob_size
);
1406 static int nand_fileio_cleanup(struct nand_fileio_state
*state
)
1408 if (state
->file_opened
)
1409 fileio_close(&state
->fileio
);
1423 static int nand_fileio_finish(struct nand_fileio_state
*state
)
1425 nand_fileio_cleanup(state
);
1426 return duration_measure(&state
->bench
);
1429 static COMMAND_HELPER(nand_fileio_parse_args
, struct nand_fileio_state
*state
,
1430 struct nand_device
**dev
, enum fileio_access filemode
,
1431 bool need_size
, bool sw_ecc
)
1433 nand_fileio_init(state
);
1435 unsigned minargs
= need_size
? 4 : 3;
1436 if (CMD_ARGC
< minargs
)
1437 return ERROR_COMMAND_SYNTAX_ERROR
;
1439 struct nand_device
*nand
;
1440 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &nand
);
1441 if (ERROR_OK
!= retval
)
1444 if (NULL
== nand
->device
)
1446 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1450 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], state
->address
);
1453 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[3], state
->size
);
1454 if (state
->size
% nand
->page_size
)
1456 command_print(CMD_CTX
, "only page-aligned sizes are supported");
1457 return ERROR_COMMAND_SYNTAX_ERROR
;
1461 if (CMD_ARGC
> minargs
)
1463 for (unsigned i
= minargs
; i
< CMD_ARGC
; i
++)
1465 if (!strcmp(CMD_ARGV
[i
], "oob_raw"))
1466 state
->oob_format
|= NAND_OOB_RAW
;
1467 else if (!strcmp(CMD_ARGV
[i
], "oob_only"))
1468 state
->oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1469 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc"))
1470 state
->oob_format
|= NAND_OOB_SW_ECC
;
1471 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc_kw"))
1472 state
->oob_format
|= NAND_OOB_SW_ECC_KW
;
1475 command_print(CMD_CTX
, "unknown option: %s", CMD_ARGV
[i
]);
1476 return ERROR_COMMAND_SYNTAX_ERROR
;
1481 retval
= nand_fileio_start(CMD_CTX
, nand
, CMD_ARGV
[1], filemode
, state
);
1482 if (ERROR_OK
!= retval
)
1486 state
->size
= state
->fileio
.size
;
1494 * @returns If no error occurred, returns number of bytes consumed;
1495 * otherwise, returns a negative error code.)
1497 static int nand_fileio_read(struct nand_device
*nand
,
1498 struct nand_fileio_state
*s
)
1500 size_t total_read
= 0;
1503 if (NULL
!= s
->page
)
1505 fileio_read(&s
->fileio
, s
->page_size
, s
->page
, &one_read
);
1506 if (one_read
< s
->page_size
)
1507 memset(s
->page
+ one_read
, 0xff, s
->page_size
- one_read
);
1508 total_read
+= one_read
;
1511 if (s
->oob_format
& NAND_OOB_SW_ECC
)
1514 memset(s
->oob
, 0xff, s
->oob_size
);
1515 for (uint32_t i
= 0, j
= 0; i
< s
->page_size
; i
+= 256)
1517 nand_calculate_ecc(nand
, s
->page
+ i
, ecc
);
1518 s
->oob
[s
->eccpos
[j
++]] = ecc
[0];
1519 s
->oob
[s
->eccpos
[j
++]] = ecc
[1];
1520 s
->oob
[s
->eccpos
[j
++]] = ecc
[2];
1523 else if (s
->oob_format
& NAND_OOB_SW_ECC_KW
)
1526 * In this case eccpos is not used as
1527 * the ECC data is always stored contigously
1528 * at the end of the OOB area. It consists
1529 * of 10 bytes per 512-byte data block.
1531 uint8_t *ecc
= s
->oob
+ s
->oob_size
- s
->page_size
/ 512 * 10;
1532 memset(s
->oob
, 0xff, s
->oob_size
);
1533 for (uint32_t i
= 0; i
< s
->page_size
; i
+= 512)
1535 nand_calculate_ecc_kw(nand
, s
->page
+ i
, ecc
);
1539 else if (NULL
!= s
->oob
)
1541 fileio_read(&s
->fileio
, s
->oob_size
, s
->oob
, &one_read
);
1542 if (one_read
< s
->oob_size
)
1543 memset(s
->oob
+ one_read
, 0xff, s
->oob_size
- one_read
);
1544 total_read
+= one_read
;
1549 COMMAND_HANDLER(handle_nand_write_command
)
1551 struct nand_device
*nand
= NULL
;
1552 struct nand_fileio_state s
;
1553 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1554 &s
, &nand
, FILEIO_READ
, false, true);
1555 if (ERROR_OK
!= retval
)
1558 uint32_t total_bytes
= s
.size
;
1561 int bytes_read
= nand_fileio_read(nand
, &s
);
1562 if (bytes_read
<= 0)
1564 command_print(CMD_CTX
, "error while reading file");
1565 return nand_fileio_cleanup(&s
);
1567 s
.size
-= bytes_read
;
1569 retval
= nand_write_page(nand
, s
.address
/ nand
->page_size
,
1570 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1571 if (ERROR_OK
!= retval
)
1573 command_print(CMD_CTX
, "failed writing file %s "
1574 "to NAND flash %s at offset 0x%8.8" PRIx32
,
1575 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
);
1576 return nand_fileio_cleanup(&s
);
1578 s
.address
+= s
.page_size
;
1581 if (nand_fileio_finish(&s
))
1583 command_print(CMD_CTX
, "wrote file %s to NAND flash %s up to "
1584 "offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1585 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
, duration_elapsed(&s
.bench
),
1586 duration_kbps(&s
.bench
, total_bytes
));
1591 COMMAND_HANDLER(handle_nand_verify_command
)
1593 struct nand_device
*nand
= NULL
;
1594 struct nand_fileio_state file
;
1595 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1596 &file
, &nand
, FILEIO_READ
, false, true);
1597 if (ERROR_OK
!= retval
)
1600 struct nand_fileio_state dev
;
1601 nand_fileio_init(&dev
);
1602 dev
.address
= file
.address
;
1603 dev
.size
= file
.size
;
1604 dev
.oob_format
= file
.oob_format
;
1605 retval
= nand_fileio_start(CMD_CTX
, nand
, NULL
, FILEIO_NONE
, &dev
);
1606 if (ERROR_OK
!= retval
)
1609 while (file
.size
> 0)
1611 int retval
= nand_read_page(nand
, dev
.address
/ dev
.page_size
,
1612 dev
.page
, dev
.page_size
, dev
.oob
, dev
.oob_size
);
1613 if (ERROR_OK
!= retval
)
1615 command_print(CMD_CTX
, "reading NAND flash page failed");
1616 nand_fileio_cleanup(&dev
);
1617 return nand_fileio_cleanup(&file
);
1620 int bytes_read
= nand_fileio_read(nand
, &file
);
1621 if (bytes_read
<= 0)
1623 command_print(CMD_CTX
, "error while reading file");
1624 nand_fileio_cleanup(&dev
);
1625 return nand_fileio_cleanup(&file
);
1628 if ((dev
.page
&& memcmp(dev
.page
, file
.page
, dev
.page_size
)) ||
1629 (dev
.oob
&& memcmp(dev
.oob
, file
.oob
, dev
.oob_size
)) )
1631 command_print(CMD_CTX
, "NAND flash contents differ "
1632 "at 0x%8.8" PRIx32
, dev
.address
);
1633 nand_fileio_cleanup(&dev
);
1634 return nand_fileio_cleanup(&file
);
1637 file
.size
-= bytes_read
;
1638 dev
.address
+= nand
->page_size
;
1641 if (nand_fileio_finish(&file
) == ERROR_OK
)
1643 command_print(CMD_CTX
, "verified file %s in NAND flash %s "
1644 "up to offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1645 CMD_ARGV
[1], CMD_ARGV
[0], dev
.address
, duration_elapsed(&file
.bench
),
1646 duration_kbps(&file
.bench
, dev
.size
));
1649 return nand_fileio_cleanup(&dev
);
1652 COMMAND_HANDLER(handle_nand_dump_command
)
1654 struct nand_device
*nand
= NULL
;
1655 struct nand_fileio_state s
;
1656 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1657 &s
, &nand
, FILEIO_WRITE
, true, false);
1658 if (ERROR_OK
!= retval
)
1663 size_t size_written
;
1664 int retval
= nand_read_page(nand
, s
.address
/ nand
->page_size
,
1665 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1666 if (ERROR_OK
!= retval
)
1668 command_print(CMD_CTX
, "reading NAND flash page failed");
1669 return nand_fileio_cleanup(&s
);
1673 fileio_write(&s
.fileio
, s
.page_size
, s
.page
, &size_written
);
1676 fileio_write(&s
.fileio
, s
.oob_size
, s
.oob
, &size_written
);
1678 s
.size
-= nand
->page_size
;
1679 s
.address
+= nand
->page_size
;
1682 if (nand_fileio_finish(&s
) == ERROR_OK
)
1684 command_print(CMD_CTX
, "dumped %zu bytes in %fs (%0.3f kb/s)",
1685 s
.fileio
.size
, duration_elapsed(&s
.bench
),
1686 duration_kbps(&s
.bench
, s
.fileio
.size
));
1691 COMMAND_HANDLER(handle_nand_raw_access_command
)
1693 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 2))
1695 return ERROR_COMMAND_SYNTAX_ERROR
;
1698 struct nand_device
*p
;
1699 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1700 if (ERROR_OK
!= retval
)
1703 if (NULL
== p
->device
)
1705 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1710 COMMAND_PARSE_ENABLE(CMD_ARGV
[1], p
->use_raw
);
1712 const char *msg
= p
->use_raw
? "enabled" : "disabled";
1713 command_print(CMD_CTX
, "raw access is %s", msg
);
1718 static const struct command_registration nand_exec_command_handlers
[] = {
1721 .handler
= &handle_nand_list_command
,
1722 .mode
= COMMAND_EXEC
,
1723 .help
= "list configured NAND flash devices",
1727 .handler
= &handle_nand_info_command
,
1728 .mode
= COMMAND_EXEC
,
1730 .help
= "print info about a NAND flash device",
1734 .handler
= &handle_nand_probe_command
,
1735 .mode
= COMMAND_EXEC
,
1737 .help
= "identify NAND flash device <num>",
1741 .name
= "check_bad_blocks",
1742 .handler
= &handle_nand_check_bad_blocks_command
,
1743 .mode
= COMMAND_EXEC
,
1744 .usage
= "<bank> [<offset> <length>]",
1745 .help
= "check NAND flash device <num> for bad blocks",
1749 .handler
= &handle_nand_erase_command
,
1750 .mode
= COMMAND_EXEC
,
1751 .usage
= "<bank> [<offset> <length>]",
1752 .help
= "erase blocks on NAND flash device",
1756 .handler
= &handle_nand_dump_command
,
1757 .mode
= COMMAND_EXEC
,
1758 .usage
= "<bank> <filename> <offset> <length> "
1759 "[oob_raw | oob_only]",
1760 .help
= "dump from NAND flash device",
1764 .handler
= &handle_nand_verify_command
,
1765 .mode
= COMMAND_EXEC
,
1766 .usage
= "<bank> <filename> <offset> "
1767 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1768 .help
= "verify NAND flash device",
1772 .handler
= &handle_nand_write_command
,
1773 .mode
= COMMAND_EXEC
,
1774 .usage
= "<bank> <filename> <offset> "
1775 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1776 .help
= "write to NAND flash device",
1779 .name
= "raw_access",
1780 .handler
= &handle_nand_raw_access_command
,
1781 .mode
= COMMAND_EXEC
,
1782 .usage
= "<num> ['enable'|'disable']",
1783 .help
= "raw access to NAND flash device",
1785 COMMAND_REGISTRATION_DONE
1788 int nand_init(struct command_context
*cmd_ctx
)
1792 struct command
*parent
= command_find_in_context(cmd_ctx
, "nand");
1793 return register_commands(cmd_ctx
, parent
, nand_exec_command_handlers
);