1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "time_support.h"
32 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
35 static int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 /* NAND flash controller
39 extern struct nand_flash_controller davinci_nand_controller
;
40 extern struct nand_flash_controller lpc3180_nand_controller
;
41 extern struct nand_flash_controller orion_nand_controller
;
42 extern struct nand_flash_controller s3c2410_nand_controller
;
43 extern struct nand_flash_controller s3c2412_nand_controller
;
44 extern struct nand_flash_controller s3c2440_nand_controller
;
45 extern struct nand_flash_controller s3c2443_nand_controller
;
46 extern struct nand_flash_controller imx31_nand_flash_controller
;
48 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
50 static struct nand_flash_controller
*nand_flash_controllers
[] =
52 &davinci_nand_controller
,
53 &lpc3180_nand_controller
,
54 &orion_nand_controller
,
55 &s3c2410_nand_controller
,
56 &s3c2412_nand_controller
,
57 &s3c2440_nand_controller
,
58 &s3c2443_nand_controller
,
59 &imx31_nand_flash_controller
,
60 /* &boundary_scan_nand_controller, */
64 /* configured NAND devices and NAND Flash command handler */
65 static struct nand_device
*nand_devices
= NULL
;
69 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
72 * Pagesize; 0, 256, 512
73 * 0 get this information from the extended chip ID
74 * 256 256 Byte page size
75 * 512 512 Byte page size
77 static struct nand_info nand_flash_ids
[] =
79 /* start "museum" IDs */
80 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
81 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
82 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
83 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
84 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
85 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
86 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
87 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
88 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
89 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
91 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
92 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
93 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
94 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
95 /* end "museum" IDs */
97 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
98 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
99 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
100 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
102 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
103 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
104 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
105 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
107 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
108 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
109 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
110 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
113 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
114 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
115 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
116 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
118 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
120 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
122 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
123 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
124 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
125 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
127 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
128 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
129 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
130 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
132 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
133 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
134 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
135 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
137 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
138 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
139 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
140 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
142 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
143 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
144 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
145 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
147 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
148 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
149 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
150 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
152 {NULL
, 0, 0, 0, 0, 0 }
155 /* Manufacturer ID list
157 static struct nand_manufacturer nand_manuf_ids
[] =
160 {NAND_MFR_TOSHIBA
, "Toshiba"},
161 {NAND_MFR_SAMSUNG
, "Samsung"},
162 {NAND_MFR_FUJITSU
, "Fujitsu"},
163 {NAND_MFR_NATIONAL
, "National"},
164 {NAND_MFR_RENESAS
, "Renesas"},
165 {NAND_MFR_STMICRO
, "ST Micro"},
166 {NAND_MFR_HYNIX
, "Hynix"},
167 {NAND_MFR_MICRON
, "Micron"},
172 * Define default oob placement schemes for large and small page devices
176 static struct nand_ecclayout nand_oob_8
= {
187 static struct nand_ecclayout nand_oob_16
= {
189 .eccpos
= {0, 1, 2, 3, 6, 7},
195 static struct nand_ecclayout nand_oob_64
= {
198 40, 41, 42, 43, 44, 45, 46, 47,
199 48, 49, 50, 51, 52, 53, 54, 55,
200 56, 57, 58, 59, 60, 61, 62, 63},
206 COMMAND_HANDLER(handle_nand_list_drivers
)
208 command_print(CMD_CTX
, "Available NAND flash controller drivers:");
209 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
210 command_print(CMD_CTX
, " %s", nand_flash_controllers
[i
]->name
);
214 static COMMAND_HELPER(create_nand_device
, const char *bank_name
,
215 struct nand_flash_controller
*controller
)
217 int retval
= controller
->register_commands(CMD_CTX
);
218 if (ERROR_OK
!= retval
)
220 LOG_ERROR("couldn't register '%s' commands", controller
->name
);
223 struct nand_device
*c
= malloc(sizeof(struct nand_device
));
225 c
->name
= strdup(bank_name
);
226 c
->controller
= controller
;
227 c
->controller_priv
= NULL
;
228 c
->manufacturer
= NULL
;
231 c
->address_cycles
= 0;
236 retval
= CALL_COMMAND_HANDLER(controller
->nand_device_command
, c
);
237 if (ERROR_OK
!= retval
)
239 LOG_ERROR("'%s' driver rejected nand flash", controller
->name
);
245 struct nand_device
*p
= nand_devices
;
246 while (p
&& p
->next
) p
= p
->next
;
254 COMMAND_HANDLER(handle_nand_device_command
)
258 LOG_ERROR("incomplete nand device configuration");
259 return ERROR_FLASH_BANK_INVALID
;
262 // save name and increment (for compatibility) with drivers
263 const char *bank_name
= *CMD_ARGV
++;
266 const char *driver_name
= CMD_ARGV
[0];
267 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
269 struct nand_flash_controller
*controller
= nand_flash_controllers
[i
];
270 if (strcmp(driver_name
, controller
->name
) != 0)
273 return CALL_COMMAND_HANDLER(create_nand_device
,
274 bank_name
, controller
);
277 LOG_ERROR("No valid NAND flash driver found (%s)", driver_name
);
278 return CALL_COMMAND_HANDLER(handle_nand_list_drivers
);
281 static const struct command_registration nand_config_command_handlers
[] = {
284 .handler
= &handle_nand_device_command
,
285 .mode
= COMMAND_CONFIG
,
286 .help
= "defines a new NAND bank",
290 .handler
= &handle_nand_list_drivers
,
292 .help
= "lists available NAND drivers",
294 COMMAND_REGISTRATION_DONE
296 static const struct command_registration nand_command_handlers
[] = {
300 .help
= "NAND flash command group",
301 .chain
= nand_config_command_handlers
,
303 COMMAND_REGISTRATION_DONE
306 int nand_register_commands(struct command_context
*cmd_ctx
)
308 return register_commands(cmd_ctx
, NULL
, nand_command_handlers
);
311 struct nand_device
*get_nand_device_by_name(const char *name
)
313 unsigned requested
= get_flash_name_index(name
);
316 struct nand_device
*nand
;
317 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
319 if (strcmp(nand
->name
, name
) == 0)
321 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
323 if (++found
< requested
)
330 struct nand_device
*get_nand_device_by_num(int num
)
332 struct nand_device
*p
;
335 for (p
= nand_devices
; p
; p
= p
->next
)
346 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
347 struct nand_device
**nand
)
349 const char *str
= CMD_ARGV
[name_index
];
350 *nand
= get_nand_device_by_name(str
);
355 COMMAND_PARSE_NUMBER(uint
, str
, num
);
356 *nand
= get_nand_device_by_num(num
);
358 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
359 return ERROR_INVALID_ARGUMENTS
;
364 static int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
370 if ((first
< 0) || (first
>= nand
->num_blocks
))
373 if ((last
>= nand
->num_blocks
) || (last
== -1))
374 last
= nand
->num_blocks
- 1;
376 for (i
= first
; i
< last
; i
++)
378 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
380 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
381 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
382 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
384 LOG_WARNING("bad block: %i", i
);
385 nand
->blocks
[i
].is_bad
= 1;
389 nand
->blocks
[i
].is_bad
= 0;
392 page
+= (nand
->erase_size
/ nand
->page_size
);
398 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
401 return ERROR_NAND_DEVICE_NOT_PROBED
;
403 /* Send read status command */
404 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
409 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
412 nand
->controller
->read_data(nand
, &data
);
413 *status
= data
& 0xff;
417 nand
->controller
->read_data(nand
, status
);
423 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
427 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
429 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
431 nand
->controller
->read_data(nand
, &data
);
432 status
= data
& 0xff;
434 nand
->controller
->read_data(nand
, &status
);
436 if (status
& NAND_STATUS_READY
)
441 return (status
& NAND_STATUS_READY
) != 0;
444 int nand_probe(struct nand_device
*nand
)
446 uint8_t manufacturer_id
, device_id
;
451 /* clear device data */
453 nand
->manufacturer
= NULL
;
455 /* clear device parameters */
457 nand
->address_cycles
= 0;
459 nand
->erase_size
= 0;
461 /* initialize controller (device parameters are zero, use controller default) */
462 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
466 case ERROR_NAND_OPERATION_FAILED
:
467 LOG_DEBUG("controller initialization failed");
468 return ERROR_NAND_OPERATION_FAILED
;
469 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
470 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
471 return ERROR_NAND_OPERATION_FAILED
;
473 LOG_ERROR("BUG: unknown controller initialization failure");
474 return ERROR_NAND_OPERATION_FAILED
;
478 nand
->controller
->command(nand
, NAND_CMD_RESET
);
479 nand
->controller
->reset(nand
);
481 nand
->controller
->command(nand
, NAND_CMD_READID
);
482 nand
->controller
->address(nand
, 0x0);
484 if (nand
->bus_width
== 8)
486 nand
->controller
->read_data(nand
, &manufacturer_id
);
487 nand
->controller
->read_data(nand
, &device_id
);
492 nand
->controller
->read_data(nand
, &data_buf
);
493 manufacturer_id
= data_buf
& 0xff;
494 nand
->controller
->read_data(nand
, &data_buf
);
495 device_id
= data_buf
& 0xff;
498 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
500 if (nand_flash_ids
[i
].id
== device_id
)
502 nand
->device
= &nand_flash_ids
[i
];
507 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
509 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
511 nand
->manufacturer
= &nand_manuf_ids
[i
];
516 if (!nand
->manufacturer
)
518 nand
->manufacturer
= &nand_manuf_ids
[0];
519 nand
->manufacturer
->id
= manufacturer_id
;
524 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
525 manufacturer_id
, device_id
);
526 return ERROR_NAND_OPERATION_FAILED
;
529 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
531 /* initialize device parameters */
534 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
535 nand
->bus_width
= 16;
539 /* Do we need extended device probe information? */
540 if (nand
->device
->page_size
== 0 ||
541 nand
->device
->erase_size
== 0)
543 if (nand
->bus_width
== 8)
545 nand
->controller
->read_data(nand
, id_buff
+ 3);
546 nand
->controller
->read_data(nand
, id_buff
+ 4);
547 nand
->controller
->read_data(nand
, id_buff
+ 5);
553 nand
->controller
->read_data(nand
, &data_buf
);
554 id_buff
[3] = data_buf
;
556 nand
->controller
->read_data(nand
, &data_buf
);
557 id_buff
[4] = data_buf
;
559 nand
->controller
->read_data(nand
, &data_buf
);
560 id_buff
[5] = data_buf
>> 8;
565 if (nand
->device
->page_size
== 0)
567 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
569 else if (nand
->device
->page_size
== 256)
571 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
572 return ERROR_NAND_OPERATION_FAILED
;
576 nand
->page_size
= nand
->device
->page_size
;
579 /* number of address cycles */
580 if (nand
->page_size
<= 512)
582 /* small page devices */
583 if (nand
->device
->chip_size
<= 32)
584 nand
->address_cycles
= 3;
585 else if (nand
->device
->chip_size
<= 8*1024)
586 nand
->address_cycles
= 4;
589 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
590 nand
->address_cycles
= 5;
595 /* large page devices */
596 if (nand
->device
->chip_size
<= 128)
597 nand
->address_cycles
= 4;
598 else if (nand
->device
->chip_size
<= 32*1024)
599 nand
->address_cycles
= 5;
602 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
603 nand
->address_cycles
= 6;
608 if (nand
->device
->erase_size
== 0)
610 switch ((id_buff
[4] >> 4) & 3) {
612 nand
->erase_size
= 64 << 10;
615 nand
->erase_size
= 128 << 10;
618 nand
->erase_size
= 256 << 10;
621 nand
->erase_size
=512 << 10;
627 nand
->erase_size
= nand
->device
->erase_size
;
630 /* initialize controller, but leave parameters at the controllers default */
631 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
635 case ERROR_NAND_OPERATION_FAILED
:
636 LOG_DEBUG("controller initialization failed");
637 return ERROR_NAND_OPERATION_FAILED
;
638 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
639 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
640 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
641 return ERROR_NAND_OPERATION_FAILED
;
643 LOG_ERROR("BUG: unknown controller initialization failure");
644 return ERROR_NAND_OPERATION_FAILED
;
648 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
649 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
651 for (i
= 0; i
< nand
->num_blocks
; i
++)
653 nand
->blocks
[i
].size
= nand
->erase_size
;
654 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
655 nand
->blocks
[i
].is_erased
= -1;
656 nand
->blocks
[i
].is_bad
= -1;
662 static int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
670 return ERROR_NAND_DEVICE_NOT_PROBED
;
672 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
673 return ERROR_INVALID_ARGUMENTS
;
675 /* make sure we know if a block is bad before erasing it */
676 for (i
= first_block
; i
<= last_block
; i
++)
678 if (nand
->blocks
[i
].is_bad
== -1)
680 nand_build_bbt(nand
, i
, last_block
);
685 for (i
= first_block
; i
<= last_block
; i
++)
687 /* Send erase setup command */
688 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
690 page
= i
* (nand
->erase_size
/ nand
->page_size
);
692 /* Send page address */
693 if (nand
->page_size
<= 512)
696 nand
->controller
->address(nand
, page
& 0xff);
697 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
699 /* 3rd cycle only on devices with more than 32 MiB */
700 if (nand
->address_cycles
>= 4)
701 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
703 /* 4th cycle only on devices with more than 8 GiB */
704 if (nand
->address_cycles
>= 5)
705 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
710 nand
->controller
->address(nand
, page
& 0xff);
711 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
713 /* 3rd cycle only on devices with more than 128 MiB */
714 if (nand
->address_cycles
>= 5)
715 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
718 /* Send erase confirm command */
719 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
721 retval
= nand
->controller
->nand_ready
?
722 nand
->controller
->nand_ready(nand
, 1000) :
723 nand_poll_ready(nand
, 1000);
725 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
726 return ERROR_NAND_OPERATION_TIMEOUT
;
729 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
731 LOG_ERROR("couldn't read status");
732 return ERROR_NAND_OPERATION_FAILED
;
737 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
738 (nand
->blocks
[i
].is_bad
== 1)
741 /* continue; other blocks might still be erasable */
744 nand
->blocks
[i
].is_erased
= 1;
751 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
756 return ERROR_NAND_DEVICE_NOT_PROBED
;
758 if (address
% nand
->page_size
)
760 LOG_ERROR("reads need to be page aligned");
761 return ERROR_NAND_OPERATION_FAILED
;
764 page
= malloc(nand
->page_size
);
766 while (data_size
> 0)
768 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
769 uint32_t page_address
;
772 page_address
= address
/ nand
->page_size
;
774 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
776 memcpy(data
, page
, thisrun_size
);
778 address
+= thisrun_size
;
779 data
+= thisrun_size
;
780 data_size
-= thisrun_size
;
788 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
793 return ERROR_NAND_DEVICE_NOT_PROBED
;
795 if (address
% nand
->page_size
)
797 LOG_ERROR("writes need to be page aligned");
798 return ERROR_NAND_OPERATION_FAILED
;
801 page
= malloc(nand
->page_size
);
803 while (data_size
> 0)
805 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
806 uint32_t page_address
;
808 memset(page
, 0xff, nand
->page_size
);
809 memcpy(page
, data
, thisrun_size
);
811 page_address
= address
/ nand
->page_size
;
813 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
815 address
+= thisrun_size
;
816 data
+= thisrun_size
;
817 data_size
-= thisrun_size
;
826 int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
831 return ERROR_NAND_DEVICE_NOT_PROBED
;
833 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
834 if (nand
->blocks
[block
].is_erased
== 1)
835 nand
->blocks
[block
].is_erased
= 0;
837 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
838 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
840 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
843 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
846 return ERROR_NAND_DEVICE_NOT_PROBED
;
848 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
849 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
851 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
854 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
859 return ERROR_NAND_DEVICE_NOT_PROBED
;
861 if (nand
->page_size
<= 512)
863 /* small page device */
865 nand
->controller
->command(nand
, NAND_CMD_READ0
);
867 nand
->controller
->command(nand
, NAND_CMD_READOOB
);
869 /* column (always 0, we start at the beginning of a page/OOB area) */
870 nand
->controller
->address(nand
, 0x0);
873 nand
->controller
->address(nand
, page
& 0xff);
874 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
876 /* 4th cycle only on devices with more than 32 MiB */
877 if (nand
->address_cycles
>= 4)
878 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
880 /* 5th cycle only on devices with more than 8 GiB */
881 if (nand
->address_cycles
>= 5)
882 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
886 /* large page device */
887 nand
->controller
->command(nand
, NAND_CMD_READ0
);
889 /* column (0 when we start at the beginning of a page,
890 * or 2048 for the beginning of OOB area)
892 nand
->controller
->address(nand
, 0x0);
894 nand
->controller
->address(nand
, 0x0);
896 nand
->controller
->address(nand
, 0x8);
899 nand
->controller
->address(nand
, page
& 0xff);
900 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
902 /* 5th cycle only on devices with more than 128 MiB */
903 if (nand
->address_cycles
>= 5)
904 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
906 /* large page devices need a start command */
907 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
910 if (nand
->controller
->nand_ready
) {
911 if (!nand
->controller
->nand_ready(nand
, 100))
912 return ERROR_NAND_OPERATION_TIMEOUT
;
919 if (nand
->controller
->read_block_data
!= NULL
)
920 (nand
->controller
->read_block_data
)(nand
, data
, data_size
);
923 for (i
= 0; i
< data_size
;)
925 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
927 nand
->controller
->read_data(nand
, data
);
933 nand
->controller
->read_data(nand
, data
);
943 if (nand
->controller
->read_block_data
!= NULL
)
944 (nand
->controller
->read_block_data
)(nand
, oob
, oob_size
);
947 for (i
= 0; i
< oob_size
;)
949 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
951 nand
->controller
->read_data(nand
, oob
);
957 nand
->controller
->read_data(nand
, oob
);
968 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
975 return ERROR_NAND_DEVICE_NOT_PROBED
;
977 nand
->controller
->command(nand
, NAND_CMD_SEQIN
);
979 if (nand
->page_size
<= 512)
981 /* column (always 0, we start at the beginning of a page/OOB area) */
982 nand
->controller
->address(nand
, 0x0);
985 nand
->controller
->address(nand
, page
& 0xff);
986 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
988 /* 4th cycle only on devices with more than 32 MiB */
989 if (nand
->address_cycles
>= 4)
990 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
992 /* 5th cycle only on devices with more than 8 GiB */
993 if (nand
->address_cycles
>= 5)
994 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
998 /* column (0 when we start at the beginning of a page,
999 * or 2048 for the beginning of OOB area)
1001 nand
->controller
->address(nand
, 0x0);
1003 nand
->controller
->address(nand
, 0x0);
1005 nand
->controller
->address(nand
, 0x8);
1008 nand
->controller
->address(nand
, page
& 0xff);
1009 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
1011 /* 5th cycle only on devices with more than 128 MiB */
1012 if (nand
->address_cycles
>= 5)
1013 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1018 if (nand
->controller
->write_block_data
!= NULL
)
1019 (nand
->controller
->write_block_data
)(nand
, data
, data_size
);
1022 for (i
= 0; i
< data_size
;)
1024 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1026 uint16_t data_buf
= le_to_h_u16(data
);
1027 nand
->controller
->write_data(nand
, data_buf
);
1033 nand
->controller
->write_data(nand
, *data
);
1043 if (nand
->controller
->write_block_data
!= NULL
)
1044 (nand
->controller
->write_block_data
)(nand
, oob
, oob_size
);
1047 for (i
= 0; i
< oob_size
;)
1049 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1051 uint16_t oob_buf
= le_to_h_u16(data
);
1052 nand
->controller
->write_data(nand
, oob_buf
);
1058 nand
->controller
->write_data(nand
, *oob
);
1066 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
1068 retval
= nand
->controller
->nand_ready
?
1069 nand
->controller
->nand_ready(nand
, 100) :
1070 nand_poll_ready(nand
, 100);
1072 return ERROR_NAND_OPERATION_TIMEOUT
;
1074 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
1076 LOG_ERROR("couldn't read status");
1077 return ERROR_NAND_OPERATION_FAILED
;
1080 if (status
& NAND_STATUS_FAIL
)
1082 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1083 return ERROR_NAND_OPERATION_FAILED
;
1089 COMMAND_HANDLER(handle_nand_list_command
)
1091 struct nand_device
*p
;
1096 command_print(CMD_CTX
, "no NAND flash devices configured");
1100 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1103 command_print(CMD_CTX
, "#%i: %s (%s) "
1104 "pagesize: %i, buswidth: %i,\n\t"
1105 "blocksize: %i, blocks: %i",
1106 i
, p
->device
->name
, p
->manufacturer
->name
,
1107 p
->page_size
, p
->bus_width
,
1108 p
->erase_size
, p
->num_blocks
);
1110 command_print(CMD_CTX
, "#%i: not probed", i
);
1116 COMMAND_HANDLER(handle_nand_info_command
)
1123 struct nand_device
*p
;
1124 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1125 if (ERROR_OK
!= retval
)
1130 return ERROR_COMMAND_SYNTAX_ERROR
;
1136 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], i
);
1141 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], first
);
1142 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], last
);
1146 if (NULL
== p
->device
)
1148 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1152 if (first
>= p
->num_blocks
)
1153 first
= p
->num_blocks
- 1;
1155 if (last
>= p
->num_blocks
)
1156 last
= p
->num_blocks
- 1;
1158 command_print(CMD_CTX
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1159 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1161 for (j
= first
; j
<= last
; j
++)
1163 char *erase_state
, *bad_state
;
1165 if (p
->blocks
[j
].is_erased
== 0)
1166 erase_state
= "not erased";
1167 else if (p
->blocks
[j
].is_erased
== 1)
1168 erase_state
= "erased";
1170 erase_state
= "erase state unknown";
1172 if (p
->blocks
[j
].is_bad
== 0)
1174 else if (p
->blocks
[j
].is_bad
== 1)
1175 bad_state
= " (marked bad)";
1177 bad_state
= " (block condition unknown)";
1179 command_print(CMD_CTX
,
1180 "\t#%i: 0x%8.8" PRIx32
" (%" PRId32
"kB) %s%s",
1182 p
->blocks
[j
].offset
,
1183 p
->blocks
[j
].size
/ 1024,
1191 COMMAND_HANDLER(handle_nand_probe_command
)
1195 return ERROR_COMMAND_SYNTAX_ERROR
;
1198 struct nand_device
*p
;
1199 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1200 if (ERROR_OK
!= retval
)
1203 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1205 command_print(CMD_CTX
, "NAND flash device '%s' found", p
->device
->name
);
1207 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1209 command_print(CMD_CTX
, "probing failed for NAND flash device");
1213 command_print(CMD_CTX
, "unknown error when probing NAND flash device");
1219 COMMAND_HANDLER(handle_nand_erase_command
)
1221 if (CMD_ARGC
!= 1 && CMD_ARGC
!= 3)
1223 return ERROR_COMMAND_SYNTAX_ERROR
;
1227 struct nand_device
*p
;
1228 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1229 if (ERROR_OK
!= retval
)
1232 unsigned long offset
;
1233 unsigned long length
;
1235 /* erase specified part of the chip; or else everything */
1236 if (CMD_ARGC
== 3) {
1237 unsigned long size
= p
->erase_size
* p
->num_blocks
;
1239 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1240 if ((offset
% p
->erase_size
) != 0 || offset
>= size
)
1241 return ERROR_INVALID_ARGUMENTS
;
1243 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1244 if ((length
== 0) || (length
% p
->erase_size
) != 0
1245 || (length
+ offset
) > size
)
1246 return ERROR_INVALID_ARGUMENTS
;
1248 offset
/= p
->erase_size
;
1249 length
/= p
->erase_size
;
1252 length
= p
->num_blocks
;
1255 retval
= nand_erase(p
, offset
, offset
+ length
- 1);
1256 if (retval
== ERROR_OK
)
1258 command_print(CMD_CTX
, "erased blocks %lu to %lu "
1259 "on NAND flash device #%s '%s'",
1260 offset
, offset
+ length
,
1261 CMD_ARGV
[0], p
->device
->name
);
1263 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1265 command_print(CMD_CTX
, "erase failed");
1269 command_print(CMD_CTX
, "unknown error when erasing NAND flash device");
1275 COMMAND_HANDLER(handle_nand_check_bad_blocks_command
)
1280 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 3) || (CMD_ARGC
== 2))
1282 return ERROR_COMMAND_SYNTAX_ERROR
;
1286 struct nand_device
*p
;
1287 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1288 if (ERROR_OK
!= retval
)
1293 unsigned long offset
;
1294 unsigned long length
;
1296 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1297 if (offset
% p
->erase_size
)
1298 return ERROR_INVALID_ARGUMENTS
;
1299 offset
/= p
->erase_size
;
1301 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1302 if (length
% p
->erase_size
)
1303 return ERROR_INVALID_ARGUMENTS
;
1306 length
/= p
->erase_size
;
1309 last
= offset
+ length
;
1312 retval
= nand_build_bbt(p
, first
, last
);
1313 if (retval
== ERROR_OK
)
1315 command_print(CMD_CTX
, "checked NAND flash device for bad blocks, "
1316 "use \"nand info\" command to list blocks");
1318 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1320 command_print(CMD_CTX
, "error when checking for bad blocks on "
1321 "NAND flash device");
1325 command_print(CMD_CTX
, "unknown error when checking for bad "
1326 "blocks on NAND flash device");
1332 struct nand_fileio_state
{
1339 enum oob_formats oob_format
;
1346 struct fileio fileio
;
1348 struct duration bench
;
1351 static void nand_fileio_init(struct nand_fileio_state
*state
)
1353 memset(state
, 0, sizeof(*state
));
1354 state
->oob_format
= NAND_OOB_NONE
;
1357 static int nand_fileio_start(struct command_context
*cmd_ctx
,
1358 struct nand_device
*nand
, const char *filename
, int filemode
,
1359 struct nand_fileio_state
*state
)
1361 if (state
->address
% nand
->page_size
)
1363 command_print(cmd_ctx
, "only page-aligned addresses are supported");
1364 return ERROR_COMMAND_SYNTAX_ERROR
;
1367 duration_start(&state
->bench
);
1369 if (NULL
!= filename
)
1371 int retval
= fileio_open(&state
->fileio
, filename
, filemode
, FILEIO_BINARY
);
1372 if (ERROR_OK
!= retval
)
1374 const char *msg
= (FILEIO_READ
== filemode
) ? "read" : "write";
1375 command_print(cmd_ctx
, "failed to open '%s' for %s access",
1379 state
->file_opened
= true;
1382 if (!(state
->oob_format
& NAND_OOB_ONLY
))
1384 state
->page_size
= nand
->page_size
;
1385 state
->page
= malloc(nand
->page_size
);
1388 if (state
->oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1390 if (nand
->page_size
== 512)
1392 state
->oob_size
= 16;
1393 state
->eccpos
= nand_oob_16
.eccpos
;
1395 else if (nand
->page_size
== 2048)
1397 state
->oob_size
= 64;
1398 state
->eccpos
= nand_oob_64
.eccpos
;
1400 state
->oob
= malloc(state
->oob_size
);
1405 static int nand_fileio_cleanup(struct nand_fileio_state
*state
)
1407 if (state
->file_opened
)
1408 fileio_close(&state
->fileio
);
1422 static int nand_fileio_finish(struct nand_fileio_state
*state
)
1424 nand_fileio_cleanup(state
);
1425 return duration_measure(&state
->bench
);
1428 static COMMAND_HELPER(nand_fileio_parse_args
, struct nand_fileio_state
*state
,
1429 struct nand_device
**dev
, enum fileio_access filemode
,
1430 bool need_size
, bool sw_ecc
)
1432 nand_fileio_init(state
);
1434 unsigned minargs
= need_size
? 4 : 3;
1435 if (CMD_ARGC
< minargs
)
1436 return ERROR_COMMAND_SYNTAX_ERROR
;
1438 struct nand_device
*nand
;
1439 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &nand
);
1440 if (ERROR_OK
!= retval
)
1443 if (NULL
== nand
->device
)
1445 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1449 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], state
->address
);
1452 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[3], state
->size
);
1453 if (state
->size
% nand
->page_size
)
1455 command_print(CMD_CTX
, "only page-aligned sizes are supported");
1456 return ERROR_COMMAND_SYNTAX_ERROR
;
1460 if (CMD_ARGC
> minargs
)
1462 for (unsigned i
= minargs
; i
< CMD_ARGC
; i
++)
1464 if (!strcmp(CMD_ARGV
[i
], "oob_raw"))
1465 state
->oob_format
|= NAND_OOB_RAW
;
1466 else if (!strcmp(CMD_ARGV
[i
], "oob_only"))
1467 state
->oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1468 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc"))
1469 state
->oob_format
|= NAND_OOB_SW_ECC
;
1470 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc_kw"))
1471 state
->oob_format
|= NAND_OOB_SW_ECC_KW
;
1474 command_print(CMD_CTX
, "unknown option: %s", CMD_ARGV
[i
]);
1475 return ERROR_COMMAND_SYNTAX_ERROR
;
1480 retval
= nand_fileio_start(CMD_CTX
, nand
, CMD_ARGV
[1], filemode
, state
);
1481 if (ERROR_OK
!= retval
)
1485 state
->size
= state
->fileio
.size
;
1493 * @returns If no error occurred, returns number of bytes consumed;
1494 * otherwise, returns a negative error code.)
1496 static int nand_fileio_read(struct nand_device
*nand
,
1497 struct nand_fileio_state
*s
)
1499 size_t total_read
= 0;
1502 if (NULL
!= s
->page
)
1504 fileio_read(&s
->fileio
, s
->page_size
, s
->page
, &one_read
);
1505 if (one_read
< s
->page_size
)
1506 memset(s
->page
+ one_read
, 0xff, s
->page_size
- one_read
);
1507 total_read
+= one_read
;
1510 if (s
->oob_format
& NAND_OOB_SW_ECC
)
1513 memset(s
->oob
, 0xff, s
->oob_size
);
1514 for (uint32_t i
= 0, j
= 0; i
< s
->page_size
; i
+= 256)
1516 nand_calculate_ecc(nand
, s
->page
+ i
, ecc
);
1517 s
->oob
[s
->eccpos
[j
++]] = ecc
[0];
1518 s
->oob
[s
->eccpos
[j
++]] = ecc
[1];
1519 s
->oob
[s
->eccpos
[j
++]] = ecc
[2];
1522 else if (s
->oob_format
& NAND_OOB_SW_ECC_KW
)
1525 * In this case eccpos is not used as
1526 * the ECC data is always stored contigously
1527 * at the end of the OOB area. It consists
1528 * of 10 bytes per 512-byte data block.
1530 uint8_t *ecc
= s
->oob
+ s
->oob_size
- s
->page_size
/ 512 * 10;
1531 memset(s
->oob
, 0xff, s
->oob_size
);
1532 for (uint32_t i
= 0; i
< s
->page_size
; i
+= 512)
1534 nand_calculate_ecc_kw(nand
, s
->page
+ i
, ecc
);
1538 else if (NULL
!= s
->oob
)
1540 fileio_read(&s
->fileio
, s
->oob_size
, s
->oob
, &one_read
);
1541 if (one_read
< s
->oob_size
)
1542 memset(s
->oob
+ one_read
, 0xff, s
->oob_size
- one_read
);
1543 total_read
+= one_read
;
1548 COMMAND_HANDLER(handle_nand_write_command
)
1550 struct nand_device
*nand
= NULL
;
1551 struct nand_fileio_state s
;
1552 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1553 &s
, &nand
, FILEIO_READ
, false, true);
1554 if (ERROR_OK
!= retval
)
1557 uint32_t total_bytes
= s
.size
;
1560 int bytes_read
= nand_fileio_read(nand
, &s
);
1561 if (bytes_read
<= 0)
1563 command_print(CMD_CTX
, "error while reading file");
1564 return nand_fileio_cleanup(&s
);
1566 s
.size
-= bytes_read
;
1568 retval
= nand_write_page(nand
, s
.address
/ nand
->page_size
,
1569 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1570 if (ERROR_OK
!= retval
)
1572 command_print(CMD_CTX
, "failed writing file %s "
1573 "to NAND flash %s at offset 0x%8.8" PRIx32
,
1574 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
);
1575 return nand_fileio_cleanup(&s
);
1577 s
.address
+= s
.page_size
;
1580 if (nand_fileio_finish(&s
))
1582 command_print(CMD_CTX
, "wrote file %s to NAND flash %s up to "
1583 "offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1584 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
, duration_elapsed(&s
.bench
),
1585 duration_kbps(&s
.bench
, total_bytes
));
1590 COMMAND_HANDLER(handle_nand_verify_command
)
1592 struct nand_device
*nand
= NULL
;
1593 struct nand_fileio_state file
;
1594 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1595 &file
, &nand
, FILEIO_READ
, false, true);
1596 if (ERROR_OK
!= retval
)
1599 struct nand_fileio_state dev
;
1600 nand_fileio_init(&dev
);
1601 dev
.address
= file
.address
;
1602 dev
.size
= file
.size
;
1603 dev
.oob_format
= file
.oob_format
;
1604 retval
= nand_fileio_start(CMD_CTX
, nand
, NULL
, FILEIO_NONE
, &dev
);
1605 if (ERROR_OK
!= retval
)
1608 while (file
.size
> 0)
1610 int retval
= nand_read_page(nand
, dev
.address
/ dev
.page_size
,
1611 dev
.page
, dev
.page_size
, dev
.oob
, dev
.oob_size
);
1612 if (ERROR_OK
!= retval
)
1614 command_print(CMD_CTX
, "reading NAND flash page failed");
1615 nand_fileio_cleanup(&dev
);
1616 return nand_fileio_cleanup(&file
);
1619 int bytes_read
= nand_fileio_read(nand
, &file
);
1620 if (bytes_read
<= 0)
1622 command_print(CMD_CTX
, "error while reading file");
1623 nand_fileio_cleanup(&dev
);
1624 return nand_fileio_cleanup(&file
);
1627 if ((dev
.page
&& memcmp(dev
.page
, file
.page
, dev
.page_size
)) ||
1628 (dev
.oob
&& memcmp(dev
.oob
, file
.oob
, dev
.oob_size
)) )
1630 command_print(CMD_CTX
, "NAND flash contents differ "
1631 "at 0x%8.8" PRIx32
, dev
.address
);
1632 nand_fileio_cleanup(&dev
);
1633 return nand_fileio_cleanup(&file
);
1636 file
.size
-= bytes_read
;
1637 dev
.address
+= nand
->page_size
;
1640 if (nand_fileio_finish(&file
) == ERROR_OK
)
1642 command_print(CMD_CTX
, "verified file %s in NAND flash %s "
1643 "up to offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1644 CMD_ARGV
[1], CMD_ARGV
[0], dev
.address
, duration_elapsed(&file
.bench
),
1645 duration_kbps(&file
.bench
, dev
.size
));
1648 return nand_fileio_cleanup(&dev
);
1651 COMMAND_HANDLER(handle_nand_dump_command
)
1653 struct nand_device
*nand
= NULL
;
1654 struct nand_fileio_state s
;
1655 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1656 &s
, &nand
, FILEIO_WRITE
, true, false);
1657 if (ERROR_OK
!= retval
)
1662 size_t size_written
;
1663 int retval
= nand_read_page(nand
, s
.address
/ nand
->page_size
,
1664 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1665 if (ERROR_OK
!= retval
)
1667 command_print(CMD_CTX
, "reading NAND flash page failed");
1668 return nand_fileio_cleanup(&s
);
1672 fileio_write(&s
.fileio
, s
.page_size
, s
.page
, &size_written
);
1675 fileio_write(&s
.fileio
, s
.oob_size
, s
.oob
, &size_written
);
1677 s
.size
-= nand
->page_size
;
1678 s
.address
+= nand
->page_size
;
1681 if (nand_fileio_finish(&s
) == ERROR_OK
)
1683 command_print(CMD_CTX
, "dumped %zu bytes in %fs (%0.3f kb/s)",
1684 s
.fileio
.size
, duration_elapsed(&s
.bench
),
1685 duration_kbps(&s
.bench
, s
.fileio
.size
));
1690 COMMAND_HANDLER(handle_nand_raw_access_command
)
1692 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 2))
1694 return ERROR_COMMAND_SYNTAX_ERROR
;
1697 struct nand_device
*p
;
1698 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1699 if (ERROR_OK
!= retval
)
1702 if (NULL
== p
->device
)
1704 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1709 COMMAND_PARSE_ENABLE(CMD_ARGV
[1], p
->use_raw
);
1711 const char *msg
= p
->use_raw
? "enabled" : "disabled";
1712 command_print(CMD_CTX
, "raw access is %s", msg
);
1717 static const struct command_registration nand_exec_command_handlers
[] = {
1720 .handler
= &handle_nand_list_command
,
1721 .mode
= COMMAND_EXEC
,
1722 .help
= "list configured NAND flash devices",
1726 .handler
= &handle_nand_info_command
,
1727 .mode
= COMMAND_EXEC
,
1729 .help
= "print info about a NAND flash device",
1733 .handler
= &handle_nand_probe_command
,
1734 .mode
= COMMAND_EXEC
,
1736 .help
= "identify NAND flash device <num>",
1740 .name
= "check_bad_blocks",
1741 .handler
= &handle_nand_check_bad_blocks_command
,
1742 .mode
= COMMAND_EXEC
,
1743 .usage
= "<bank> [<offset> <length>]",
1744 .help
= "check NAND flash device <num> for bad blocks",
1748 .handler
= &handle_nand_erase_command
,
1749 .mode
= COMMAND_EXEC
,
1750 .usage
= "<bank> [<offset> <length>]",
1751 .help
= "erase blocks on NAND flash device",
1755 .handler
= &handle_nand_dump_command
,
1756 .mode
= COMMAND_EXEC
,
1757 .usage
= "<bank> <filename> <offset> <length> "
1758 "[oob_raw | oob_only]",
1759 .help
= "dump from NAND flash device",
1763 .handler
= &handle_nand_verify_command
,
1764 .mode
= COMMAND_EXEC
,
1765 .usage
= "<bank> <filename> <offset> "
1766 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1767 .help
= "verify NAND flash device",
1771 .handler
= &handle_nand_write_command
,
1772 .mode
= COMMAND_EXEC
,
1773 .usage
= "<bank> <filename> <offset> "
1774 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1775 .help
= "write to NAND flash device",
1778 .name
= "raw_access",
1779 .handler
= &handle_nand_raw_access_command
,
1780 .mode
= COMMAND_EXEC
,
1781 .usage
= "<num> ['enable'|'disable']",
1782 .help
= "raw access to NAND flash device",
1784 COMMAND_REGISTRATION_DONE
1787 int nand_init(struct command_context
*cmd_ctx
)
1791 struct command
*parent
= command_find_in_context(cmd_ctx
, "nand");
1792 return register_commands(cmd_ctx
, parent
, nand_exec_command_handlers
);