1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "time_support.h"
32 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
35 static int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 /* NAND flash controller
39 extern struct nand_flash_controller nonce_nand_controller
;
40 extern struct nand_flash_controller davinci_nand_controller
;
41 extern struct nand_flash_controller lpc3180_nand_controller
;
42 extern struct nand_flash_controller orion_nand_controller
;
43 extern struct nand_flash_controller s3c2410_nand_controller
;
44 extern struct nand_flash_controller s3c2412_nand_controller
;
45 extern struct nand_flash_controller s3c2440_nand_controller
;
46 extern struct nand_flash_controller s3c2443_nand_controller
;
47 extern struct nand_flash_controller imx31_nand_flash_controller
;
49 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
51 static struct nand_flash_controller
*nand_flash_controllers
[] =
53 &nonce_nand_controller
,
54 &davinci_nand_controller
,
55 &lpc3180_nand_controller
,
56 &orion_nand_controller
,
57 &s3c2410_nand_controller
,
58 &s3c2412_nand_controller
,
59 &s3c2440_nand_controller
,
60 &s3c2443_nand_controller
,
61 &imx31_nand_flash_controller
,
62 /* &boundary_scan_nand_controller, */
66 /* configured NAND devices and NAND Flash command handler */
67 static struct nand_device
*nand_devices
= NULL
;
71 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
74 * Pagesize; 0, 256, 512
75 * 0 get this information from the extended chip ID
76 * 256 256 Byte page size
77 * 512 512 Byte page size
79 static struct nand_info nand_flash_ids
[] =
81 /* start "museum" IDs */
82 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
83 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
84 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
85 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
86 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
87 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
88 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
89 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
90 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
91 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
93 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
94 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
95 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
96 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
97 /* end "museum" IDs */
99 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
100 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
101 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
102 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
104 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
105 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
106 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
107 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
109 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
110 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
111 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
114 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
115 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
116 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
117 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
118 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
120 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
122 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
124 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
125 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
126 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
127 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
129 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
130 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
131 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
132 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
134 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
135 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
136 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
137 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
139 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
140 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
141 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
142 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
144 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
145 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
146 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
147 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
149 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
150 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
151 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
152 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
154 {NULL
, 0, 0, 0, 0, 0 }
157 /* Manufacturer ID list
159 static struct nand_manufacturer nand_manuf_ids
[] =
162 {NAND_MFR_TOSHIBA
, "Toshiba"},
163 {NAND_MFR_SAMSUNG
, "Samsung"},
164 {NAND_MFR_FUJITSU
, "Fujitsu"},
165 {NAND_MFR_NATIONAL
, "National"},
166 {NAND_MFR_RENESAS
, "Renesas"},
167 {NAND_MFR_STMICRO
, "ST Micro"},
168 {NAND_MFR_HYNIX
, "Hynix"},
169 {NAND_MFR_MICRON
, "Micron"},
174 * Define default oob placement schemes for large and small page devices
178 static struct nand_ecclayout nand_oob_8
= {
189 static struct nand_ecclayout nand_oob_16
= {
191 .eccpos
= {0, 1, 2, 3, 6, 7},
197 static struct nand_ecclayout nand_oob_64
= {
200 40, 41, 42, 43, 44, 45, 46, 47,
201 48, 49, 50, 51, 52, 53, 54, 55,
202 56, 57, 58, 59, 60, 61, 62, 63},
208 COMMAND_HANDLER(handle_nand_list_drivers
)
210 command_print(CMD_CTX
, "Available NAND flash controller drivers:");
211 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
212 command_print(CMD_CTX
, " %s", nand_flash_controllers
[i
]->name
);
216 static COMMAND_HELPER(create_nand_device
, const char *bank_name
,
217 struct nand_flash_controller
*controller
)
219 if (NULL
!= controller
->commands
)
221 int retval
= register_commands(CMD_CTX
, NULL
,
222 controller
->commands
);
223 if (ERROR_OK
!= retval
)
226 struct nand_device
*c
= malloc(sizeof(struct nand_device
));
228 c
->name
= strdup(bank_name
);
229 c
->controller
= controller
;
230 c
->controller_priv
= NULL
;
231 c
->manufacturer
= NULL
;
234 c
->address_cycles
= 0;
239 int retval
= CALL_COMMAND_HANDLER(controller
->nand_device_command
, c
);
240 if (ERROR_OK
!= retval
)
242 LOG_ERROR("'%s' driver rejected nand flash", controller
->name
);
248 struct nand_device
*p
= nand_devices
;
249 while (p
&& p
->next
) p
= p
->next
;
257 COMMAND_HANDLER(handle_nand_device_command
)
261 LOG_ERROR("incomplete nand device configuration");
262 return ERROR_FLASH_BANK_INVALID
;
265 // save name and increment (for compatibility) with drivers
266 const char *bank_name
= *CMD_ARGV
++;
269 const char *driver_name
= CMD_ARGV
[0];
270 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
272 struct nand_flash_controller
*controller
= nand_flash_controllers
[i
];
273 if (strcmp(driver_name
, controller
->name
) != 0)
276 return CALL_COMMAND_HANDLER(create_nand_device
,
277 bank_name
, controller
);
280 LOG_ERROR("No valid NAND flash driver found (%s)", driver_name
);
281 return CALL_COMMAND_HANDLER(handle_nand_list_drivers
);
284 static const struct command_registration nand_config_command_handlers
[] = {
287 .handler
= &handle_nand_device_command
,
288 .mode
= COMMAND_CONFIG
,
289 .help
= "defines a new NAND bank",
293 .handler
= &handle_nand_list_drivers
,
295 .help
= "lists available NAND drivers",
297 COMMAND_REGISTRATION_DONE
299 static const struct command_registration nand_command_handlers
[] = {
303 .help
= "NAND flash command group",
304 .chain
= nand_config_command_handlers
,
306 COMMAND_REGISTRATION_DONE
309 int nand_register_commands(struct command_context
*cmd_ctx
)
311 return register_commands(cmd_ctx
, NULL
, nand_command_handlers
);
314 struct nand_device
*get_nand_device_by_name(const char *name
)
316 unsigned requested
= get_flash_name_index(name
);
319 struct nand_device
*nand
;
320 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
322 if (strcmp(nand
->name
, name
) == 0)
324 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
326 if (++found
< requested
)
333 struct nand_device
*get_nand_device_by_num(int num
)
335 struct nand_device
*p
;
338 for (p
= nand_devices
; p
; p
= p
->next
)
349 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
350 struct nand_device
**nand
)
352 const char *str
= CMD_ARGV
[name_index
];
353 *nand
= get_nand_device_by_name(str
);
358 COMMAND_PARSE_NUMBER(uint
, str
, num
);
359 *nand
= get_nand_device_by_num(num
);
361 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
362 return ERROR_INVALID_ARGUMENTS
;
367 static int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
373 if ((first
< 0) || (first
>= nand
->num_blocks
))
376 if ((last
>= nand
->num_blocks
) || (last
== -1))
377 last
= nand
->num_blocks
- 1;
379 for (i
= first
; i
< last
; i
++)
381 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
383 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
384 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
385 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
387 LOG_WARNING("bad block: %i", i
);
388 nand
->blocks
[i
].is_bad
= 1;
392 nand
->blocks
[i
].is_bad
= 0;
395 page
+= (nand
->erase_size
/ nand
->page_size
);
401 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
404 return ERROR_NAND_DEVICE_NOT_PROBED
;
406 /* Send read status command */
407 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
412 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
415 nand
->controller
->read_data(nand
, &data
);
416 *status
= data
& 0xff;
420 nand
->controller
->read_data(nand
, status
);
426 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
430 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
432 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
434 nand
->controller
->read_data(nand
, &data
);
435 status
= data
& 0xff;
437 nand
->controller
->read_data(nand
, &status
);
439 if (status
& NAND_STATUS_READY
)
444 return (status
& NAND_STATUS_READY
) != 0;
447 int nand_probe(struct nand_device
*nand
)
449 uint8_t manufacturer_id
, device_id
;
454 /* clear device data */
456 nand
->manufacturer
= NULL
;
458 /* clear device parameters */
460 nand
->address_cycles
= 0;
462 nand
->erase_size
= 0;
464 /* initialize controller (device parameters are zero, use controller default) */
465 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
469 case ERROR_NAND_OPERATION_FAILED
:
470 LOG_DEBUG("controller initialization failed");
471 return ERROR_NAND_OPERATION_FAILED
;
472 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
473 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
474 return ERROR_NAND_OPERATION_FAILED
;
476 LOG_ERROR("BUG: unknown controller initialization failure");
477 return ERROR_NAND_OPERATION_FAILED
;
481 nand
->controller
->command(nand
, NAND_CMD_RESET
);
482 nand
->controller
->reset(nand
);
484 nand
->controller
->command(nand
, NAND_CMD_READID
);
485 nand
->controller
->address(nand
, 0x0);
487 if (nand
->bus_width
== 8)
489 nand
->controller
->read_data(nand
, &manufacturer_id
);
490 nand
->controller
->read_data(nand
, &device_id
);
495 nand
->controller
->read_data(nand
, &data_buf
);
496 manufacturer_id
= data_buf
& 0xff;
497 nand
->controller
->read_data(nand
, &data_buf
);
498 device_id
= data_buf
& 0xff;
501 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
503 if (nand_flash_ids
[i
].id
== device_id
)
505 nand
->device
= &nand_flash_ids
[i
];
510 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
512 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
514 nand
->manufacturer
= &nand_manuf_ids
[i
];
519 if (!nand
->manufacturer
)
521 nand
->manufacturer
= &nand_manuf_ids
[0];
522 nand
->manufacturer
->id
= manufacturer_id
;
527 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
528 manufacturer_id
, device_id
);
529 return ERROR_NAND_OPERATION_FAILED
;
532 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
534 /* initialize device parameters */
537 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
538 nand
->bus_width
= 16;
542 /* Do we need extended device probe information? */
543 if (nand
->device
->page_size
== 0 ||
544 nand
->device
->erase_size
== 0)
546 if (nand
->bus_width
== 8)
548 nand
->controller
->read_data(nand
, id_buff
+ 3);
549 nand
->controller
->read_data(nand
, id_buff
+ 4);
550 nand
->controller
->read_data(nand
, id_buff
+ 5);
556 nand
->controller
->read_data(nand
, &data_buf
);
557 id_buff
[3] = data_buf
;
559 nand
->controller
->read_data(nand
, &data_buf
);
560 id_buff
[4] = data_buf
;
562 nand
->controller
->read_data(nand
, &data_buf
);
563 id_buff
[5] = data_buf
>> 8;
568 if (nand
->device
->page_size
== 0)
570 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
572 else if (nand
->device
->page_size
== 256)
574 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
575 return ERROR_NAND_OPERATION_FAILED
;
579 nand
->page_size
= nand
->device
->page_size
;
582 /* number of address cycles */
583 if (nand
->page_size
<= 512)
585 /* small page devices */
586 if (nand
->device
->chip_size
<= 32)
587 nand
->address_cycles
= 3;
588 else if (nand
->device
->chip_size
<= 8*1024)
589 nand
->address_cycles
= 4;
592 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
593 nand
->address_cycles
= 5;
598 /* large page devices */
599 if (nand
->device
->chip_size
<= 128)
600 nand
->address_cycles
= 4;
601 else if (nand
->device
->chip_size
<= 32*1024)
602 nand
->address_cycles
= 5;
605 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
606 nand
->address_cycles
= 6;
611 if (nand
->device
->erase_size
== 0)
613 switch ((id_buff
[4] >> 4) & 3) {
615 nand
->erase_size
= 64 << 10;
618 nand
->erase_size
= 128 << 10;
621 nand
->erase_size
= 256 << 10;
624 nand
->erase_size
=512 << 10;
630 nand
->erase_size
= nand
->device
->erase_size
;
633 /* initialize controller, but leave parameters at the controllers default */
634 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
638 case ERROR_NAND_OPERATION_FAILED
:
639 LOG_DEBUG("controller initialization failed");
640 return ERROR_NAND_OPERATION_FAILED
;
641 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
642 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
643 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
644 return ERROR_NAND_OPERATION_FAILED
;
646 LOG_ERROR("BUG: unknown controller initialization failure");
647 return ERROR_NAND_OPERATION_FAILED
;
651 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
652 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
654 for (i
= 0; i
< nand
->num_blocks
; i
++)
656 nand
->blocks
[i
].size
= nand
->erase_size
;
657 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
658 nand
->blocks
[i
].is_erased
= -1;
659 nand
->blocks
[i
].is_bad
= -1;
665 static int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
673 return ERROR_NAND_DEVICE_NOT_PROBED
;
675 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
676 return ERROR_INVALID_ARGUMENTS
;
678 /* make sure we know if a block is bad before erasing it */
679 for (i
= first_block
; i
<= last_block
; i
++)
681 if (nand
->blocks
[i
].is_bad
== -1)
683 nand_build_bbt(nand
, i
, last_block
);
688 for (i
= first_block
; i
<= last_block
; i
++)
690 /* Send erase setup command */
691 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
693 page
= i
* (nand
->erase_size
/ nand
->page_size
);
695 /* Send page address */
696 if (nand
->page_size
<= 512)
699 nand
->controller
->address(nand
, page
& 0xff);
700 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
702 /* 3rd cycle only on devices with more than 32 MiB */
703 if (nand
->address_cycles
>= 4)
704 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
706 /* 4th cycle only on devices with more than 8 GiB */
707 if (nand
->address_cycles
>= 5)
708 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
713 nand
->controller
->address(nand
, page
& 0xff);
714 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
716 /* 3rd cycle only on devices with more than 128 MiB */
717 if (nand
->address_cycles
>= 5)
718 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
721 /* Send erase confirm command */
722 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
724 retval
= nand
->controller
->nand_ready
?
725 nand
->controller
->nand_ready(nand
, 1000) :
726 nand_poll_ready(nand
, 1000);
728 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
729 return ERROR_NAND_OPERATION_TIMEOUT
;
732 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
734 LOG_ERROR("couldn't read status");
735 return ERROR_NAND_OPERATION_FAILED
;
740 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
741 (nand
->blocks
[i
].is_bad
== 1)
744 /* continue; other blocks might still be erasable */
747 nand
->blocks
[i
].is_erased
= 1;
754 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
759 return ERROR_NAND_DEVICE_NOT_PROBED
;
761 if (address
% nand
->page_size
)
763 LOG_ERROR("reads need to be page aligned");
764 return ERROR_NAND_OPERATION_FAILED
;
767 page
= malloc(nand
->page_size
);
769 while (data_size
> 0)
771 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
772 uint32_t page_address
;
775 page_address
= address
/ nand
->page_size
;
777 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
779 memcpy(data
, page
, thisrun_size
);
781 address
+= thisrun_size
;
782 data
+= thisrun_size
;
783 data_size
-= thisrun_size
;
791 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
796 return ERROR_NAND_DEVICE_NOT_PROBED
;
798 if (address
% nand
->page_size
)
800 LOG_ERROR("writes need to be page aligned");
801 return ERROR_NAND_OPERATION_FAILED
;
804 page
= malloc(nand
->page_size
);
806 while (data_size
> 0)
808 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
809 uint32_t page_address
;
811 memset(page
, 0xff, nand
->page_size
);
812 memcpy(page
, data
, thisrun_size
);
814 page_address
= address
/ nand
->page_size
;
816 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
818 address
+= thisrun_size
;
819 data
+= thisrun_size
;
820 data_size
-= thisrun_size
;
829 int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
834 return ERROR_NAND_DEVICE_NOT_PROBED
;
836 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
837 if (nand
->blocks
[block
].is_erased
== 1)
838 nand
->blocks
[block
].is_erased
= 0;
840 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
841 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
843 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
846 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
849 return ERROR_NAND_DEVICE_NOT_PROBED
;
851 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
852 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
854 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
857 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
862 return ERROR_NAND_DEVICE_NOT_PROBED
;
864 if (nand
->page_size
<= 512)
866 /* small page device */
868 nand
->controller
->command(nand
, NAND_CMD_READ0
);
870 nand
->controller
->command(nand
, NAND_CMD_READOOB
);
872 /* column (always 0, we start at the beginning of a page/OOB area) */
873 nand
->controller
->address(nand
, 0x0);
876 nand
->controller
->address(nand
, page
& 0xff);
877 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
879 /* 4th cycle only on devices with more than 32 MiB */
880 if (nand
->address_cycles
>= 4)
881 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
883 /* 5th cycle only on devices with more than 8 GiB */
884 if (nand
->address_cycles
>= 5)
885 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
889 /* large page device */
890 nand
->controller
->command(nand
, NAND_CMD_READ0
);
892 /* column (0 when we start at the beginning of a page,
893 * or 2048 for the beginning of OOB area)
895 nand
->controller
->address(nand
, 0x0);
897 nand
->controller
->address(nand
, 0x0);
899 nand
->controller
->address(nand
, 0x8);
902 nand
->controller
->address(nand
, page
& 0xff);
903 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
905 /* 5th cycle only on devices with more than 128 MiB */
906 if (nand
->address_cycles
>= 5)
907 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
909 /* large page devices need a start command */
910 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
913 if (nand
->controller
->nand_ready
) {
914 if (!nand
->controller
->nand_ready(nand
, 100))
915 return ERROR_NAND_OPERATION_TIMEOUT
;
922 if (nand
->controller
->read_block_data
!= NULL
)
923 (nand
->controller
->read_block_data
)(nand
, data
, data_size
);
926 for (i
= 0; i
< data_size
;)
928 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
930 nand
->controller
->read_data(nand
, data
);
936 nand
->controller
->read_data(nand
, data
);
946 if (nand
->controller
->read_block_data
!= NULL
)
947 (nand
->controller
->read_block_data
)(nand
, oob
, oob_size
);
950 for (i
= 0; i
< oob_size
;)
952 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
954 nand
->controller
->read_data(nand
, oob
);
960 nand
->controller
->read_data(nand
, oob
);
971 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
978 return ERROR_NAND_DEVICE_NOT_PROBED
;
980 nand
->controller
->command(nand
, NAND_CMD_SEQIN
);
982 if (nand
->page_size
<= 512)
984 /* column (always 0, we start at the beginning of a page/OOB area) */
985 nand
->controller
->address(nand
, 0x0);
988 nand
->controller
->address(nand
, page
& 0xff);
989 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
991 /* 4th cycle only on devices with more than 32 MiB */
992 if (nand
->address_cycles
>= 4)
993 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
995 /* 5th cycle only on devices with more than 8 GiB */
996 if (nand
->address_cycles
>= 5)
997 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
1001 /* column (0 when we start at the beginning of a page,
1002 * or 2048 for the beginning of OOB area)
1004 nand
->controller
->address(nand
, 0x0);
1006 nand
->controller
->address(nand
, 0x0);
1008 nand
->controller
->address(nand
, 0x8);
1011 nand
->controller
->address(nand
, page
& 0xff);
1012 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
1014 /* 5th cycle only on devices with more than 128 MiB */
1015 if (nand
->address_cycles
>= 5)
1016 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1021 if (nand
->controller
->write_block_data
!= NULL
)
1022 (nand
->controller
->write_block_data
)(nand
, data
, data_size
);
1025 for (i
= 0; i
< data_size
;)
1027 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1029 uint16_t data_buf
= le_to_h_u16(data
);
1030 nand
->controller
->write_data(nand
, data_buf
);
1036 nand
->controller
->write_data(nand
, *data
);
1046 if (nand
->controller
->write_block_data
!= NULL
)
1047 (nand
->controller
->write_block_data
)(nand
, oob
, oob_size
);
1050 for (i
= 0; i
< oob_size
;)
1052 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1054 uint16_t oob_buf
= le_to_h_u16(data
);
1055 nand
->controller
->write_data(nand
, oob_buf
);
1061 nand
->controller
->write_data(nand
, *oob
);
1069 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
1071 retval
= nand
->controller
->nand_ready
?
1072 nand
->controller
->nand_ready(nand
, 100) :
1073 nand_poll_ready(nand
, 100);
1075 return ERROR_NAND_OPERATION_TIMEOUT
;
1077 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
1079 LOG_ERROR("couldn't read status");
1080 return ERROR_NAND_OPERATION_FAILED
;
1083 if (status
& NAND_STATUS_FAIL
)
1085 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1086 return ERROR_NAND_OPERATION_FAILED
;
1092 COMMAND_HANDLER(handle_nand_list_command
)
1094 struct nand_device
*p
;
1099 command_print(CMD_CTX
, "no NAND flash devices configured");
1103 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1106 command_print(CMD_CTX
, "#%i: %s (%s) "
1107 "pagesize: %i, buswidth: %i,\n\t"
1108 "blocksize: %i, blocks: %i",
1109 i
, p
->device
->name
, p
->manufacturer
->name
,
1110 p
->page_size
, p
->bus_width
,
1111 p
->erase_size
, p
->num_blocks
);
1113 command_print(CMD_CTX
, "#%i: not probed", i
);
1119 COMMAND_HANDLER(handle_nand_info_command
)
1128 return ERROR_COMMAND_SYNTAX_ERROR
;
1134 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], i
);
1139 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], first
);
1140 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], last
);
1144 struct nand_device
*p
;
1145 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1146 if (ERROR_OK
!= retval
)
1149 if (NULL
== p
->device
)
1151 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1155 if (first
>= p
->num_blocks
)
1156 first
= p
->num_blocks
- 1;
1158 if (last
>= p
->num_blocks
)
1159 last
= p
->num_blocks
- 1;
1161 command_print(CMD_CTX
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1162 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1164 for (j
= first
; j
<= last
; j
++)
1166 char *erase_state
, *bad_state
;
1168 if (p
->blocks
[j
].is_erased
== 0)
1169 erase_state
= "not erased";
1170 else if (p
->blocks
[j
].is_erased
== 1)
1171 erase_state
= "erased";
1173 erase_state
= "erase state unknown";
1175 if (p
->blocks
[j
].is_bad
== 0)
1177 else if (p
->blocks
[j
].is_bad
== 1)
1178 bad_state
= " (marked bad)";
1180 bad_state
= " (block condition unknown)";
1182 command_print(CMD_CTX
,
1183 "\t#%i: 0x%8.8" PRIx32
" (%" PRId32
"kB) %s%s",
1185 p
->blocks
[j
].offset
,
1186 p
->blocks
[j
].size
/ 1024,
1194 COMMAND_HANDLER(handle_nand_probe_command
)
1198 return ERROR_COMMAND_SYNTAX_ERROR
;
1201 struct nand_device
*p
;
1202 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1203 if (ERROR_OK
!= retval
)
1206 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1208 command_print(CMD_CTX
, "NAND flash device '%s' found", p
->device
->name
);
1210 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1212 command_print(CMD_CTX
, "probing failed for NAND flash device");
1216 command_print(CMD_CTX
, "unknown error when probing NAND flash device");
1222 COMMAND_HANDLER(handle_nand_erase_command
)
1224 if (CMD_ARGC
!= 1 && CMD_ARGC
!= 3)
1226 return ERROR_COMMAND_SYNTAX_ERROR
;
1230 struct nand_device
*p
;
1231 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1232 if (ERROR_OK
!= retval
)
1235 unsigned long offset
;
1236 unsigned long length
;
1238 /* erase specified part of the chip; or else everything */
1239 if (CMD_ARGC
== 3) {
1240 unsigned long size
= p
->erase_size
* p
->num_blocks
;
1242 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1243 if ((offset
% p
->erase_size
) != 0 || offset
>= size
)
1244 return ERROR_INVALID_ARGUMENTS
;
1246 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1247 if ((length
== 0) || (length
% p
->erase_size
) != 0
1248 || (length
+ offset
) > size
)
1249 return ERROR_INVALID_ARGUMENTS
;
1251 offset
/= p
->erase_size
;
1252 length
/= p
->erase_size
;
1255 length
= p
->num_blocks
;
1258 retval
= nand_erase(p
, offset
, offset
+ length
- 1);
1259 if (retval
== ERROR_OK
)
1261 command_print(CMD_CTX
, "erased blocks %lu to %lu "
1262 "on NAND flash device #%s '%s'",
1263 offset
, offset
+ length
,
1264 CMD_ARGV
[0], p
->device
->name
);
1266 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1268 command_print(CMD_CTX
, "erase failed");
1272 command_print(CMD_CTX
, "unknown error when erasing NAND flash device");
1278 COMMAND_HANDLER(handle_nand_check_bad_blocks_command
)
1283 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 3) || (CMD_ARGC
== 2))
1285 return ERROR_COMMAND_SYNTAX_ERROR
;
1289 struct nand_device
*p
;
1290 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1291 if (ERROR_OK
!= retval
)
1296 unsigned long offset
;
1297 unsigned long length
;
1299 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1300 if (offset
% p
->erase_size
)
1301 return ERROR_INVALID_ARGUMENTS
;
1302 offset
/= p
->erase_size
;
1304 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1305 if (length
% p
->erase_size
)
1306 return ERROR_INVALID_ARGUMENTS
;
1309 length
/= p
->erase_size
;
1312 last
= offset
+ length
;
1315 retval
= nand_build_bbt(p
, first
, last
);
1316 if (retval
== ERROR_OK
)
1318 command_print(CMD_CTX
, "checked NAND flash device for bad blocks, "
1319 "use \"nand info\" command to list blocks");
1321 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1323 command_print(CMD_CTX
, "error when checking for bad blocks on "
1324 "NAND flash device");
1328 command_print(CMD_CTX
, "unknown error when checking for bad "
1329 "blocks on NAND flash device");
1335 struct nand_fileio_state
{
1342 enum oob_formats oob_format
;
1349 struct fileio fileio
;
1351 struct duration bench
;
1354 static void nand_fileio_init(struct nand_fileio_state
*state
)
1356 memset(state
, 0, sizeof(*state
));
1357 state
->oob_format
= NAND_OOB_NONE
;
1360 static int nand_fileio_start(struct command_context
*cmd_ctx
,
1361 struct nand_device
*nand
, const char *filename
, int filemode
,
1362 struct nand_fileio_state
*state
)
1364 if (state
->address
% nand
->page_size
)
1366 command_print(cmd_ctx
, "only page-aligned addresses are supported");
1367 return ERROR_COMMAND_SYNTAX_ERROR
;
1370 duration_start(&state
->bench
);
1372 if (NULL
!= filename
)
1374 int retval
= fileio_open(&state
->fileio
, filename
, filemode
, FILEIO_BINARY
);
1375 if (ERROR_OK
!= retval
)
1377 const char *msg
= (FILEIO_READ
== filemode
) ? "read" : "write";
1378 command_print(cmd_ctx
, "failed to open '%s' for %s access",
1382 state
->file_opened
= true;
1385 if (!(state
->oob_format
& NAND_OOB_ONLY
))
1387 state
->page_size
= nand
->page_size
;
1388 state
->page
= malloc(nand
->page_size
);
1391 if (state
->oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1393 if (nand
->page_size
== 512)
1395 state
->oob_size
= 16;
1396 state
->eccpos
= nand_oob_16
.eccpos
;
1398 else if (nand
->page_size
== 2048)
1400 state
->oob_size
= 64;
1401 state
->eccpos
= nand_oob_64
.eccpos
;
1403 state
->oob
= malloc(state
->oob_size
);
1408 static int nand_fileio_cleanup(struct nand_fileio_state
*state
)
1410 if (state
->file_opened
)
1411 fileio_close(&state
->fileio
);
1425 static int nand_fileio_finish(struct nand_fileio_state
*state
)
1427 nand_fileio_cleanup(state
);
1428 return duration_measure(&state
->bench
);
1431 static COMMAND_HELPER(nand_fileio_parse_args
, struct nand_fileio_state
*state
,
1432 struct nand_device
**dev
, enum fileio_access filemode
,
1433 bool need_size
, bool sw_ecc
)
1435 nand_fileio_init(state
);
1437 unsigned minargs
= need_size
? 4 : 3;
1438 if (CMD_ARGC
< minargs
)
1439 return ERROR_COMMAND_SYNTAX_ERROR
;
1441 struct nand_device
*nand
;
1442 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &nand
);
1443 if (ERROR_OK
!= retval
)
1446 if (NULL
== nand
->device
)
1448 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1452 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], state
->address
);
1455 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[3], state
->size
);
1456 if (state
->size
% nand
->page_size
)
1458 command_print(CMD_CTX
, "only page-aligned sizes are supported");
1459 return ERROR_COMMAND_SYNTAX_ERROR
;
1463 if (CMD_ARGC
> minargs
)
1465 for (unsigned i
= minargs
; i
< CMD_ARGC
; i
++)
1467 if (!strcmp(CMD_ARGV
[i
], "oob_raw"))
1468 state
->oob_format
|= NAND_OOB_RAW
;
1469 else if (!strcmp(CMD_ARGV
[i
], "oob_only"))
1470 state
->oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1471 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc"))
1472 state
->oob_format
|= NAND_OOB_SW_ECC
;
1473 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc_kw"))
1474 state
->oob_format
|= NAND_OOB_SW_ECC_KW
;
1477 command_print(CMD_CTX
, "unknown option: %s", CMD_ARGV
[i
]);
1478 return ERROR_COMMAND_SYNTAX_ERROR
;
1483 retval
= nand_fileio_start(CMD_CTX
, nand
, CMD_ARGV
[1], filemode
, state
);
1484 if (ERROR_OK
!= retval
)
1488 state
->size
= state
->fileio
.size
;
1496 * @returns If no error occurred, returns number of bytes consumed;
1497 * otherwise, returns a negative error code.)
1499 static int nand_fileio_read(struct nand_device
*nand
,
1500 struct nand_fileio_state
*s
)
1502 size_t total_read
= 0;
1505 if (NULL
!= s
->page
)
1507 fileio_read(&s
->fileio
, s
->page_size
, s
->page
, &one_read
);
1508 if (one_read
< s
->page_size
)
1509 memset(s
->page
+ one_read
, 0xff, s
->page_size
- one_read
);
1510 total_read
+= one_read
;
1513 if (s
->oob_format
& NAND_OOB_SW_ECC
)
1516 memset(s
->oob
, 0xff, s
->oob_size
);
1517 for (uint32_t i
= 0, j
= 0; i
< s
->page_size
; i
+= 256)
1519 nand_calculate_ecc(nand
, s
->page
+ i
, ecc
);
1520 s
->oob
[s
->eccpos
[j
++]] = ecc
[0];
1521 s
->oob
[s
->eccpos
[j
++]] = ecc
[1];
1522 s
->oob
[s
->eccpos
[j
++]] = ecc
[2];
1525 else if (s
->oob_format
& NAND_OOB_SW_ECC_KW
)
1528 * In this case eccpos is not used as
1529 * the ECC data is always stored contigously
1530 * at the end of the OOB area. It consists
1531 * of 10 bytes per 512-byte data block.
1533 uint8_t *ecc
= s
->oob
+ s
->oob_size
- s
->page_size
/ 512 * 10;
1534 memset(s
->oob
, 0xff, s
->oob_size
);
1535 for (uint32_t i
= 0; i
< s
->page_size
; i
+= 512)
1537 nand_calculate_ecc_kw(nand
, s
->page
+ i
, ecc
);
1541 else if (NULL
!= s
->oob
)
1543 fileio_read(&s
->fileio
, s
->oob_size
, s
->oob
, &one_read
);
1544 if (one_read
< s
->oob_size
)
1545 memset(s
->oob
+ one_read
, 0xff, s
->oob_size
- one_read
);
1546 total_read
+= one_read
;
1551 COMMAND_HANDLER(handle_nand_write_command
)
1553 struct nand_device
*nand
= NULL
;
1554 struct nand_fileio_state s
;
1555 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1556 &s
, &nand
, FILEIO_READ
, false, true);
1557 if (ERROR_OK
!= retval
)
1560 uint32_t total_bytes
= s
.size
;
1563 int bytes_read
= nand_fileio_read(nand
, &s
);
1564 if (bytes_read
<= 0)
1566 command_print(CMD_CTX
, "error while reading file");
1567 return nand_fileio_cleanup(&s
);
1569 s
.size
-= bytes_read
;
1571 retval
= nand_write_page(nand
, s
.address
/ nand
->page_size
,
1572 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1573 if (ERROR_OK
!= retval
)
1575 command_print(CMD_CTX
, "failed writing file %s "
1576 "to NAND flash %s at offset 0x%8.8" PRIx32
,
1577 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
);
1578 return nand_fileio_cleanup(&s
);
1580 s
.address
+= s
.page_size
;
1583 if (nand_fileio_finish(&s
))
1585 command_print(CMD_CTX
, "wrote file %s to NAND flash %s up to "
1586 "offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1587 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
, duration_elapsed(&s
.bench
),
1588 duration_kbps(&s
.bench
, total_bytes
));
1593 COMMAND_HANDLER(handle_nand_verify_command
)
1595 struct nand_device
*nand
= NULL
;
1596 struct nand_fileio_state file
;
1597 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1598 &file
, &nand
, FILEIO_READ
, false, true);
1599 if (ERROR_OK
!= retval
)
1602 struct nand_fileio_state dev
;
1603 nand_fileio_init(&dev
);
1604 dev
.address
= file
.address
;
1605 dev
.size
= file
.size
;
1606 dev
.oob_format
= file
.oob_format
;
1607 retval
= nand_fileio_start(CMD_CTX
, nand
, NULL
, FILEIO_NONE
, &dev
);
1608 if (ERROR_OK
!= retval
)
1611 while (file
.size
> 0)
1613 int retval
= nand_read_page(nand
, dev
.address
/ dev
.page_size
,
1614 dev
.page
, dev
.page_size
, dev
.oob
, dev
.oob_size
);
1615 if (ERROR_OK
!= retval
)
1617 command_print(CMD_CTX
, "reading NAND flash page failed");
1618 nand_fileio_cleanup(&dev
);
1619 return nand_fileio_cleanup(&file
);
1622 int bytes_read
= nand_fileio_read(nand
, &file
);
1623 if (bytes_read
<= 0)
1625 command_print(CMD_CTX
, "error while reading file");
1626 nand_fileio_cleanup(&dev
);
1627 return nand_fileio_cleanup(&file
);
1630 if ((dev
.page
&& memcmp(dev
.page
, file
.page
, dev
.page_size
)) ||
1631 (dev
.oob
&& memcmp(dev
.oob
, file
.oob
, dev
.oob_size
)) )
1633 command_print(CMD_CTX
, "NAND flash contents differ "
1634 "at 0x%8.8" PRIx32
, dev
.address
);
1635 nand_fileio_cleanup(&dev
);
1636 return nand_fileio_cleanup(&file
);
1639 file
.size
-= bytes_read
;
1640 dev
.address
+= nand
->page_size
;
1643 if (nand_fileio_finish(&file
) == ERROR_OK
)
1645 command_print(CMD_CTX
, "verified file %s in NAND flash %s "
1646 "up to offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1647 CMD_ARGV
[1], CMD_ARGV
[0], dev
.address
, duration_elapsed(&file
.bench
),
1648 duration_kbps(&file
.bench
, dev
.size
));
1651 return nand_fileio_cleanup(&dev
);
1654 COMMAND_HANDLER(handle_nand_dump_command
)
1656 struct nand_device
*nand
= NULL
;
1657 struct nand_fileio_state s
;
1658 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1659 &s
, &nand
, FILEIO_WRITE
, true, false);
1660 if (ERROR_OK
!= retval
)
1665 size_t size_written
;
1666 int retval
= nand_read_page(nand
, s
.address
/ nand
->page_size
,
1667 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1668 if (ERROR_OK
!= retval
)
1670 command_print(CMD_CTX
, "reading NAND flash page failed");
1671 return nand_fileio_cleanup(&s
);
1675 fileio_write(&s
.fileio
, s
.page_size
, s
.page
, &size_written
);
1678 fileio_write(&s
.fileio
, s
.oob_size
, s
.oob
, &size_written
);
1680 s
.size
-= nand
->page_size
;
1681 s
.address
+= nand
->page_size
;
1684 if (nand_fileio_finish(&s
) == ERROR_OK
)
1686 command_print(CMD_CTX
, "dumped %zu bytes in %fs (%0.3f kb/s)",
1687 s
.fileio
.size
, duration_elapsed(&s
.bench
),
1688 duration_kbps(&s
.bench
, s
.fileio
.size
));
1693 COMMAND_HANDLER(handle_nand_raw_access_command
)
1695 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 2))
1697 return ERROR_COMMAND_SYNTAX_ERROR
;
1700 struct nand_device
*p
;
1701 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1702 if (ERROR_OK
!= retval
)
1705 if (NULL
== p
->device
)
1707 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1712 COMMAND_PARSE_ENABLE(CMD_ARGV
[1], p
->use_raw
);
1714 const char *msg
= p
->use_raw
? "enabled" : "disabled";
1715 command_print(CMD_CTX
, "raw access is %s", msg
);
1720 static const struct command_registration nand_exec_command_handlers
[] = {
1723 .handler
= &handle_nand_list_command
,
1724 .mode
= COMMAND_EXEC
,
1725 .help
= "list configured NAND flash devices",
1729 .handler
= &handle_nand_info_command
,
1730 .mode
= COMMAND_EXEC
,
1732 .help
= "print info about a NAND flash device",
1736 .handler
= &handle_nand_probe_command
,
1737 .mode
= COMMAND_EXEC
,
1739 .help
= "identify NAND flash device <num>",
1743 .name
= "check_bad_blocks",
1744 .handler
= &handle_nand_check_bad_blocks_command
,
1745 .mode
= COMMAND_EXEC
,
1746 .usage
= "<bank> [<offset> <length>]",
1747 .help
= "check NAND flash device <num> for bad blocks",
1751 .handler
= &handle_nand_erase_command
,
1752 .mode
= COMMAND_EXEC
,
1753 .usage
= "<bank> [<offset> <length>]",
1754 .help
= "erase blocks on NAND flash device",
1758 .handler
= &handle_nand_dump_command
,
1759 .mode
= COMMAND_EXEC
,
1760 .usage
= "<bank> <filename> <offset> <length> "
1761 "[oob_raw | oob_only]",
1762 .help
= "dump from NAND flash device",
1766 .handler
= &handle_nand_verify_command
,
1767 .mode
= COMMAND_EXEC
,
1768 .usage
= "<bank> <filename> <offset> "
1769 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1770 .help
= "verify NAND flash device",
1774 .handler
= &handle_nand_write_command
,
1775 .mode
= COMMAND_EXEC
,
1776 .usage
= "<bank> <filename> <offset> "
1777 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1778 .help
= "write to NAND flash device",
1781 .name
= "raw_access",
1782 .handler
= &handle_nand_raw_access_command
,
1783 .mode
= COMMAND_EXEC
,
1784 .usage
= "<num> ['enable'|'disable']",
1785 .help
= "raw access to NAND flash device",
1787 COMMAND_REGISTRATION_DONE
1790 int nand_init(struct command_context
*cmd_ctx
)
1794 struct command
*parent
= command_find_in_context(cmd_ctx
, "nand");
1795 return register_commands(cmd_ctx
, parent
, nand_exec_command_handlers
);