1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "time_support.h"
30 #include <helper/fileio.h>
32 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
35 static int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 /* NAND flash controller
39 extern struct nand_flash_controller nonce_nand_controller
;
40 extern struct nand_flash_controller davinci_nand_controller
;
41 extern struct nand_flash_controller lpc3180_nand_controller
;
42 extern struct nand_flash_controller orion_nand_controller
;
43 extern struct nand_flash_controller s3c2410_nand_controller
;
44 extern struct nand_flash_controller s3c2412_nand_controller
;
45 extern struct nand_flash_controller s3c2440_nand_controller
;
46 extern struct nand_flash_controller s3c2443_nand_controller
;
47 extern struct nand_flash_controller imx31_nand_flash_controller
;
49 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
51 static struct nand_flash_controller
*nand_flash_controllers
[] =
53 &nonce_nand_controller
,
54 &davinci_nand_controller
,
55 &lpc3180_nand_controller
,
56 &orion_nand_controller
,
57 &s3c2410_nand_controller
,
58 &s3c2412_nand_controller
,
59 &s3c2440_nand_controller
,
60 &s3c2443_nand_controller
,
61 &imx31_nand_flash_controller
,
62 /* &boundary_scan_nand_controller, */
66 /* configured NAND devices and NAND Flash command handler */
67 static struct nand_device
*nand_devices
= NULL
;
71 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
74 * Pagesize; 0, 256, 512
75 * 0 get this information from the extended chip ID
76 * 256 256 Byte page size
77 * 512 512 Byte page size
79 static struct nand_info nand_flash_ids
[] =
81 /* start "museum" IDs */
82 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
83 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
84 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
85 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
86 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
87 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
88 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
89 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
90 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
91 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
93 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
94 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
95 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
96 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
97 /* end "museum" IDs */
99 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
100 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
101 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
102 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
104 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
105 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
106 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
107 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
109 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
110 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
111 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
114 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
115 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
116 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
117 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
118 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
120 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
122 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
124 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
125 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
126 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
127 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
129 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
130 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
131 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
132 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
134 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
135 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
136 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
137 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
139 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
140 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
141 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
142 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
144 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
145 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
146 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
147 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
149 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
150 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
151 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
152 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
154 {NULL
, 0, 0, 0, 0, 0 }
157 /* Manufacturer ID list
159 static struct nand_manufacturer nand_manuf_ids
[] =
162 {NAND_MFR_TOSHIBA
, "Toshiba"},
163 {NAND_MFR_SAMSUNG
, "Samsung"},
164 {NAND_MFR_FUJITSU
, "Fujitsu"},
165 {NAND_MFR_NATIONAL
, "National"},
166 {NAND_MFR_RENESAS
, "Renesas"},
167 {NAND_MFR_STMICRO
, "ST Micro"},
168 {NAND_MFR_HYNIX
, "Hynix"},
169 {NAND_MFR_MICRON
, "Micron"},
174 * Define default oob placement schemes for large and small page devices
178 static struct nand_ecclayout nand_oob_8
= {
189 static struct nand_ecclayout nand_oob_16
= {
191 .eccpos
= {0, 1, 2, 3, 6, 7},
197 static struct nand_ecclayout nand_oob_64
= {
200 40, 41, 42, 43, 44, 45, 46, 47,
201 48, 49, 50, 51, 52, 53, 54, 55,
202 56, 57, 58, 59, 60, 61, 62, 63},
208 COMMAND_HANDLER(handle_nand_list_drivers
)
210 command_print(CMD_CTX
, "Available NAND flash controller drivers:");
211 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
212 command_print(CMD_CTX
, " %s", nand_flash_controllers
[i
]->name
);
216 static COMMAND_HELPER(create_nand_device
, const char *bank_name
,
217 struct nand_flash_controller
*controller
)
219 if (NULL
!= controller
->commands
)
221 int retval
= register_commands(CMD_CTX
, NULL
,
222 controller
->commands
);
223 if (ERROR_OK
!= retval
)
226 struct nand_device
*c
= malloc(sizeof(struct nand_device
));
228 c
->name
= strdup(bank_name
);
229 c
->controller
= controller
;
230 c
->controller_priv
= NULL
;
231 c
->manufacturer
= NULL
;
234 c
->address_cycles
= 0;
239 int retval
= CALL_COMMAND_HANDLER(controller
->nand_device_command
, c
);
240 if (ERROR_OK
!= retval
)
242 LOG_ERROR("'%s' driver rejected nand flash", controller
->name
);
248 struct nand_device
*p
= nand_devices
;
249 while (p
&& p
->next
) p
= p
->next
;
257 COMMAND_HANDLER(handle_nand_device_command
)
261 LOG_ERROR("incomplete nand device configuration");
262 return ERROR_FLASH_BANK_INVALID
;
265 // save name and increment (for compatibility) with drivers
266 const char *bank_name
= *CMD_ARGV
++;
269 const char *driver_name
= CMD_ARGV
[0];
270 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
272 struct nand_flash_controller
*controller
= nand_flash_controllers
[i
];
273 if (strcmp(driver_name
, controller
->name
) != 0)
276 return CALL_COMMAND_HANDLER(create_nand_device
,
277 bank_name
, controller
);
280 LOG_ERROR("No valid NAND flash driver found (%s)", driver_name
);
281 return CALL_COMMAND_HANDLER(handle_nand_list_drivers
);
285 COMMAND_HANDLER(handle_nand_init_command
);
287 static const struct command_registration nand_config_command_handlers
[] = {
290 .handler
= &handle_nand_device_command
,
291 .mode
= COMMAND_CONFIG
,
292 .help
= "defines a new NAND bank",
296 .handler
= &handle_nand_list_drivers
,
298 .help
= "lists available NAND drivers",
302 .mode
= COMMAND_CONFIG
,
303 .handler
= &handle_nand_init_command
,
304 .help
= "initialize NAND devices",
306 COMMAND_REGISTRATION_DONE
308 static const struct command_registration nand_command_handlers
[] = {
312 .help
= "NAND flash command group",
313 .chain
= nand_config_command_handlers
,
315 COMMAND_REGISTRATION_DONE
318 int nand_register_commands(struct command_context
*cmd_ctx
)
320 return register_commands(cmd_ctx
, NULL
, nand_command_handlers
);
323 struct nand_device
*get_nand_device_by_name(const char *name
)
325 unsigned requested
= get_flash_name_index(name
);
328 struct nand_device
*nand
;
329 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
331 if (strcmp(nand
->name
, name
) == 0)
333 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
335 if (++found
< requested
)
342 struct nand_device
*get_nand_device_by_num(int num
)
344 struct nand_device
*p
;
347 for (p
= nand_devices
; p
; p
= p
->next
)
358 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
359 struct nand_device
**nand
)
361 const char *str
= CMD_ARGV
[name_index
];
362 *nand
= get_nand_device_by_name(str
);
367 COMMAND_PARSE_NUMBER(uint
, str
, num
);
368 *nand
= get_nand_device_by_num(num
);
370 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
371 return ERROR_INVALID_ARGUMENTS
;
376 static int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
382 if ((first
< 0) || (first
>= nand
->num_blocks
))
385 if ((last
>= nand
->num_blocks
) || (last
== -1))
386 last
= nand
->num_blocks
- 1;
388 for (i
= first
; i
< last
; i
++)
390 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
392 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
393 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
394 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
396 LOG_WARNING("bad block: %i", i
);
397 nand
->blocks
[i
].is_bad
= 1;
401 nand
->blocks
[i
].is_bad
= 0;
404 page
+= (nand
->erase_size
/ nand
->page_size
);
410 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
413 return ERROR_NAND_DEVICE_NOT_PROBED
;
415 /* Send read status command */
416 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
421 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
424 nand
->controller
->read_data(nand
, &data
);
425 *status
= data
& 0xff;
429 nand
->controller
->read_data(nand
, status
);
435 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
439 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
441 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
443 nand
->controller
->read_data(nand
, &data
);
444 status
= data
& 0xff;
446 nand
->controller
->read_data(nand
, &status
);
448 if (status
& NAND_STATUS_READY
)
453 return (status
& NAND_STATUS_READY
) != 0;
456 int nand_probe(struct nand_device
*nand
)
458 uint8_t manufacturer_id
, device_id
;
463 /* clear device data */
465 nand
->manufacturer
= NULL
;
467 /* clear device parameters */
469 nand
->address_cycles
= 0;
471 nand
->erase_size
= 0;
473 /* initialize controller (device parameters are zero, use controller default) */
474 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
478 case ERROR_NAND_OPERATION_FAILED
:
479 LOG_DEBUG("controller initialization failed");
480 return ERROR_NAND_OPERATION_FAILED
;
481 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
482 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
483 return ERROR_NAND_OPERATION_FAILED
;
485 LOG_ERROR("BUG: unknown controller initialization failure");
486 return ERROR_NAND_OPERATION_FAILED
;
490 nand
->controller
->command(nand
, NAND_CMD_RESET
);
491 nand
->controller
->reset(nand
);
493 nand
->controller
->command(nand
, NAND_CMD_READID
);
494 nand
->controller
->address(nand
, 0x0);
496 if (nand
->bus_width
== 8)
498 nand
->controller
->read_data(nand
, &manufacturer_id
);
499 nand
->controller
->read_data(nand
, &device_id
);
504 nand
->controller
->read_data(nand
, &data_buf
);
505 manufacturer_id
= data_buf
& 0xff;
506 nand
->controller
->read_data(nand
, &data_buf
);
507 device_id
= data_buf
& 0xff;
510 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
512 if (nand_flash_ids
[i
].id
== device_id
)
514 nand
->device
= &nand_flash_ids
[i
];
519 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
521 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
523 nand
->manufacturer
= &nand_manuf_ids
[i
];
528 if (!nand
->manufacturer
)
530 nand
->manufacturer
= &nand_manuf_ids
[0];
531 nand
->manufacturer
->id
= manufacturer_id
;
536 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
537 manufacturer_id
, device_id
);
538 return ERROR_NAND_OPERATION_FAILED
;
541 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
543 /* initialize device parameters */
546 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
547 nand
->bus_width
= 16;
551 /* Do we need extended device probe information? */
552 if (nand
->device
->page_size
== 0 ||
553 nand
->device
->erase_size
== 0)
555 if (nand
->bus_width
== 8)
557 nand
->controller
->read_data(nand
, id_buff
+ 3);
558 nand
->controller
->read_data(nand
, id_buff
+ 4);
559 nand
->controller
->read_data(nand
, id_buff
+ 5);
565 nand
->controller
->read_data(nand
, &data_buf
);
566 id_buff
[3] = data_buf
;
568 nand
->controller
->read_data(nand
, &data_buf
);
569 id_buff
[4] = data_buf
;
571 nand
->controller
->read_data(nand
, &data_buf
);
572 id_buff
[5] = data_buf
>> 8;
577 if (nand
->device
->page_size
== 0)
579 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
581 else if (nand
->device
->page_size
== 256)
583 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
584 return ERROR_NAND_OPERATION_FAILED
;
588 nand
->page_size
= nand
->device
->page_size
;
591 /* number of address cycles */
592 if (nand
->page_size
<= 512)
594 /* small page devices */
595 if (nand
->device
->chip_size
<= 32)
596 nand
->address_cycles
= 3;
597 else if (nand
->device
->chip_size
<= 8*1024)
598 nand
->address_cycles
= 4;
601 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
602 nand
->address_cycles
= 5;
607 /* large page devices */
608 if (nand
->device
->chip_size
<= 128)
609 nand
->address_cycles
= 4;
610 else if (nand
->device
->chip_size
<= 32*1024)
611 nand
->address_cycles
= 5;
614 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
615 nand
->address_cycles
= 6;
620 if (nand
->device
->erase_size
== 0)
622 switch ((id_buff
[4] >> 4) & 3) {
624 nand
->erase_size
= 64 << 10;
627 nand
->erase_size
= 128 << 10;
630 nand
->erase_size
= 256 << 10;
633 nand
->erase_size
=512 << 10;
639 nand
->erase_size
= nand
->device
->erase_size
;
642 /* initialize controller, but leave parameters at the controllers default */
643 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
647 case ERROR_NAND_OPERATION_FAILED
:
648 LOG_DEBUG("controller initialization failed");
649 return ERROR_NAND_OPERATION_FAILED
;
650 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
651 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
652 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
653 return ERROR_NAND_OPERATION_FAILED
;
655 LOG_ERROR("BUG: unknown controller initialization failure");
656 return ERROR_NAND_OPERATION_FAILED
;
660 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
661 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
663 for (i
= 0; i
< nand
->num_blocks
; i
++)
665 nand
->blocks
[i
].size
= nand
->erase_size
;
666 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
667 nand
->blocks
[i
].is_erased
= -1;
668 nand
->blocks
[i
].is_bad
= -1;
674 static int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
682 return ERROR_NAND_DEVICE_NOT_PROBED
;
684 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
685 return ERROR_INVALID_ARGUMENTS
;
687 /* make sure we know if a block is bad before erasing it */
688 for (i
= first_block
; i
<= last_block
; i
++)
690 if (nand
->blocks
[i
].is_bad
== -1)
692 nand_build_bbt(nand
, i
, last_block
);
697 for (i
= first_block
; i
<= last_block
; i
++)
699 /* Send erase setup command */
700 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
702 page
= i
* (nand
->erase_size
/ nand
->page_size
);
704 /* Send page address */
705 if (nand
->page_size
<= 512)
708 nand
->controller
->address(nand
, page
& 0xff);
709 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
711 /* 3rd cycle only on devices with more than 32 MiB */
712 if (nand
->address_cycles
>= 4)
713 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
715 /* 4th cycle only on devices with more than 8 GiB */
716 if (nand
->address_cycles
>= 5)
717 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
722 nand
->controller
->address(nand
, page
& 0xff);
723 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
725 /* 3rd cycle only on devices with more than 128 MiB */
726 if (nand
->address_cycles
>= 5)
727 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
730 /* Send erase confirm command */
731 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
733 retval
= nand
->controller
->nand_ready
?
734 nand
->controller
->nand_ready(nand
, 1000) :
735 nand_poll_ready(nand
, 1000);
737 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
738 return ERROR_NAND_OPERATION_TIMEOUT
;
741 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
743 LOG_ERROR("couldn't read status");
744 return ERROR_NAND_OPERATION_FAILED
;
749 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
750 (nand
->blocks
[i
].is_bad
== 1)
753 /* continue; other blocks might still be erasable */
756 nand
->blocks
[i
].is_erased
= 1;
763 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
768 return ERROR_NAND_DEVICE_NOT_PROBED
;
770 if (address
% nand
->page_size
)
772 LOG_ERROR("reads need to be page aligned");
773 return ERROR_NAND_OPERATION_FAILED
;
776 page
= malloc(nand
->page_size
);
778 while (data_size
> 0)
780 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
781 uint32_t page_address
;
784 page_address
= address
/ nand
->page_size
;
786 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
788 memcpy(data
, page
, thisrun_size
);
790 address
+= thisrun_size
;
791 data
+= thisrun_size
;
792 data_size
-= thisrun_size
;
800 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
805 return ERROR_NAND_DEVICE_NOT_PROBED
;
807 if (address
% nand
->page_size
)
809 LOG_ERROR("writes need to be page aligned");
810 return ERROR_NAND_OPERATION_FAILED
;
813 page
= malloc(nand
->page_size
);
815 while (data_size
> 0)
817 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
818 uint32_t page_address
;
820 memset(page
, 0xff, nand
->page_size
);
821 memcpy(page
, data
, thisrun_size
);
823 page_address
= address
/ nand
->page_size
;
825 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
827 address
+= thisrun_size
;
828 data
+= thisrun_size
;
829 data_size
-= thisrun_size
;
838 int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
843 return ERROR_NAND_DEVICE_NOT_PROBED
;
845 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
846 if (nand
->blocks
[block
].is_erased
== 1)
847 nand
->blocks
[block
].is_erased
= 0;
849 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
850 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
852 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
855 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
858 return ERROR_NAND_DEVICE_NOT_PROBED
;
860 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
861 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
863 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
866 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
871 return ERROR_NAND_DEVICE_NOT_PROBED
;
873 if (nand
->page_size
<= 512)
875 /* small page device */
877 nand
->controller
->command(nand
, NAND_CMD_READ0
);
879 nand
->controller
->command(nand
, NAND_CMD_READOOB
);
881 /* column (always 0, we start at the beginning of a page/OOB area) */
882 nand
->controller
->address(nand
, 0x0);
885 nand
->controller
->address(nand
, page
& 0xff);
886 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
888 /* 4th cycle only on devices with more than 32 MiB */
889 if (nand
->address_cycles
>= 4)
890 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
892 /* 5th cycle only on devices with more than 8 GiB */
893 if (nand
->address_cycles
>= 5)
894 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
898 /* large page device */
899 nand
->controller
->command(nand
, NAND_CMD_READ0
);
901 /* column (0 when we start at the beginning of a page,
902 * or 2048 for the beginning of OOB area)
904 nand
->controller
->address(nand
, 0x0);
906 nand
->controller
->address(nand
, 0x0);
908 nand
->controller
->address(nand
, 0x8);
911 nand
->controller
->address(nand
, page
& 0xff);
912 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
914 /* 5th cycle only on devices with more than 128 MiB */
915 if (nand
->address_cycles
>= 5)
916 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
918 /* large page devices need a start command */
919 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
922 if (nand
->controller
->nand_ready
) {
923 if (!nand
->controller
->nand_ready(nand
, 100))
924 return ERROR_NAND_OPERATION_TIMEOUT
;
931 if (nand
->controller
->read_block_data
!= NULL
)
932 (nand
->controller
->read_block_data
)(nand
, data
, data_size
);
935 for (i
= 0; i
< data_size
;)
937 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
939 nand
->controller
->read_data(nand
, data
);
945 nand
->controller
->read_data(nand
, data
);
955 if (nand
->controller
->read_block_data
!= NULL
)
956 (nand
->controller
->read_block_data
)(nand
, oob
, oob_size
);
959 for (i
= 0; i
< oob_size
;)
961 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
963 nand
->controller
->read_data(nand
, oob
);
969 nand
->controller
->read_data(nand
, oob
);
980 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
987 return ERROR_NAND_DEVICE_NOT_PROBED
;
989 nand
->controller
->command(nand
, NAND_CMD_SEQIN
);
991 if (nand
->page_size
<= 512)
993 /* column (always 0, we start at the beginning of a page/OOB area) */
994 nand
->controller
->address(nand
, 0x0);
997 nand
->controller
->address(nand
, page
& 0xff);
998 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
1000 /* 4th cycle only on devices with more than 32 MiB */
1001 if (nand
->address_cycles
>= 4)
1002 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1004 /* 5th cycle only on devices with more than 8 GiB */
1005 if (nand
->address_cycles
>= 5)
1006 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
1010 /* column (0 when we start at the beginning of a page,
1011 * or 2048 for the beginning of OOB area)
1013 nand
->controller
->address(nand
, 0x0);
1015 nand
->controller
->address(nand
, 0x0);
1017 nand
->controller
->address(nand
, 0x8);
1020 nand
->controller
->address(nand
, page
& 0xff);
1021 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
1023 /* 5th cycle only on devices with more than 128 MiB */
1024 if (nand
->address_cycles
>= 5)
1025 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1030 if (nand
->controller
->write_block_data
!= NULL
)
1031 (nand
->controller
->write_block_data
)(nand
, data
, data_size
);
1034 for (i
= 0; i
< data_size
;)
1036 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1038 uint16_t data_buf
= le_to_h_u16(data
);
1039 nand
->controller
->write_data(nand
, data_buf
);
1045 nand
->controller
->write_data(nand
, *data
);
1055 if (nand
->controller
->write_block_data
!= NULL
)
1056 (nand
->controller
->write_block_data
)(nand
, oob
, oob_size
);
1059 for (i
= 0; i
< oob_size
;)
1061 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1063 uint16_t oob_buf
= le_to_h_u16(data
);
1064 nand
->controller
->write_data(nand
, oob_buf
);
1070 nand
->controller
->write_data(nand
, *oob
);
1078 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
1080 retval
= nand
->controller
->nand_ready
?
1081 nand
->controller
->nand_ready(nand
, 100) :
1082 nand_poll_ready(nand
, 100);
1084 return ERROR_NAND_OPERATION_TIMEOUT
;
1086 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
1088 LOG_ERROR("couldn't read status");
1089 return ERROR_NAND_OPERATION_FAILED
;
1092 if (status
& NAND_STATUS_FAIL
)
1094 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1095 return ERROR_NAND_OPERATION_FAILED
;
1101 COMMAND_HANDLER(handle_nand_list_command
)
1103 struct nand_device
*p
;
1108 command_print(CMD_CTX
, "no NAND flash devices configured");
1112 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1115 command_print(CMD_CTX
, "#%i: %s (%s) "
1116 "pagesize: %i, buswidth: %i,\n\t"
1117 "blocksize: %i, blocks: %i",
1118 i
, p
->device
->name
, p
->manufacturer
->name
,
1119 p
->page_size
, p
->bus_width
,
1120 p
->erase_size
, p
->num_blocks
);
1122 command_print(CMD_CTX
, "#%i: not probed", i
);
1128 COMMAND_HANDLER(handle_nand_info_command
)
1137 return ERROR_COMMAND_SYNTAX_ERROR
;
1143 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], i
);
1148 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], first
);
1149 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], last
);
1153 struct nand_device
*p
;
1154 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1155 if (ERROR_OK
!= retval
)
1158 if (NULL
== p
->device
)
1160 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1164 if (first
>= p
->num_blocks
)
1165 first
= p
->num_blocks
- 1;
1167 if (last
>= p
->num_blocks
)
1168 last
= p
->num_blocks
- 1;
1170 command_print(CMD_CTX
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1171 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1173 for (j
= first
; j
<= last
; j
++)
1175 char *erase_state
, *bad_state
;
1177 if (p
->blocks
[j
].is_erased
== 0)
1178 erase_state
= "not erased";
1179 else if (p
->blocks
[j
].is_erased
== 1)
1180 erase_state
= "erased";
1182 erase_state
= "erase state unknown";
1184 if (p
->blocks
[j
].is_bad
== 0)
1186 else if (p
->blocks
[j
].is_bad
== 1)
1187 bad_state
= " (marked bad)";
1189 bad_state
= " (block condition unknown)";
1191 command_print(CMD_CTX
,
1192 "\t#%i: 0x%8.8" PRIx32
" (%" PRId32
"kB) %s%s",
1194 p
->blocks
[j
].offset
,
1195 p
->blocks
[j
].size
/ 1024,
1203 COMMAND_HANDLER(handle_nand_probe_command
)
1207 return ERROR_COMMAND_SYNTAX_ERROR
;
1210 struct nand_device
*p
;
1211 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1212 if (ERROR_OK
!= retval
)
1215 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1217 command_print(CMD_CTX
, "NAND flash device '%s' found", p
->device
->name
);
1219 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1221 command_print(CMD_CTX
, "probing failed for NAND flash device");
1225 command_print(CMD_CTX
, "unknown error when probing NAND flash device");
1231 COMMAND_HANDLER(handle_nand_erase_command
)
1233 if (CMD_ARGC
!= 1 && CMD_ARGC
!= 3)
1235 return ERROR_COMMAND_SYNTAX_ERROR
;
1239 struct nand_device
*p
;
1240 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1241 if (ERROR_OK
!= retval
)
1244 unsigned long offset
;
1245 unsigned long length
;
1247 /* erase specified part of the chip; or else everything */
1248 if (CMD_ARGC
== 3) {
1249 unsigned long size
= p
->erase_size
* p
->num_blocks
;
1251 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1252 if ((offset
% p
->erase_size
) != 0 || offset
>= size
)
1253 return ERROR_INVALID_ARGUMENTS
;
1255 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1256 if ((length
== 0) || (length
% p
->erase_size
) != 0
1257 || (length
+ offset
) > size
)
1258 return ERROR_INVALID_ARGUMENTS
;
1260 offset
/= p
->erase_size
;
1261 length
/= p
->erase_size
;
1264 length
= p
->num_blocks
;
1267 retval
= nand_erase(p
, offset
, offset
+ length
- 1);
1268 if (retval
== ERROR_OK
)
1270 command_print(CMD_CTX
, "erased blocks %lu to %lu "
1271 "on NAND flash device #%s '%s'",
1272 offset
, offset
+ length
,
1273 CMD_ARGV
[0], p
->device
->name
);
1275 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1277 command_print(CMD_CTX
, "erase failed");
1281 command_print(CMD_CTX
, "unknown error when erasing NAND flash device");
1287 COMMAND_HANDLER(handle_nand_check_bad_blocks_command
)
1292 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 3) || (CMD_ARGC
== 2))
1294 return ERROR_COMMAND_SYNTAX_ERROR
;
1298 struct nand_device
*p
;
1299 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1300 if (ERROR_OK
!= retval
)
1305 unsigned long offset
;
1306 unsigned long length
;
1308 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1309 if (offset
% p
->erase_size
)
1310 return ERROR_INVALID_ARGUMENTS
;
1311 offset
/= p
->erase_size
;
1313 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1314 if (length
% p
->erase_size
)
1315 return ERROR_INVALID_ARGUMENTS
;
1318 length
/= p
->erase_size
;
1321 last
= offset
+ length
;
1324 retval
= nand_build_bbt(p
, first
, last
);
1325 if (retval
== ERROR_OK
)
1327 command_print(CMD_CTX
, "checked NAND flash device for bad blocks, "
1328 "use \"nand info\" command to list blocks");
1330 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1332 command_print(CMD_CTX
, "error when checking for bad blocks on "
1333 "NAND flash device");
1337 command_print(CMD_CTX
, "unknown error when checking for bad "
1338 "blocks on NAND flash device");
1344 struct nand_fileio_state
{
1351 enum oob_formats oob_format
;
1358 struct fileio fileio
;
1360 struct duration bench
;
1363 static void nand_fileio_init(struct nand_fileio_state
*state
)
1365 memset(state
, 0, sizeof(*state
));
1366 state
->oob_format
= NAND_OOB_NONE
;
1369 static int nand_fileio_start(struct command_context
*cmd_ctx
,
1370 struct nand_device
*nand
, const char *filename
, int filemode
,
1371 struct nand_fileio_state
*state
)
1373 if (state
->address
% nand
->page_size
)
1375 command_print(cmd_ctx
, "only page-aligned addresses are supported");
1376 return ERROR_COMMAND_SYNTAX_ERROR
;
1379 duration_start(&state
->bench
);
1381 if (NULL
!= filename
)
1383 int retval
= fileio_open(&state
->fileio
, filename
, filemode
, FILEIO_BINARY
);
1384 if (ERROR_OK
!= retval
)
1386 const char *msg
= (FILEIO_READ
== filemode
) ? "read" : "write";
1387 command_print(cmd_ctx
, "failed to open '%s' for %s access",
1391 state
->file_opened
= true;
1394 if (!(state
->oob_format
& NAND_OOB_ONLY
))
1396 state
->page_size
= nand
->page_size
;
1397 state
->page
= malloc(nand
->page_size
);
1400 if (state
->oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1402 if (nand
->page_size
== 512)
1404 state
->oob_size
= 16;
1405 state
->eccpos
= nand_oob_16
.eccpos
;
1407 else if (nand
->page_size
== 2048)
1409 state
->oob_size
= 64;
1410 state
->eccpos
= nand_oob_64
.eccpos
;
1412 state
->oob
= malloc(state
->oob_size
);
1417 static int nand_fileio_cleanup(struct nand_fileio_state
*state
)
1419 if (state
->file_opened
)
1420 fileio_close(&state
->fileio
);
1434 static int nand_fileio_finish(struct nand_fileio_state
*state
)
1436 nand_fileio_cleanup(state
);
1437 return duration_measure(&state
->bench
);
1440 static COMMAND_HELPER(nand_fileio_parse_args
, struct nand_fileio_state
*state
,
1441 struct nand_device
**dev
, enum fileio_access filemode
,
1442 bool need_size
, bool sw_ecc
)
1444 nand_fileio_init(state
);
1446 unsigned minargs
= need_size
? 4 : 3;
1447 if (CMD_ARGC
< minargs
)
1448 return ERROR_COMMAND_SYNTAX_ERROR
;
1450 struct nand_device
*nand
;
1451 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &nand
);
1452 if (ERROR_OK
!= retval
)
1455 if (NULL
== nand
->device
)
1457 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1461 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], state
->address
);
1464 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[3], state
->size
);
1465 if (state
->size
% nand
->page_size
)
1467 command_print(CMD_CTX
, "only page-aligned sizes are supported");
1468 return ERROR_COMMAND_SYNTAX_ERROR
;
1472 if (CMD_ARGC
> minargs
)
1474 for (unsigned i
= minargs
; i
< CMD_ARGC
; i
++)
1476 if (!strcmp(CMD_ARGV
[i
], "oob_raw"))
1477 state
->oob_format
|= NAND_OOB_RAW
;
1478 else if (!strcmp(CMD_ARGV
[i
], "oob_only"))
1479 state
->oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1480 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc"))
1481 state
->oob_format
|= NAND_OOB_SW_ECC
;
1482 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc_kw"))
1483 state
->oob_format
|= NAND_OOB_SW_ECC_KW
;
1486 command_print(CMD_CTX
, "unknown option: %s", CMD_ARGV
[i
]);
1487 return ERROR_COMMAND_SYNTAX_ERROR
;
1492 retval
= nand_fileio_start(CMD_CTX
, nand
, CMD_ARGV
[1], filemode
, state
);
1493 if (ERROR_OK
!= retval
)
1497 state
->size
= state
->fileio
.size
;
1505 * @returns If no error occurred, returns number of bytes consumed;
1506 * otherwise, returns a negative error code.)
1508 static int nand_fileio_read(struct nand_device
*nand
,
1509 struct nand_fileio_state
*s
)
1511 size_t total_read
= 0;
1514 if (NULL
!= s
->page
)
1516 fileio_read(&s
->fileio
, s
->page_size
, s
->page
, &one_read
);
1517 if (one_read
< s
->page_size
)
1518 memset(s
->page
+ one_read
, 0xff, s
->page_size
- one_read
);
1519 total_read
+= one_read
;
1522 if (s
->oob_format
& NAND_OOB_SW_ECC
)
1525 memset(s
->oob
, 0xff, s
->oob_size
);
1526 for (uint32_t i
= 0, j
= 0; i
< s
->page_size
; i
+= 256)
1528 nand_calculate_ecc(nand
, s
->page
+ i
, ecc
);
1529 s
->oob
[s
->eccpos
[j
++]] = ecc
[0];
1530 s
->oob
[s
->eccpos
[j
++]] = ecc
[1];
1531 s
->oob
[s
->eccpos
[j
++]] = ecc
[2];
1534 else if (s
->oob_format
& NAND_OOB_SW_ECC_KW
)
1537 * In this case eccpos is not used as
1538 * the ECC data is always stored contigously
1539 * at the end of the OOB area. It consists
1540 * of 10 bytes per 512-byte data block.
1542 uint8_t *ecc
= s
->oob
+ s
->oob_size
- s
->page_size
/ 512 * 10;
1543 memset(s
->oob
, 0xff, s
->oob_size
);
1544 for (uint32_t i
= 0; i
< s
->page_size
; i
+= 512)
1546 nand_calculate_ecc_kw(nand
, s
->page
+ i
, ecc
);
1550 else if (NULL
!= s
->oob
)
1552 fileio_read(&s
->fileio
, s
->oob_size
, s
->oob
, &one_read
);
1553 if (one_read
< s
->oob_size
)
1554 memset(s
->oob
+ one_read
, 0xff, s
->oob_size
- one_read
);
1555 total_read
+= one_read
;
1560 COMMAND_HANDLER(handle_nand_write_command
)
1562 struct nand_device
*nand
= NULL
;
1563 struct nand_fileio_state s
;
1564 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1565 &s
, &nand
, FILEIO_READ
, false, true);
1566 if (ERROR_OK
!= retval
)
1569 uint32_t total_bytes
= s
.size
;
1572 int bytes_read
= nand_fileio_read(nand
, &s
);
1573 if (bytes_read
<= 0)
1575 command_print(CMD_CTX
, "error while reading file");
1576 return nand_fileio_cleanup(&s
);
1578 s
.size
-= bytes_read
;
1580 retval
= nand_write_page(nand
, s
.address
/ nand
->page_size
,
1581 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1582 if (ERROR_OK
!= retval
)
1584 command_print(CMD_CTX
, "failed writing file %s "
1585 "to NAND flash %s at offset 0x%8.8" PRIx32
,
1586 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
);
1587 return nand_fileio_cleanup(&s
);
1589 s
.address
+= s
.page_size
;
1592 if (nand_fileio_finish(&s
))
1594 command_print(CMD_CTX
, "wrote file %s to NAND flash %s up to "
1595 "offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1596 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
, duration_elapsed(&s
.bench
),
1597 duration_kbps(&s
.bench
, total_bytes
));
1602 COMMAND_HANDLER(handle_nand_verify_command
)
1604 struct nand_device
*nand
= NULL
;
1605 struct nand_fileio_state file
;
1606 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1607 &file
, &nand
, FILEIO_READ
, false, true);
1608 if (ERROR_OK
!= retval
)
1611 struct nand_fileio_state dev
;
1612 nand_fileio_init(&dev
);
1613 dev
.address
= file
.address
;
1614 dev
.size
= file
.size
;
1615 dev
.oob_format
= file
.oob_format
;
1616 retval
= nand_fileio_start(CMD_CTX
, nand
, NULL
, FILEIO_NONE
, &dev
);
1617 if (ERROR_OK
!= retval
)
1620 while (file
.size
> 0)
1622 int retval
= nand_read_page(nand
, dev
.address
/ dev
.page_size
,
1623 dev
.page
, dev
.page_size
, dev
.oob
, dev
.oob_size
);
1624 if (ERROR_OK
!= retval
)
1626 command_print(CMD_CTX
, "reading NAND flash page failed");
1627 nand_fileio_cleanup(&dev
);
1628 return nand_fileio_cleanup(&file
);
1631 int bytes_read
= nand_fileio_read(nand
, &file
);
1632 if (bytes_read
<= 0)
1634 command_print(CMD_CTX
, "error while reading file");
1635 nand_fileio_cleanup(&dev
);
1636 return nand_fileio_cleanup(&file
);
1639 if ((dev
.page
&& memcmp(dev
.page
, file
.page
, dev
.page_size
)) ||
1640 (dev
.oob
&& memcmp(dev
.oob
, file
.oob
, dev
.oob_size
)) )
1642 command_print(CMD_CTX
, "NAND flash contents differ "
1643 "at 0x%8.8" PRIx32
, dev
.address
);
1644 nand_fileio_cleanup(&dev
);
1645 return nand_fileio_cleanup(&file
);
1648 file
.size
-= bytes_read
;
1649 dev
.address
+= nand
->page_size
;
1652 if (nand_fileio_finish(&file
) == ERROR_OK
)
1654 command_print(CMD_CTX
, "verified file %s in NAND flash %s "
1655 "up to offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1656 CMD_ARGV
[1], CMD_ARGV
[0], dev
.address
, duration_elapsed(&file
.bench
),
1657 duration_kbps(&file
.bench
, dev
.size
));
1660 return nand_fileio_cleanup(&dev
);
1663 COMMAND_HANDLER(handle_nand_dump_command
)
1665 struct nand_device
*nand
= NULL
;
1666 struct nand_fileio_state s
;
1667 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1668 &s
, &nand
, FILEIO_WRITE
, true, false);
1669 if (ERROR_OK
!= retval
)
1674 size_t size_written
;
1675 int retval
= nand_read_page(nand
, s
.address
/ nand
->page_size
,
1676 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1677 if (ERROR_OK
!= retval
)
1679 command_print(CMD_CTX
, "reading NAND flash page failed");
1680 return nand_fileio_cleanup(&s
);
1684 fileio_write(&s
.fileio
, s
.page_size
, s
.page
, &size_written
);
1687 fileio_write(&s
.fileio
, s
.oob_size
, s
.oob
, &size_written
);
1689 s
.size
-= nand
->page_size
;
1690 s
.address
+= nand
->page_size
;
1693 if (nand_fileio_finish(&s
) == ERROR_OK
)
1695 command_print(CMD_CTX
, "dumped %zu bytes in %fs (%0.3f kb/s)",
1696 s
.fileio
.size
, duration_elapsed(&s
.bench
),
1697 duration_kbps(&s
.bench
, s
.fileio
.size
));
1702 COMMAND_HANDLER(handle_nand_raw_access_command
)
1704 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 2))
1706 return ERROR_COMMAND_SYNTAX_ERROR
;
1709 struct nand_device
*p
;
1710 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1711 if (ERROR_OK
!= retval
)
1714 if (NULL
== p
->device
)
1716 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1721 COMMAND_PARSE_ENABLE(CMD_ARGV
[1], p
->use_raw
);
1723 const char *msg
= p
->use_raw
? "enabled" : "disabled";
1724 command_print(CMD_CTX
, "raw access is %s", msg
);
1729 static const struct command_registration nand_exec_command_handlers
[] = {
1732 .handler
= &handle_nand_list_command
,
1733 .mode
= COMMAND_EXEC
,
1734 .help
= "list configured NAND flash devices",
1738 .handler
= &handle_nand_info_command
,
1739 .mode
= COMMAND_EXEC
,
1741 .help
= "print info about a NAND flash device",
1745 .handler
= &handle_nand_probe_command
,
1746 .mode
= COMMAND_EXEC
,
1748 .help
= "identify NAND flash device <num>",
1752 .name
= "check_bad_blocks",
1753 .handler
= &handle_nand_check_bad_blocks_command
,
1754 .mode
= COMMAND_EXEC
,
1755 .usage
= "<bank> [<offset> <length>]",
1756 .help
= "check NAND flash device <num> for bad blocks",
1760 .handler
= &handle_nand_erase_command
,
1761 .mode
= COMMAND_EXEC
,
1762 .usage
= "<bank> [<offset> <length>]",
1763 .help
= "erase blocks on NAND flash device",
1767 .handler
= &handle_nand_dump_command
,
1768 .mode
= COMMAND_EXEC
,
1769 .usage
= "<bank> <filename> <offset> <length> "
1770 "[oob_raw | oob_only]",
1771 .help
= "dump from NAND flash device",
1775 .handler
= &handle_nand_verify_command
,
1776 .mode
= COMMAND_EXEC
,
1777 .usage
= "<bank> <filename> <offset> "
1778 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1779 .help
= "verify NAND flash device",
1783 .handler
= &handle_nand_write_command
,
1784 .mode
= COMMAND_EXEC
,
1785 .usage
= "<bank> <filename> <offset> "
1786 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
1787 .help
= "write to NAND flash device",
1790 .name
= "raw_access",
1791 .handler
= &handle_nand_raw_access_command
,
1792 .mode
= COMMAND_EXEC
,
1793 .usage
= "<num> ['enable'|'disable']",
1794 .help
= "raw access to NAND flash device",
1796 COMMAND_REGISTRATION_DONE
1799 int nand_init(struct command_context
*cmd_ctx
)
1803 struct command
*parent
= command_find_in_context(cmd_ctx
, "nand");
1804 return register_commands(cmd_ctx
, parent
, nand_exec_command_handlers
);
1807 COMMAND_HANDLER(handle_nand_init_command
)
1810 return ERROR_COMMAND_SYNTAX_ERROR
;
1812 static bool nand_initialized
= false;
1813 if (nand_initialized
)
1815 LOG_INFO("'nand init' has already been called");
1818 nand_initialized
= true;
1820 LOG_DEBUG("Initializing NAND devices...");
1821 return nand_init(CMD_CTX
);