src/flash/mx3_nand.h

   1 #include <nand.h>
   2
   3 #define         MX3_NF_BASE_ADDR                0xb8000000
   4 #define         MX3_NF_BUFSIZ                   (MX3_NF_BASE_ADDR + 0xe00)
   5 #define         MX3_NF_BUFADDR                  (MX3_NF_BASE_ADDR + 0xe04)
   6 #define         MX3_NF_FADDR                    (MX3_NF_BASE_ADDR + 0xe06)
   7 #define         MX3_NF_FCMD                             (MX3_NF_BASE_ADDR + 0xe08)
   8 #define         MX3_NF_BUFCFG                   (MX3_NF_BASE_ADDR + 0xe0a)
   9 #define         MX3_NF_ECCSTATUS                        (MX3_NF_BASE_ADDR + 0xe0c)
  10 #define         MX3_NF_ECCMAINPOS                       (MX3_NF_BASE_ADDR + 0xe0e)
  11 #define         MX3_NF_ECCSPAREPOS                      (MX3_NF_BASE_ADDR + 0xe10)
  12 #define         MX3_NF_FWP                      (MX3_NF_BASE_ADDR + 0xe12)
  13 #define         MX3_NF_LOCKSTART                        (MX3_NF_BASE_ADDR + 0xe14)
  14 #define         MX3_NF_LOCKEND                  (MX3_NF_BASE_ADDR + 0xe16)
  15 #define         MX3_NF_FWPSTATUS                        (MX3_NF_BASE_ADDR + 0xe18)
  16  /*
  17   * all bits not marked as self-clearing bit
  18   */
  19 #define         MX3_NF_CFG1                     (MX3_NF_BASE_ADDR + 0xe1a)
  20 #define         MX3_NF_CFG2                     (MX3_NF_BASE_ADDR + 0xe1c)
  21
  22 #define         MX3_NF_MAIN_BUFFER0             (MX3_NF_BASE_ADDR + 0x0000)
  23 #define         MX3_NF_MAIN_BUFFER1             (MX3_NF_BASE_ADDR + 0x0200)
  24 #define         MX3_NF_MAIN_BUFFER2             (MX3_NF_BASE_ADDR + 0x0400)
  25 #define         MX3_NF_MAIN_BUFFER3             (MX3_NF_BASE_ADDR + 0x0600)
  26 #define         MX3_NF_SPARE_BUFFER0    (MX3_NF_BASE_ADDR + 0x0800)
  27 #define         MX3_NF_SPARE_BUFFER1    (MX3_NF_BASE_ADDR + 0x0810)
  28 #define         MX3_NF_SPARE_BUFFER2    (MX3_NF_BASE_ADDR + 0x0820)
  29 #define         MX3_NF_SPARE_BUFFER3    (MX3_NF_BASE_ADDR + 0x0830)
  30 #define         MX3_NF_MAIN_BUFFER_LEN  512
  31 #define         MX3_NF_SPARE_BUFFER_LEN 16
  32 #define         MX3_NF_LAST_BUFFER_ADDR ((MX3_NF_SPARE_BUFFER3) + MX3_NF_SPARE_BUFFER_LEN - 2)
  33
  34 /* bits in MX3_NF_CFG1 register */
  35 #define         MX3_NF_BIT_SPARE_ONLY_EN        (1<<2)
  36 #define         MX3_NF_BIT_ECC_EN                       (1<<3)
  37 #define         MX3_NF_BIT_INT_DIS                      (1<<4)
  38 #define         MX3_NF_BIT_BE_EN                        (1<<5)
  39 #define         MX3_NF_BIT_RESET_EN                     (1<<6)
  40 #define         MX3_NF_BIT_FORCE_CE                     (1<<7)
  41
  42 /* bits in MX3_NF_CFG2 register */
  43
  44 /*Flash Command Input*/
  45 #define         MX3_NF_BIT_OP_FCI                       (1<<0)
  46  /*
  47   * Flash Address Input
  48   */
  49 #define         MX3_NF_BIT_OP_FAI                       (1<<1)
  50  /*
  51   * Flash Data Input
  52   */
  53 #define         MX3_NF_BIT_OP_FDI                       (1<<2)
  54
  55 /* see "enum mx_dataout_type" below */
  56 #define         MX3_NF_BIT_DATAOUT_TYPE(x)      ((x)<<3)
  57 #define         MX3_NF_BIT_OP_DONE                      (1<<15)
  58
  59 #define         MX3_CCM_CGR2            0x53f80028
  60 #define         MX3_GPR                         0x43fac008
  61 #define         MX3_PCSR                        0x53f8000c
  62
  63 enum mx_dataout_type
  64 {
  65         MX3_NF_DATAOUT_PAGE = 1,
  66         MX3_NF_DATAOUT_NANDID = 2,
  67         MX3_NF_DATAOUT_NANDSTATUS = 4,
  68 };
  69 enum mx_nf_finalize_action
  70 {
  71         MX3_NF_FIN_NONE,
  72         MX3_NF_FIN_DATAOUT,
  73 };
  74
  75 struct mx3_nf_flags
  76 {
  77         unsigned host_little_endian:1;
  78         unsigned target_little_endian:1;
  79         unsigned nand_readonly:1;
  80         unsigned one_kb_sram:1;
  81         unsigned hw_ecc_enabled:1;
  82 };
  83
  84 typedef struct mx3_nf_controller_s
  85 {
  86         struct target_s *target;
  87         enum mx_dataout_type optype;
  88         enum mx_nf_finalize_action fin;
  89         struct mx3_nf_flags flags;
  90 } mx3_nf_controller_t;