- prepare OpenOCD for branching, created ./trunk/
[openocd.git] / src / flash / at91sam7.h
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
3 * lundinªmlu.mine.nu *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef AT91SAM7_H
21 #define AT91SAM7_H
22
23 #include "flash.h"
24 #include "target.h"
25
26 typedef struct at91sam7_flash_bank_s
27 {
28 struct target_s *target;
29 u32 working_area;
30 u32 working_area_size;
31
32 /* chip id register */
33 u32 cidr;
34 u16 cidr_ext;
35 u16 cidr_nvptyp;
36 u16 cidr_arch;
37 u16 cidr_sramsiz;
38 u16 cidr_nvpsiz;
39 u16 cidr_nvpsiz2;
40 u16 cidr_eproc;
41 u16 cidr_version;
42
43 /* flash geometry */
44 u16 num_pages;
45 u16 pagesize;
46 u16 pages_in_lockregion;
47 u8 num_erase_regions;
48 u32 *erase_region_info;
49
50 /* nv memory bits */
51 u16 num_lockbits;
52 u16 lockbits;
53 u16 num_nvmbits;
54 u16 nvmbits;
55 u8 securitybit;
56 u8 flashmode; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
57
58 /* main clock status */
59 u8 mainrdy;
60 u16 mainf;
61 u16 usec_clocks;
62
63 } at91sam7_flash_bank_t;
64
65 /* AT91SAM7 control registers */
66 #define DBGU_CIDR 0xFFFFF240
67 #define CKGR_MCFR 0xFFFFFC24
68 #define MC_FMR 0xFFFFFF60
69 #define MC_FCR 0xFFFFFF64
70 #define MC_FSR 0xFFFFFF68
71
72 /* Flash Controller Commands */
73 #define WP 0x01
74 #define SLB 0x02
75 #define WPL 0x03
76 #define CLB 0x04
77 #define EA 0x08
78 #define SGPB 0x0B
79 #define CGPB 0x0D
80 #define SSB 0x0F
81
82
83 #endif /* AT91SAM7_H */

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