src/flash/arm_nandio.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "arm_nandio.h"
  28 #include "armv4_5.h"
  29 #include "algorithm.h"
  30
  31 /**
  32  * Copies code to a working area.  This will allocate room for the code plus the
  33  * additional amount requested if the working area pointer is null.
  34  *
  35  * @param target Pointer to the target to copy code to
  36  * @param code Pointer to the code area to be copied
  37  * @param code_size Size of the code being copied
  38  * @param additional Size of the additional area to be allocated in addition to
  39  *                   code
  40  * @param area Pointer to a pointer to a working area to copy code to
  41  * @return Success or failure of the operation
  42  */
  43 int arm_code_to_working_area(struct target *target, const uint32_t *code, unsigned code_size,
  44                 unsigned additional, struct working_area **area)
  45 {
  46         uint8_t code_buf[code_size];
  47         unsigned i;
  48         int retval;
  49         unsigned size = code_size + additional;
  50
  51         /* make sure we have a working area */
  52         if (NULL == *area) {
  53                 retval = target_alloc_working_area(target, size, area);
  54                 if (retval != ERROR_OK) {
  55                         LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
  56                         return ERROR_NAND_NO_BUFFER;
  57                 }
  58         }
  59
  60         /* buffer code in target endianness */
  61         for (i = 0; i < code_size / 4; i++)
  62                 target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  63
  64         /* copy code to work area */
  65         retval = target_write_memory(target, (*area)->address,
  66                         4, code_size / 4, code_buf);
  67
  68         return retval;
  69 }
  70
  71 /**
  72  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  73  * For now this only supports ARMv4 and ARMv5 cores.
  74  *
  75  * Enhancements to target_run_algorithm() could enable:
  76  *   - ARMv6 and ARMv7 cores in ARM mode
  77  *
  78  * Different code fragments could handle:
  79  *   - Thumb2 cores like Cortex-M (needs different byteswapping)
  80  *   - 16-bit wide data (needs different setup too)
  81  *
  82  * @param nand Pointer to the arm_nand_data struct that defines the I/O
  83  * @param data Pointer to the data to be copied to flash
  84  * @param size Size of the data being copied
  85  * @return Success or failure of the operation
  86  */
  87 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  88 {
  89         struct target           *target = nand->target;
  90         struct armv4_5_algorithm        algo;
  91         struct arm              *armv4_5 = target->arch_info;
  92         struct reg_param        reg_params[3];
  93         uint32_t                target_buf;
  94         uint32_t                exit = 0;
  95         int                     retval;
  96
  97         /* Inputs:
  98          *  r0  NAND data address (byte wide)
  99          *  r1  buffer address
 100          *  r2  buffer length
 101          */
 102         static const uint32_t code[] = {
 103                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
 104                 0xe5c03000,     /*    strb  r3, [r0]     */
 105                 0xe2522001,     /*    subs  r2, r2, #1   */
 106                 0x1afffffb,     /*    bne   s            */
 107
 108                 /* exit: ARMv4 needs hardware breakpoint */
 109                 0xe1200070,     /* e: bkpt  #0           */
 110         };
 111
 112         if (!nand->copy_area) {
 113                 retval = arm_code_to_working_area(target, code, sizeof(code),
 114                                 nand->chunk_size, &nand->copy_area);
 115                 if (retval != ERROR_OK) {
 116                         return retval;
 117                 }
 118         }
 119
 120         /* copy data to work area */
 121         target_buf = nand->copy_area->address + sizeof(code);
 122         retval = target_bulk_write_memory(target, target_buf, size / 4, data);
 123         if (retval == ERROR_OK && (size & 3) != 0)
 124                 retval = target_write_memory(target,
 125                                 target_buf + (size & ~3),
 126                                 1, size & 3, data + (size & ~3));
 127         if (retval != ERROR_OK)
 128                 return retval;
 129
 130         /* set up algorithm and parameters */
 131         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 132         algo.core_mode = ARMV4_5_MODE_SVC;
 133         algo.core_state = ARMV4_5_STATE_ARM;
 134
 135         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 136         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 137         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 138
 139         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 140         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 141         buf_set_u32(reg_params[2].value, 0, 32, size);
 142
 143         /* armv4 must exit using a hardware breakpoint */
 144         if (armv4_5->is_armv4)
 145                 exit = nand->copy_area->address + sizeof(code) - 4;
 146
 147         /* use alg to write data from work area to NAND chip */
 148         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 149                         nand->copy_area->address, exit, 1000, &algo);
 150         if (retval != ERROR_OK)
 151                 LOG_ERROR("error executing hosted NAND write");
 152
 153         destroy_reg_param(&reg_params[0]);
 154         destroy_reg_param(&reg_params[1]);
 155         destroy_reg_param(&reg_params[2]);
 156
 157         return retval;
 158 }
 159
 160 /**
 161  * Uses an on-chip algorithm for an ARM device to read from a NAND device and
 162  * store the data into the host machine's memory.
 163  *
 164  * @param nand Pointer to the arm_nand_data struct that defines the I/O
 165  * @param data Pointer to the data buffer to store the read data
 166  * @param size Amount of data to be stored to the buffer.
 167  * @return Success or failure of the operation
 168  */
 169 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 170 {
 171         struct target *target = nand->target;
 172         struct armv4_5_algorithm algo;
 173         struct arm *armv4_5 = target->arch_info;
 174         struct reg_param reg_params[3];
 175         uint32_t target_buf;
 176         uint32_t exit = 0;
 177         int retval;
 178
 179         /* Inputs:
 180          *  r0  buffer address
 181          *  r1  NAND data address (byte wide)
 182          *  r2  buffer length
 183          */
 184         static const uint32_t code[] = {
 185                 0xe5d13000,     /* s: ldrb  r3, [r1]     */
 186                 0xe4c03001,     /*    strb  r3, [r0], #1 */
 187                 0xe2522001,     /*    subs  r2, r2, #1   */
 188                 0x1afffffb,     /*    bne   s            */
 189
 190                 /* exit: ARMv4 needs hardware breakpoint */
 191                 0xe1200070,     /* e: bkpt  #0           */
 192         };
 193
 194         /* create the copy area if not yet available */
 195         if (!nand->copy_area) {
 196                 retval = arm_code_to_working_area(target, code, sizeof(code),
 197                                 nand->chunk_size, &nand->copy_area);
 198                 if (retval != ERROR_OK) {
 199                         return retval;
 200                 }
 201         }
 202
 203         target_buf = nand->copy_area->address + sizeof(code);
 204
 205         /* set up algorithm and parameters */
 206         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 207         algo.core_mode = ARMV4_5_MODE_SVC;
 208         algo.core_state = ARMV4_5_STATE_ARM;
 209
 210         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 211         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 212         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 213
 214         buf_set_u32(reg_params[0].value, 0, 32, target_buf);
 215         buf_set_u32(reg_params[1].value, 0, 32, nand->data);
 216         buf_set_u32(reg_params[2].value, 0, 32, size);
 217
 218         /* armv4 must exit using a hardware breakpoint */
 219         if (armv4_5->is_armv4)
 220                 exit = nand->copy_area->address + sizeof(code) - 4;
 221
 222         /* use alg to write data from NAND chip to work area */
 223         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 224                         nand->copy_area->address, exit, 1000, &algo);
 225         if (retval != ERROR_OK)
 226                 LOG_ERROR("error executing hosted NAND write");
 227
 228         destroy_reg_param(&reg_params[0]);
 229         destroy_reg_param(&reg_params[1]);
 230         destroy_reg_param(&reg_params[2]);
 231
 232         /* read from work area to the host's memory */
 233         retval = target_read_buffer(target, target_buf, size, data);
 234
 235         return retval;
 236 }
 237