src/flash/arm_nandio.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "arm_nandio.h"
  28 #include "armv4_5.h"
  29
  30
  31 /*
  32  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  33  * For now this only supports ARMv4 and ARMv5 cores.
  34  *
  35  * Enhancements to target_run_algorithm() could enable:
  36  *   - ARMv6 and ARMv7 cores in ARM mode
  37  *
  38  * Different code fragments could handle:
  39  *   - Thumb2 cores like Cortex-M (needs different byteswapping)
  40  *   - 16-bit wide data (needs different setup too)
  41  */
  42 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  43 {
  44         target_t                *target = nand->target;
  45         armv4_5_algorithm_t     algo;
  46         armv4_5_common_t        *armv4_5 = target->arch_info;
  47         struct reg_param                reg_params[3];
  48         uint32_t                target_buf;
  49         uint32_t                exit = 0;
  50         int                     retval;
  51
  52         /* Inputs:
  53          *  r0  NAND data address (byte wide)
  54          *  r1  buffer address
  55          *  r2  buffer length
  56          */
  57         static const uint32_t code[] = {
  58                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
  59                 0xe5c03000,     /*    strb  r3, [r0]     */
  60                 0xe2522001,     /*    subs  r2, r2, #1   */
  61                 0x1afffffb,     /*    bne   s            */
  62
  63                 /* exit: ARMv4 needs hardware breakpoint */
  64                 0xe1200070,     /* e: bkpt  #0           */
  65         };
  66
  67         if (!nand->copy_area) {
  68                 uint8_t         code_buf[sizeof(code)];
  69                 unsigned        i;
  70
  71                 /* make sure we have a working area */
  72                 if (target_alloc_working_area(target,
  73                                 sizeof(code) + nand->chunk_size,
  74                                 &nand->copy_area) != ERROR_OK) {
  75                         LOG_DEBUG("%s: no %d byte buffer",
  76                                         __FUNCTION__,
  77                                         (int) sizeof(code) + nand->chunk_size);
  78                         return ERROR_NAND_NO_BUFFER;
  79                 }
  80
  81                 /* buffer code in target endianness */
  82                 for (i = 0; i < sizeof(code) / 4; i++)
  83                         target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  84
  85                 /* copy code to work area */
  86                 retval = target_write_memory(target,
  87                                         nand->copy_area->address,
  88                                         4, sizeof(code) / 4, code_buf);
  89                 if (retval != ERROR_OK)
  90                         return retval;
  91         }
  92
  93         /* copy data to work area */
  94         target_buf = nand->copy_area->address + sizeof(code);
  95         retval = target_bulk_write_memory(target, target_buf, size / 4, data);
  96         if (retval == ERROR_OK && (size & 3) != 0)
  97                 retval = target_write_memory(target,
  98                                 target_buf + (size & ~3),
  99                                 1, size & 3, data + (size & ~3));
 100         if (retval != ERROR_OK)
 101                 return retval;
 102
 103         /* set up algorithm and parameters */
 104         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 105         algo.core_mode = ARMV4_5_MODE_SVC;
 106         algo.core_state = ARMV4_5_STATE_ARM;
 107
 108         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 109         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 110         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 111
 112         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 113         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 114         buf_set_u32(reg_params[2].value, 0, 32, size);
 115
 116         /* armv4 must exit using a hardware breakpoint */
 117         if (armv4_5->is_armv4)
 118                 exit = nand->copy_area->address + sizeof(code) - 4;
 119
 120         /* use alg to write data from work area to NAND chip */
 121         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 122                         nand->copy_area->address, exit, 1000, &algo);
 123         if (retval != ERROR_OK)
 124                 LOG_ERROR("error executing hosted NAND write");
 125
 126         destroy_reg_param(&reg_params[0]);
 127         destroy_reg_param(&reg_params[1]);
 128         destroy_reg_param(&reg_params[2]);
 129
 130         return retval;
 131 }
 132
 133 /* REVISIT do the same for bulk *read* too ... */
 134