1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD.
55 * Developers:: OpenOCD developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * TCL scripting API:: Tcl scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target library:: Target library
76 * FAQ:: Frequently Asked Questions
77 * TCL Crash Course:: TCL Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main index.
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) complient taps on your target board.
97 @b{Dongles:} OpenOCD currently many types of hardware dongles: USB
98 Based, Parallel Port Based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
102 ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB Protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Packagers Please Read!
138 If you are a @b{PACKAGER} of OpenOCD if you
141 @item @b{Sell dongles} and include pre-built binaries
142 @item @b{Supply tools} ie: A complete development solution
143 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
144 @item @b{Build packages} ie: RPM files, or DEB files for a Linux Distro
147 As a @b{PACKAGER} - you are at the top of the food chain. You solve
148 problems for downstream users. What you fix or solve - solves hundreds
149 if not thousands of user questions. If something does not work for you
150 please let us know. That said, would also like you to follow a few
154 @item @b{Always build with Printer Ports Enabled}
155 @item @b{Try where possible to use LIBFTDI + LIBUSB} You cover more bases
158 It is your decision..
161 @item @b{Why YES to LIBFTDI + LIBUSB}
163 @item @b{LESS} work - libusb perhaps already there
164 @item @b{LESS} work - identical code multiple platforms
165 @item @b{MORE} dongles are supported
166 @item @b{MORE} platforms are supported
167 @item @b{MORE} complete solution
169 @item @b{Why not LIBFTDI + LIBUSB} (ie: ftd2xx instead)
171 @item @b{LESS} Some say it is slower.
172 @item @b{LESS} complex to distribute (external dependencies)
176 @section Building From Source
178 You can download the current SVN version with SVN client of your choice from the
179 following repositories:
181 (@uref{svn://svn.berlios.de/openocd/trunk})
185 (@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
187 Using the SVN command line client, you can use the following command to fetch the
188 latest version (make sure there is no (non-svn) directory called "openocd" in the
192 svn checkout svn://svn.berlios.de/openocd/trunk openocd
195 Building OpenOCD requires a recent version of the GNU autotools.
196 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
197 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
198 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
199 paths, resulting in obscure dependency errors (This is an observation I've gathered
200 from the logs of one user - correct me if I'm wrong).
202 You further need the appropriate driver files, if you want to build support for
203 a FTDI FT2232 based interface:
205 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
206 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
207 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
208 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
211 libftdi is supported under windows. Do not use versions earlier then 0.14.
213 In general, the D2XX driver provides superior performance (several times as fast),
214 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
215 a kernel module, only a user space library.
217 To build OpenOCD (on both Linux and Cygwin), use the following commands:
221 Bootstrap generates the configure script, and prepares building on your system.
223 ./configure [options, see below]
225 Configure generates the Makefiles used to build OpenOCD.
230 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
232 The configure script takes several options, specifying which JTAG interfaces
237 @option{--enable-parport} - Bit bang pc printer ports.
239 @option{--enable-parport_ppdev} - Parallel Port [see below]
241 @option{--enable-parport_giveio} - Parallel Port [see below]
243 @option{--enable-amtjtagaccel} - Parallel Port [Amontec, see below]
245 @option{--enable-ft2232_ftd2xx} - Numerous USB Type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
247 @option{--enable-ft2232_libftdi} - An open source (free) alternate to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin)
249 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
251 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only equal of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
253 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static, specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. Shared is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
255 @option{--enable-gw16012}
257 @option{--enable-usbprog}
259 @option{--enable-presto_libftdi}
261 @option{--enable-presto_ftd2xx}
263 @option{--enable-jlink} - From SEGGER
265 @option{--enable-vsllink}
267 @option{--enable-rlink} - Raisonance.com dongle.
270 @section Parallel Port Dongles
272 If you want to access the parallel port using the PPDEV interface you have to specify
273 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
274 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
275 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
277 @section FT2232C Based USB Dongles
279 There are 2 methods of using the FTD2232, either (1) using the
280 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
281 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
283 The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
284 TAR.GZ file. You must unpack them ``some where'' convient. As of this
285 writing (12/26/2008) FTDICHIP does not supply means to install these
286 files ``in an appropriate place'' As a result, there are two
287 ``./configure'' options that help.
289 Below is an example build process:
291 1) Check out the latest version of ``openocd'' from SVN.
293 2) Download & Unpack either the Windows or Linux FTD2xx Drivers
294 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
297 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
298 /home/duane/libftd2xx0.4.16 => the Linux TAR file contents.
301 3) Configure with these options:
304 Cygwin FTCICHIP solution
305 ./configure --prefix=/home/duane/mytools \
306 --enable-ft2232_ftd2xx \
307 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
309 Linux FTDICHIP solution
310 ./configure --prefix=/home/duane/mytools \
311 --enable-ft2232_ftd2xx \
312 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
314 Cygwin/Linux LIBFTDI solution
316 1a) For Windows: The windows port of LIBUSB is in place.
317 1b) For Linux: libusb has been built and is inplace.
319 2) And libftdi has been built and installed
320 Note: libftdi - relies upon libusb.
322 ./configure --prefix=/home/duane/mytools \
323 --enable-ft2232_libftdi
327 4) Then just type ``make'', and perhaps ``make install''.
330 @section Miscellaneous configure options
334 @option{--enable-gccwarnings} - enable extra gcc warnings during build
337 @node JTAG Hardware Dongles
338 @chapter JTAG Hardware Dongles
347 Defined: @b{dongle}: A small device that plugins into a computer and serves as
348 an adapter .... [snip]
350 In the OpenOCD case, this generally refers to @b{a small adapater} one
351 attaches to your computer via USB or the Parallel Printer Port. The
352 execption being the Zylin ZY1000 which is a small box you attach via
356 @section Choosing a Dongle
358 There are three things you should keep in mind when choosing a dongle.
361 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
362 @item @b{Connection} Printer Ports - Does your computer have one?
363 @item @b{Connection} Is that long printer bit-bang cable practical?
364 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
367 @section Stand alone Systems
369 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
370 dongle, but a standalone box.
372 @section USB FT2232 Based
374 There are many USB jtag dongles on the market, many of them are based
375 on a chip from ``Future Technology Devices International'' (FTDI)
376 known as the FTDI FT2232.
378 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
380 As of 28/Nov/2008, the following are supported:
384 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
386 @* See: @url{http://www.amontec.com/jtagkey.shtml}
388 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
390 @* See: @url{http://www.signalyzer.com}
391 @item @b{evb_lm3s811}
392 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
393 @item @b{olimex-jtag}
394 @* See: @url{http://www.olimex.com}
396 @* See: @url{http://www.tincantools.com}
397 @item @b{turtelizer2}
398 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
400 @* Link: @url{http://www.hitex.com/index.php?id=383}
402 @* Link @url{http://www.hitex.com/stm32-stick}
403 @item @b{axm0432_jtag}
404 @* Axiom AXM-0432 Link @url{http://www.axman.com}
407 @section USB JLINK based
408 There are several OEM versions of the Segger @b{JLINK} adapter. It is
409 an example of a micro controller based JTAG adapter, it uses an
410 AT91SAM764 internally.
413 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
414 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
415 @item @b{SEGGER JLINK}
416 @* Link: @url{http://www.segger.com/jlink.html}
418 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
421 @section USB RLINK based
422 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
425 @item @b{Raisonance RLink}
426 @* Link: @url{http://www.raisonance.com/products/RLink.php}
427 @item @b{STM32 Primer}
428 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
429 @item @b{STM32 Primer2}
430 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
436 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
438 @item @b{USB - Presto}
439 @* Link: @url{http://tools.asix.net/prg_presto.htm}
441 @item @b{Versaloon-Link}
442 @* Link: @url{http://www.simonqian.com/en/Versaloon}
445 @section IBM PC Parallel Printer Port Based
447 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
448 and the MacGraigor Wiggler. There are many clones and variations of
453 @item @b{Wiggler} - There are many clones of this.
454 @* Link: @url{http://www.macraigor.com/wiggler.htm}
456 @item @b{DLC5} - From XILINX - There are many clones of this
457 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
458 produced, PDF schematics are easily found and it is easy to make.
460 @item @b{Amontec - JTAG Accelerator}
461 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
464 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
467 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
469 @item @b{Wiggler_ntrst_inverted}
470 @* Yet another variation - See the source code, src/jtag/parport.c
472 @item @b{old_amt_wiggler}
473 @* Unknown - probably not on the market today
476 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
479 @* Link: @url{http://www.amontec.com/chameleon.shtml}
485 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
488 @* From ST Microsystems, link:
489 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
490 Title: FlashLINK JTAG programing cable for PSD and uPSD
498 @* An EP93xx based linux machine using the GPIO pins directly.
501 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
507 @cindex running OpenOCD
509 @cindex --debug_level
513 The @option{--help} option shows:
517 --help | -h display this help
518 --version | -v display OpenOCD version
519 --file | -f use configuration file <name>
520 --search | -s dir to search for config files and scripts
521 --debug | -d set debug level <0-3>
522 --log_output | -l redirect log output to file <name>
523 --command | -c run <command>
524 --pipe | -p use pipes when talking to gdb
527 By default OpenOCD reads the file configuration file ``openocd.cfg''
528 in the current directory. To specify a different (or multiple)
529 configuration file, you can use the ``-f'' option. For example:
532 openocd -f config1.cfg -f config2.cfg -f config3.cfg
535 Once started, OpenOCD runs as a daemon, waiting for connections from
536 clients (Telnet, GDB, Other).
538 If you are having problems, you can enable internal debug messages via
541 Also it is possible to interleave commands w/config scripts using the
542 @option{-c} command line switch.
544 To enable debug output (when reporting problems or working on OpenOCD
545 itself), use the @option{-d} command line switch. This sets the
546 @option{debug_level} to "3", outputting the most information,
547 including debug messages. The default setting is "2", outputting only
548 informational messages, warnings and errors. You can also change this
549 setting from within a telnet or gdb session using @option{debug_level
550 <n>} @xref{debug_level}.
552 You can redirect all output from the daemon to a file using the
553 @option{-l <logfile>} switch.
555 Search paths for config/script files can be added to OpenOCD by using
556 the @option{-s <search>} switch. The current directory and the OpenOCD
557 target library is in the search path by default.
559 For details on the @option{-p} option. @xref{Connecting to GDB}.
560 Option @option{-p} is not currently supported under native win32.
562 Note! OpenOCD will launch the GDB & telnet server even if it can not
563 establish a connection with the target. In general, it is possible for
564 the JTAG controller to be unresponsive until the target is set up
565 correctly via e.g. GDB monitor commands in a GDB init script.
567 @node Simple Configuration Files
568 @chapter Simple Configuration Files
569 @cindex configuration
572 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
575 @item A small openocd.cfg file which ``sources'' other configuration files
576 @item A monolithic openocd.cfg file
577 @item Many -f filename options on the command line
578 @item Your Mixed Solution
581 @section Small configuration file method
583 This is the prefered method, it is simple and is works well for many
584 people. The developers of OpenOCD would encourage you to use this
585 method. If you create a new configuration please email new
586 configurations to the development list.
588 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
591 source [find interface/signalyzer.cfg]
593 # Change the default telnet port...
597 # GDB can also flash my flash!
598 gdb_memory_map enable
599 gdb_flash_program enable
601 source [find target/sam7x256.cfg]
604 There are many example configuration scripts you can work with. You
605 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
609 @item @b{board} - eval board level configurations
610 @item @b{interface} - specific dongle configurations
611 @item @b{target} - the target chips
612 @item @b{tcl} - helper scripts
613 @item @b{xscale} - things specific to the xscale.
616 Look first in the ``boards'' area, then the ``targets'' area. Often a board
617 configuration is a good example to work from.
619 @section Many -f filename options
620 Some believe this is a wonderful solution, others find it painful.
622 You can use a series of ``-f filename'' options on the command line,
623 OpenOCD will read each filename in sequence, for example:
626 openocd -f file1.cfg -f file2.cfg -f file2.cfg
629 You can also intermix various commands with the ``-c'' command line
632 @section Monolithic file
633 The ``Monolithic File'' dispenses with all ``source'' statements and
634 puts everything in one self contained (monolithic) file. This is not
637 Please try to ``source'' various files or use the multiple -f
640 @section Advice for you
641 Often, one uses a ``mixed approach''. Where possible, please try to
642 ``source'' common things, and if needed cut/paste parts of the
643 standard distribution configuration files as needed.
645 @b{REMEMBER:} The ``important parts'' of your configuration file are:
648 @item @b{Interface} - Defines the dongle
649 @item @b{Taps} - Defines the JTAG Taps
650 @item @b{GDB Targets} - What GDB talks to
651 @item @b{Flash Programing} - Very Helpful
654 Some key things you should look at and understand are:
657 @item The RESET configuration of your debug environment as a hole
658 @item Is there a ``work area'' that OpenOCD can use?
659 @* For ARM - work areas mean up to 10x faster downloads.
660 @item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
661 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
666 @node Config File Guidelines
667 @chapter Config File Guidelines
669 This section/chapter is aimed at developers and integrators of
670 OpenOCD. These are guidelines for creating new boards and new target
671 configurations as of 28/Nov/2008.
673 However, you the user of OpenOCD should be some what familiar with
674 this section as it should help explain some of the internals of what
675 you might be looking at.
677 The user should find under @t{$(INSTALLDIR)/lib/openocd} the
678 following directories:
682 @*Think JTAG Dongle. Files that configure the jtag dongle go here.
684 @* Thing Circuit Board, PWA, PCB, they go by many names. Board files
685 contain initialization items that are specific to a board - for
686 example: The SDRAM initialization sequence for the board, or the type
687 of external flash and what address it is found at. Any initialization
688 sequence to enable that external flash or sdram should be found in the
689 board file. Boards may also contain multiple targets, ie: Two cpus, or
690 a CPU and an FPGA or CPLD.
692 @* Think CHIP. The ``target'' directory represents a jtag tap (or
693 chip) OpenOCD should control, not a board. Two common types of targets
694 are ARM chips and FPGA or CPLD chips.
697 @b{If needed...} The user in their ``openocd.cfg'' file or the board
698 file might override a specific feature in any of the above files by
699 setting a variable or two before sourcing the target file. Or adding
700 various commands specific to their situation.
702 @section Interface Config Files
704 The user should be able to source one of these files via a command like this:
707 source [find interface/FOOBAR.cfg]
709 openocd -f interface/FOOBAR.cfg
712 A preconfigured interface file should exist for every interface in use
713 today, that said, perhaps some interfaces have only been used by the
714 sole developer who created it.
716 @b{FIXME/NOTE:} We need to add support for a variable like TCL variable
717 tcl_platform(platform), it should be called jim_platform (because it
718 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
719 ``cygwin'' or ``mingw''
721 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
723 @section Board Config Files
725 @b{Note: BOARD directory NEW as of 28/nov/2008}
727 The user should be able to source one of these files via a command like this:
730 source [find board/FOOBAR.cfg]
732 openocd -f board/FOOBAR.cfg
736 The board file should contain one or more @t{source [find
737 target/FOO.cfg]} statements along with any board specific things.
739 In summery the board files should contain (if present)
742 @item External flash configuration (ie: the flash on CS0)
743 @item SDRAM configuration (size, speed, etc)
744 @item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
745 @item Multiple TARGET source statements
746 @item All things that are not ``inside a chip''
747 @item Things inside a chip go in a 'target' file
750 @section Target Config Files
752 The user should be able to source one of these files via a command like this:
755 source [find target/FOOBAR.cfg]
757 openocd -f target/FOOBAR.cfg
760 In summery the target files should contain
765 @item Reset Configuration
767 @item CPU/Chip/CPU-Core Specific features
771 @subsection Important variable names
773 By default, the end user should never need to set these
774 variables. However, if the user needs to override a setting they only
775 need to set the variable in a simple way.
779 @* This gives a name to the overall chip, and is used as part of the
780 tap identifier dotted name.
782 @* By default little - unless the chip or board is not normally used that way.
784 @* When OpenOCD examines the JTAG chain, it will attempt to identify
785 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
786 to verify the tap id number verses configuration file and may issue an
787 error or warning like this. The hope is this will help pin point
788 problem OpenOCD configurations.
791 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
792 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
793 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
794 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
797 @item @b{_TARGETNAME}
798 @* By convention, this variable is created by the target configuration
799 script. The board configuration file may make use of this variable to
800 configure things like a ``reset init'' script, or other things
801 specific to that board and that target.
803 If the chip has 2 targets, use the names @b{_TARGETNAME0},
804 @b{_TARGETNAME1}, ... etc.
806 @b{Remember:} The ``board file'' may include multiple targets.
808 At no time should the name ``target0'' (the default target name if
809 none was specified) be used. The name ``target0'' is a hard coded name
810 - the next target on the board will be some other number.
812 The user (or board file) should reasonably be able to:
815 source [find target/FOO.cfg]
816 $_TARGETNAME configure ... FOO specific parameters
818 source [find target/BAR.cfg]
819 $_TARGETNAME configure ... BAR specific parameters
824 @subsection TCL Variables Guide Line
825 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
827 Thus the rule we follow in OpenOCD is this: Variables that begin with
828 a leading underscore are temporal in nature, and can be modified and
829 used at will within a ?TARGET? configuration file
831 @b{EXAMPLE:} The user should be able to do this:
835 # PXA270 #1 network side, big endian
836 # PXA270 #2 video side, little endian
840 source [find target/pxa270.cfg]
841 # variable: _TARGETNAME = network.cpu
842 # other commands can refer to the "network.cpu" tap.
843 $_TARGETNAME configure .... params for this cpu..
847 source [find target/pxa270.cfg]
848 # variable: _TARGETNAME = video.cpu
849 # other commands can refer to the "video.cpu" tap.
850 $_TARGETNAME configure .... params for this cpu..
854 source [find target/spartan3.cfg]
856 # Since $_TARGETNAME is temporal..
857 # these names still work!
858 network.cpu configure ... params
859 video.cpu configure ... params
863 @subsection Default Value Boiler Plate Code
865 All target configuration files should start with this (or a modified form)
869 if @{ [info exists CHIPNAME] @} @{
870 set _CHIPNAME $CHIPNAME
872 set _CHIPNAME sam7x256
875 if @{ [info exists ENDIAN] @} @{
881 if @{ [info exists CPUTAPID ] @} @{
882 set _CPUTAPID $CPUTAPID
884 set _CPUTAPID 0x3f0f0f0f
889 @subsection Creating Taps
890 After the ``defaults'' are choosen, [see above], the taps are created.
892 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
896 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
897 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
902 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
905 @item @b{Unform tap names} - See: Tap Naming Convention
906 @item @b{_TARGETNAME} is created at the end where used.
910 if @{ [info exists FLASHTAPID ] @} @{
911 set _FLASHTAPID $FLASHTAPID
913 set _FLASHTAPID 0x25966041
915 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
917 if @{ [info exists CPUTAPID ] @} @{
918 set _CPUTAPID $CPUTAPID
920 set _CPUTAPID 0x25966041
922 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
925 if @{ [info exists BSTAPID ] @} @{
926 set _BSTAPID $BSTAPID
928 set _BSTAPID 0x1457f041
930 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
932 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
935 @b{Tap Naming Convention}
937 See the command ``jtag newtap'' for detail, but in breif the names you should use are:
945 @item @b{unknownN} - it happens :-(
948 @subsection Reset Configuration
950 Some chips have specific ways the TRST and SRST signals are
951 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
952 @b{BOARD SPECIFIC} they go in the board file.
954 @subsection Work Areas
956 Work areas are small RAM areas used by OpenOCD to speed up downloads,
957 and to download small snippits of code to program flash chips.
959 If the chip includes an form of ``on-chip-ram'' - and many do - define
960 a reasonable work area and use the ``backup'' option.
962 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
963 inaccessable if/when the application code enables or disables the MMU.
965 @subsection ARM Core Specific Hacks
967 If the chip has a DCC, enable it. If the chip is an arm9 with some
968 special high speed download - enable it.
970 If the chip has an ARM ``vector catch'' feature - by defeault enable
971 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
972 user is really writing a handler for those situations - they can
973 easily disable it. Experiance has shown the ``vector catch'' is
974 helpful - for common programing errors.
976 If present, the MMU, the MPU and the CACHE should be disabled.
978 @subsection Internal Flash Configuration
980 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
982 @b{Never ever} in the ``target configuration file'' define any type of
983 flash that is external to the chip. (For example the BOOT flash on
984 Chip Select 0). The BOOT flash information goes in a board file - not
985 the TARGET (chip) file.
989 @item at91sam7x256 - has 256K flash YES enable it.
990 @item str912 - has flash internal YES enable it.
991 @item imx27 - uses boot flash on CS0 - it goes in the board file.
992 @item pxa270 - again - CS0 flash - it goes in the board file.
996 @chapter About JIM-Tcl
1000 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1001 learn more about JIM here: @url{http://jim.berlios.de}
1004 @item @b{JIM vrs TCL}
1005 @* JIM-TCL is a stripped down version of the well known Tcl language,
1006 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1007 fewer features. JIM-Tcl is a single .C file and a single .H file and
1008 impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
1009 4.2MEG zip file containing 1540 files.
1011 @item @b{Missing Features}
1012 @* Our practice has been: Add/clone the Real TCL feature if/when
1013 needed. We welcome JIM Tcl improvements, not bloat.
1016 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1017 command interpretor today (28/nov/2008) is a mixture of (newer)
1018 JIM-Tcl commands, and (older) the orginal command interpretor.
1021 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1022 can type a Tcl for() loop, set variables, etc.
1024 @item @b{Historical Note}
1025 @* JIM-Tcl was introduced to OpenOCD in Spring 2008.
1027 @item @b{Need a Crash Course In TCL?}
1028 @* See: @xref{TCL Crash Course}.
1032 @node Daemon Configuration
1033 @chapter Daemon Configuration
1034 The commands here are commonly found in the openocd.cfg file and are
1035 used to specify what TCP/IP ports are used, and how GDB should be
1039 This command terminates the configuration stage and
1040 enters the normal command mode. This can be useful to add commands to
1041 the startup scripts and commands such as resetting the target,
1042 programming flash, etc. To reset the CPU upon startup, add "init" and
1043 "reset" at the end of the config script or at the end of the OpenOCD
1044 command line using the @option{-c} command line switch.
1046 If this command does not appear in any startup/configuration file
1047 OpenOCD executes the command for you after processing all
1048 configuration files and/or command line options.
1050 @b{NOTE:} This command normally occurs at or near the end of your
1051 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1052 targets ready. For example: If your openocd.cfg file needs to
1053 read/write memory on your target - the init command must occur before
1054 the memory read/write commands.
1056 @section TCP/IP Ports
1058 @item @b{telnet_port} <@var{number}>
1060 @*Intended for a human. Port on which to listen for incoming telnet connections.
1062 @item @b{tcl_port} <@var{number}>
1064 @*Intended as a machine interface. Port on which to listen for
1065 incoming TCL syntax. This port is intended as a simplified RPC
1066 connection that can be used by clients to issue commands and get the
1067 output from the TCL engine.
1069 @item @b{gdb_port} <@var{number}>
1071 @*First port on which to listen for incoming GDB connections. The GDB port for the
1072 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1077 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
1078 @cindex gdb_breakpoint_override
1079 @anchor{gdb_breakpoint_override}
1080 @*Force breakpoint type for gdb 'break' commands.
1081 The raison d'etre for this option is to support GDB GUI's without
1082 a hard/soft breakpoint concept where the default OpenOCD and
1083 GDB behaviour is not sufficient. Note that GDB will use hardware
1084 breakpoints if the memory map has been set up for flash regions.
1086 This option replaces older arm7_9 target commands that addressed
1089 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1091 @*Configures what OpenOCD will do when gdb detaches from the daeman.
1092 Default behaviour is <@var{resume}>
1094 @item @b{gdb_memory_map} <@var{enable|disable}>
1095 @cindex gdb_memory_map
1096 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
1097 requested. gdb will then know when to set hardware breakpoints, and program flash
1098 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
1099 for flash programming to work.
1100 Default behaviour is <@var{enable}>
1101 @xref{gdb_flash_program}.
1103 @item @b{gdb_flash_program} <@var{enable|disable}>
1104 @cindex gdb_flash_program
1105 @anchor{gdb_flash_program}
1106 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1107 vFlash packet is received.
1108 Default behaviour is <@var{enable}>
1109 @comment END GDB Items
1112 @node Interface - Dongle Configuration
1113 @chapter Interface - Dongle Configuration
1114 Interface commands are normally found in an interface configuration
1115 file which is sourced by your openocd.cfg file. These commands tell
1116 OpenOCD what type of JTAG dongle you have and how to talk to it.
1117 @section Simple Complete Interface Examples
1118 @b{A Turtelizer FT2232 Based JTAG Dongle}
1122 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1123 ft2232_layout turtelizer2
1124 ft2232_vid_pid 0x0403 0xbdc8
1131 @b{A Raisonance RLink}
1140 parport_cable wiggler
1143 @section Interface Conmmand
1145 The interface command tells OpenOCD what type of jtag dongle you are
1146 using. Depending upon the type of dongle, you may need to have one or
1147 more additional commands.
1151 @item @b{interface} <@var{name}>
1153 @*Use the interface driver <@var{name}> to connect to the
1154 target. Currently supported interfaces are
1159 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1161 @item @b{amt_jtagaccel}
1162 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1166 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1167 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1168 platform. The libftdi uses libusb, and should be portable to all systems that provide
1172 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1175 @* ASIX PRESTO USB JTAG programmer.
1178 @* usbprog is a freely programmable USB adapter.
1181 @* Gateworks GW16012 JTAG programmer.
1184 @* Segger jlink usb adapter
1187 @* Raisonance RLink usb adapter
1190 @* vsllink is part of Versaloon which is a versatile USB programmer.
1191 @comment - End parameters
1193 @comment - End Interface
1195 @subsection parport options
1198 @item @b{parport_port} <@var{number}>
1199 @cindex parport_port
1200 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1201 the @file{/dev/parport} device
1203 When using PPDEV to access the parallel port, use the number of the parallel port:
1204 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1205 you may encounter a problem.
1206 @item @b{parport_cable} <@var{name}>
1207 @cindex parport_cable
1208 @*The layout of the parallel port cable used to connect to the target.
1209 Currently supported cables are
1213 The original Wiggler layout, also supported by several clones, such
1214 as the Olimex ARM-JTAG
1217 Same as original wiggler except an led is fitted on D5.
1218 @item @b{wiggler_ntrst_inverted}
1219 @cindex wiggler_ntrst_inverted
1220 Same as original wiggler except TRST is inverted.
1221 @item @b{old_amt_wiggler}
1222 @cindex old_amt_wiggler
1223 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1224 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1227 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1228 program the Chameleon itself, not a connected target.
1231 The Xilinx Parallel cable III.
1234 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1235 This is also the layout used by the HollyGates design
1236 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1239 The ST Parallel cable.
1242 Same as original wiggler except SRST and TRST connections reversed and
1243 TRST is also inverted.
1246 Altium Universal JTAG cable.
1248 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1249 @cindex parport_write_on_exit
1250 @*This will configure the parallel driver to write a known value to the parallel
1251 interface on exiting OpenOCD
1254 @subsection amt_jtagaccel options
1256 @item @b{parport_port} <@var{number}>
1257 @cindex parport_port
1258 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1259 @file{/dev/parport} device
1261 @subsection ft2232 options
1264 @item @b{ft2232_device_desc} <@var{description}>
1265 @cindex ft2232_device_desc
1266 @*The USB device description of the FTDI FT2232 device. If not
1267 specified, the FTDI default value is used. This setting is only valid
1268 if compiled with FTD2XX support.
1270 @b{TODO:} Confirm the following: On windows the name needs to end with
1271 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1272 this be added and when must it not be added? Why can't the code in the
1273 interface or in OpenOCD automatically add this if needed? -- Duane.
1275 @item @b{ft2232_serial} <@var{serial-number}>
1276 @cindex ft2232_serial
1277 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1279 @item @b{ft2232_layout} <@var{name}>
1280 @cindex ft2232_layout
1281 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1282 signals. Valid layouts are
1285 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1287 Amontec JTAGkey and JTAGkey-tiny
1288 @item @b{signalyzer}
1290 @item @b{olimex-jtag}
1293 American Microsystems M5960
1294 @item @b{evb_lm3s811}
1295 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1296 SRST signals on external connector
1299 @item @b{stm32stick}
1300 Hitex STM32 Performance Stick
1301 @item @b{flyswatter}
1302 Tin Can Tools Flyswatter
1303 @item @b{turtelizer2}
1304 egnite Software turtelizer2
1307 @item @b{axm0432_jtag}
1311 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1312 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1313 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
1315 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1317 @item @b{ft2232_latency} <@var{ms}>
1318 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
1319 ft2232_read() fails to return the expected number of bytes. This can be caused by
1320 USB communication delays and has proved hard to reproduce and debug. Setting the
1321 FT2232 latency timer to a larger value increases delays for short USB packages but it
1322 also reduces the risk of timeouts before receiving the expected number of bytes.
1323 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1326 @subsection ep93xx options
1327 @cindex ep93xx options
1328 Currently, there are no options available for the ep93xx interface.
1332 @item @b{jtag_khz} <@var{reset speed kHz}>
1335 It is debatable if this command belongs here - or in a board
1336 configuration file. In fact, in some situations the jtag speed is
1337 changed during the target initialization process (ie: (1) slow at
1338 reset, (2) program the cpu clocks, (3) run fast)
1340 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1342 Not all interfaces support ``rtck''. If the interface device can not
1343 support the rate asked for, or can not translate from kHz to
1344 jtag_speed, then an error is returned.
1346 Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
1347 especially true for synthesized cores (-S). Also see RTCK.
1349 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1350 please use the command: 'jtag_rclk FREQ'. This TCL proc (in
1351 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1352 the specified frequency.
1355 # Fall back to 3mhz if RCLK is not supported
1359 @item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
1361 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1362 speed. The actual effect of this option depends on the JTAG interface used.
1364 The speed used during reset can be adjusted using setting jtag_speed during
1365 pre_reset and post_reset events.
1368 @item wiggler: maximum speed / @var{number}
1369 @item ft2232: 6MHz / (@var{number}+1)
1370 @item amt jtagaccel: 8 / 2**@var{number}
1371 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1372 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1373 @comment end speed list.
1376 @comment END command list
1379 @node Reset Configuration
1380 @chapter Reset Configuration
1381 @cindex reset configuration
1383 Every system configuration may require a different reset
1384 configuration. This can also be quite confusing. Please see the
1385 various board files for example.
1387 @section jtag_nsrst_delay <@var{ms}>
1388 @cindex jtag_nsrst_delay
1389 @*How long (in milliseconds) OpenOCD should wait after deasserting
1390 nSRST before starting new JTAG operations.
1392 @section jtag_ntrst_delay <@var{ms}>
1393 @cindex jtag_ntrst_delay
1394 @*Same @b{jtag_nsrst_delay}, but for nTRST
1396 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1397 big resistor/capacitor, reset supervisor, or on-chip features). This
1398 keeps the signal asserted for some time after the external reset got
1401 @section reset_config
1403 @b{Note:} To maintainer types and integrators. Where exactly the
1404 ``reset configuration'' goes is a good question. It touches several
1405 things at once. In the end, if you have a board file - the board file
1406 should define it and assume 100% that the DONGLE supports
1407 anything. However, that does not mean the target should not also make
1408 not of something the silicon vendor has done inside the
1409 chip. @i{Grr.... nothing is every pretty.}
1413 @item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
1414 @item Every board is also slightly different; some boards tie TRST and SRST together.
1415 @item Every chip is slightly different; some chips internally tie the two signals together.
1416 @item Some may not impliment all of the signals the same way.
1417 @item Some signals might be push-pull, others open-drain/collector.
1419 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1420 reset the TAP via TRST and send commands through the JTAG tap to halt
1421 the CPU at the reset vector before the 1st instruction is executed,
1422 and finally release the SRST signal.
1423 @*Depending upon your board vendor, your chip vendor, etc, these
1424 signals may have slightly different names.
1426 OpenOCD defines these signals in these terms:
1428 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1429 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1435 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1436 @cindex reset_config
1437 @* The @t{reset_config} command tells OpenOCD the reset configuration
1438 of your combination of Dongle, Board, and Chips.
1439 If the JTAG interface provides SRST, but the target doesn't connect
1440 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1441 be @option{none}, @option{trst_only}, @option{srst_only} or
1442 @option{trst_and_srst}.
1444 [@var{combination}] is an optional value specifying broken reset
1445 signal implementations. @option{srst_pulls_trst} states that the
1446 testlogic is reset together with the reset of the system (e.g. Philips
1447 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1448 the system is reset together with the test logic (only hypothetical, I
1449 haven't seen hardware with such a bug, and can be worked around).
1450 @option{combined} imples both @option{srst_pulls_trst} and
1451 @option{trst_pulls_srst}. The default behaviour if no option given is
1454 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1455 driver type of the reset lines to be specified. Possible values are
1456 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1457 test reset signal, and @option{srst_open_drain} (default) and
1458 @option{srst_push_pull} for the system reset. These values only affect
1459 JTAG interfaces with support for different drivers, like the Amontec
1460 JTAGkey and JTAGAccelerator.
1462 @comment - end command
1468 @chapter Tap Creation
1469 @cindex tap creation
1470 @cindex tap configuration
1472 In order for OpenOCD to control a target, a JTAG tap must be
1475 Commands to create taps are normally found in a configuration file and
1476 are not normally typed by a human.
1478 When a tap is created a @b{dotted.name} is created for the tap. Other
1479 commands use that dotted.name to manipulate or refer to the tap.
1483 @item @b{Debug Target} A tap can be used by a GDB debug target
1484 @item @b{Flash Programing} Some chips program the flash via JTAG
1485 @item @b{Boundry Scan} Some chips support boundry scan.
1489 @section jtag newtap
1490 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1495 @cindex tap geometry
1497 @comment START options
1500 @* is a symbolic name of the chip.
1502 @* is a symbol name of a tap present on the chip.
1503 @item @b{Required configparams}
1504 @* Every tap has 3 required configparams, and several ``optional
1505 parameters'', the required parameters are:
1506 @comment START REQUIRED
1508 @item @b{-irlen NUMBER} - the length in bits of the instruction register
1509 @item @b{-ircapture NUMBER} - the ID code capture command.
1510 @item @b{-irmask NUMBER} - the corresponding mask for the ir register.
1511 @comment END REQUIRED
1513 An example of a FOOBAR Tap
1515 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1517 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1518 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1519 [6,4,2,0] are checked.
1521 FIXME: The IDCODE - this was not used in the old code, it should be?
1523 @item @b{Optional configparams}
1524 @comment START Optional
1526 @item @b{-expected-id NUMBER}
1527 @* By default it is zero. If non-zero represents the
1528 expected tap ID used when the Jtag Chain is examined. See below.
1531 @* By default not specified the tap is enabled. Some chips have a
1532 jtag route controller (JRC) that is used to enable and/or disable
1533 specific jtag taps. You can later enable or disable any JTAG tap via
1534 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1536 @comment END Optional
1539 @comment END OPTIONS
1542 @comment START NOTES
1544 @item @b{Technically}
1545 @* newtap is a sub command of the ``jtag'' command
1546 @item @b{Big Picture Background}
1547 @*GDB Talks to OpenOCD using the GDB protocol via
1548 tcpip. OpenOCD then uses the JTAG interface (the dongle) to
1549 control the JTAG chain on your board. Your board has one or more chips
1550 in a @i{daisy chain configuration}. Each chip may have one or more
1551 jtag taps. GDB ends up talking via OpenOCD to one of the taps.
1552 @item @b{NAME Rules}
1553 @*Names follow ``C'' symbol name rules (start with alpha ...)
1554 @item @b{TAPNAME - Conventions}
1556 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1557 @item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1558 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1559 @item @b{bs} - for boundary scan if this is a seperate tap.
1560 @item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
1561 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1562 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1563 @item @b{When in doubt} - use the chip makers name in their data sheet.
1565 @item @b{DOTTED.NAME}
1566 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1567 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1568 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1569 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1570 numerous other places to refer to various taps.
1572 @* The order this command appears via the config files is
1574 @item @b{Multi Tap Example}
1575 @* This example is based on the ST Microsystems STR912. See the ST
1576 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1577 28/102, Figure 3: Jtag chaining inside the STR91xFA}.
1579 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1580 @*@b{checked: 28/nov/2008}
1582 The diagram shows the TDO pin connects to the flash tap, flash TDI
1583 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1584 tap which then connects to the TDI pin.
1588 # create tap: 'str912.flash'
1589 jtag newtap str912 flash ... params ...
1590 # create tap: 'str912.cpu'
1591 jtag newtap str912 cpu ... params ...
1592 # create tap: 'str912.bs'
1593 jtag newtap str912 bs ... params ...
1596 @item @b{Note: Deprecated} - Index Numbers
1597 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1598 feature is still present, however its use is highly discouraged and
1599 should not be counted upon.
1600 @item @b{Multiple chips}
1601 @* If your board has multiple chips, you should be
1602 able to @b{source} two configuration files, in the proper order, and
1603 have the taps created in the proper order.
1606 @comment at command level
1607 @comment DOCUMENT old command
1608 @section jtag_device - REMOVED
1610 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1614 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1615 by the ``jtag newtap'' command. The documentation remains here so that
1616 one can easily convert the old syntax to the new syntax. About the old
1617 syntax: The old syntax is positional, ie: The 4th parameter is the
1618 ``irmask''. The new syntax requires named prefixes, and supports
1619 additional options, for example ``-irmask 4''. Please refer to the
1620 @b{jtag newtap} command for details.
1622 OLD: jtag_device 8 0x01 0x0e3 0xfe
1623 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0xe3 -irmask 0xfe
1626 @section Enable/Disable Taps
1627 @b{Note:} These commands are intended to be used as a machine/script
1628 interface. Humans might find the ``scan_chain'' command more helpful
1629 when querying the state of the JTAG taps.
1631 @b{By default, all taps are enabled}
1634 @item @b{jtag tapenable} @var{DOTTED.NAME}
1635 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1636 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1641 @cindex route controller
1643 These commands are used when your target has a JTAG Route controller
1644 that effectively adds or removes a tap from the jtag chain in a
1647 The ``standard way'' to remove a tap would be to place the tap in
1648 bypass mode. But with the advent of modern chips, this is not always a
1649 good solution. Some taps operate slowly, others operate fast, and
1650 there are other JTAG clock syncronization problems one must face. To
1651 solve that problem, the JTAG Route controller was introduced. Rather
1652 then ``bypass'' the tap, the tap is completely removed from the
1653 circuit and skipped.
1656 From OpenOCD's view point, a JTAG TAP is in one of 3 states:
1659 @item @b{Enabled - Not In ByPass} and has a variable bit length
1660 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1661 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1664 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1665 @b{Historical note:} this feature was added 28/nov/2008
1667 @b{jtag tapisenabled DOTTED.NAME}
1669 This command returns 1 if the named tap is currently enabled, 0 if not.
1670 This command exists so that scripts that manipulate a JRC (like the
1671 Omap3530 has) can determine if OpenOCD thinks a tap is presently
1672 enabled, or disabled.
1675 @node Target Configuration
1676 @chapter Target Configuration
1678 This chapter discusses how to create a GDB Debug Target. Before
1679 creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
1681 @section targets [NAME]
1682 @b{Note:} This command name is PLURAL - not singular.
1684 With NO parameter, this plural @b{targets} command lists all known
1685 targets in a human friendly form.
1687 With a parameter, this pural @b{targets} command sets the current
1688 target to the given name. (ie: If there are multiple debug targets)
1693 CmdName Type Endian ChainPos State
1694 -- ---------- ---------- ---------- -------- ----------
1695 0: target0 arm7tdmi little 0 halted
1698 @section target COMMANDS
1699 @b{Note:} This command name is SINGULAR - not plural. It is used to
1700 manipulate specific targets, to create targets and other things.
1702 Once a target is created, a TARGETNAME (object) command is created;
1703 see below for details.
1705 The TARGET command accepts these sub-commands:
1707 @item @b{create} .. parameters ..
1708 @* creates a new target, See below for details.
1710 @* Lists all supported target types (perhaps some are not yet in this document).
1712 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1714 foreach t [target names] {
1715 puts [format "Target: %s\n" $t]
1719 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1720 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1721 @item @b{number} @b{NUMBER}
1722 @* Internally OpenOCD maintains a list of targets - in numerical index
1723 (0..N-1) this command returns the name of the target at index N.
1726 set thename [target number $x]
1727 puts [format "Target %d is: %s\n" $x $thename]
1730 @* Returns the number of targets known to OpenOCD (see number above)
1733 set c [target count]
1734 for { set x 0 } { $x < $c } { incr x } {
1735 # Assuming you have created this function
1736 print_target_details $x
1742 @section TARGETNAME (object) commands
1743 @b{Use:} Once a target is created, an ``object name'' that represents the
1744 target is created. By convention, the target name is identical to the
1745 tap name. In a multiple target system, one can preceed many common
1746 commands with a specific target name and effect only that target.
1748 str912.cpu mww 0x1234 0x42
1749 omap3530.cpu mww 0x5555 123
1752 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1753 good example is a on screen button, once a button is created a button
1754 has a name (a path in TK terms) and that name is useable as a 1st
1755 class command. For example in TK, one can create a button and later
1756 configure it like this:
1760 button .foobar -background red -command @{ foo @}
1762 .foobar configure -foreground blue
1764 set x [.foobar cget -background]
1766 puts [format "The button is %s" $x]
1769 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1770 button. Commands avaialble as a ``target object'' are:
1772 @comment START targetobj commands.
1774 @item @b{configure} - configure the target; see Target Config/Cget Options below
1775 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1776 @item @b{curstate} - current target state (running, halt, etc)
1778 @* Intended for a human to see/read the currently configure target events.
1779 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1780 @comment start memory
1790 @item @b{Memory To Array, Array To Memory}
1791 @* These are aimed at a machine interface to memory
1793 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1794 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1796 @* @b{ARRAYNAME} is the name of an array variable
1797 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1798 @* @b{ADDRESS} is the target memory address
1799 @* @b{COUNT} is the number of elements to process
1801 @item @b{Used during ``reset''}
1802 @* These commands are used internally by the OpenOCD scripts to deal
1803 with odd reset situations and are not documented here.
1805 @item @b{arp_examine}
1809 @item @b{arp_waitstate}
1811 @item @b{invoke-event} @b{EVENT-NAME}
1812 @* Invokes the specific event manually for the target
1815 @section Target Events
1816 At various times, certain things can happen, or you want them to happen.
1820 @item What should happen when GDB connects? Should your target reset?
1821 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1822 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1825 All of the above items are handled by target events.
1827 To specify an event action, either during target creation, or later
1828 via ``$_TARGETNAME configure'' see this example.
1830 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1831 target event name, and BODY is a tcl procedure or string of commands
1834 The programmers model is the ``-command'' option used in Tcl/Tk
1835 buttons and events. Below are two identical examples, the first
1836 creates and invokes small procedure. The second inlines the procedure.
1839 proc my_attach_proc @{ @} @{
1843 mychip.cpu configure -event gdb-attach my_attach_proc
1844 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1847 @section Current Events
1848 The following events are available:
1850 @item @b{debug-halted}
1851 @* The target has halted for debug reasons (ie: breakpoint)
1852 @item @b{debug-resumed}
1853 @* The target has resumed (ie: gdb said run)
1854 @item @b{early-halted}
1855 @* Occurs early in the halt process
1856 @item @b{examine-end}
1857 @* Currently not used (goal: when JTAG examine completes)
1858 @item @b{examine-start}
1859 @* Currently not used (goal: when JTAG examine starts)
1860 @item @b{gdb-attach}
1861 @* When GDB connects
1862 @item @b{gdb-detach}
1863 @* When GDB disconnects
1865 @* When the taret has halted and GDB is not doing anything (see early halt)
1866 @item @b{gdb-flash-erase-start}
1867 @* Before the GDB flash process tries to erase the flash
1868 @item @b{gdb-flash-erase-end}
1869 @* After the GDB flash process has finished erasing the flash
1870 @item @b{gdb-flash-write-start}
1871 @* Before GDB writes to the flash
1872 @item @b{gdb-flash-write-end}
1873 @* After GDB writes to the flash
1875 @* Before the taret steps, gdb is trying to start/resume the tarfget
1877 @* The target has halted
1878 @item @b{old-gdb_program_config}
1879 @* DO NOT USE THIS: Used internally
1880 @item @b{old-pre_resume}
1881 @* DO NOT USE THIS: Used internally
1882 @item @b{reset-assert-pre}
1883 @* Before reset is asserted on the tap.
1884 @item @b{reset-assert-post}
1885 @* Reset is now asserted on the tap.
1886 @item @b{reset-deassert-pre}
1887 @* Reset is about to be released on the tap
1888 @item @b{reset-deassert-post}
1889 @* Reset has been released on the tap
1891 @* Currently not used.
1892 @item @b{reset-halt-post}
1893 @* Currently not usd
1894 @item @b{reset-halt-pre}
1895 @* Currently not used
1896 @item @b{reset-init}
1897 @* Currently not used
1898 @item @b{reset-start}
1899 @* Currently not used
1900 @item @b{reset-wait-pos}
1901 @* Currently not used
1902 @item @b{reset-wait-pre}
1903 @* Currently not used
1904 @item @b{resume-start}
1905 @* Before any target is resumed
1906 @item @b{resume-end}
1907 @* After all targets have resumed
1911 @* Target has resumed
1912 @item @b{tap-enable}
1913 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1915 jtag configure DOTTED.NAME -event tap-enable @{
1920 @item @b{tap-disable}
1921 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1923 jtag configure DOTTED.NAME -event tap-disable @{
1924 puts "Disabling CPU"
1931 @section target create
1933 @cindex target creation
1936 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1938 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1939 @comment START params
1942 @* Is the name of the debug target. By convention it should be the tap
1943 DOTTED.NAME, this name is also used to create the target object
1946 @* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
1947 @comment START types
1964 @*PARAMs are various target configure parameters, the following are mandatory
1966 @comment START mandatory
1968 @item @b{-endian big|little}
1969 @item @b{-chain-position DOTTED.NAME}
1970 @comment end MANDATORY
1975 @section Target Config/Cget Options
1976 These options can be specified when the target is created, or later
1977 via the configure option or to query the target via cget.
1979 @item @b{-type} - returns the target type
1980 @item @b{-event NAME BODY} see Target events
1981 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
1982 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
1983 @item @b{-work-area-size [ADDRESS]} specify/set the work area
1984 @item @b{-work-area-backup [0|1]} does the work area get backed up
1985 @item @b{-endian [big|little]}
1986 @item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
1987 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
1991 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
1992 set name [target number $x]
1993 set y [$name cget -endian]
1994 set z [$name cget -type]
1995 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
1999 @section Target Varients
2002 @* Unknown (please write me)
2004 @* Unknown (please write me) (simular to arm7tdmi)
2006 @* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
2007 This enables the hardware single-stepping support found on these
2012 @* None (this is also used as the ARM946)
2014 @* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
2015 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2016 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2017 be detected and the normal reset behaviour used.
2019 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2021 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2023 @* Use variant @option{ejtag_srst} when debugging targets that do not
2024 provide a functional SRST line on the EJTAG connector. This causes
2025 OpenOCD to instead use an EJTAG software reset command to reset the
2026 processor. You still need to enable @option{srst} on the reset
2027 configuration command to enable OpenOCD hardware reset functionality.
2028 @comment END varients
2030 @section working_area - Command Removed
2031 @cindex working_area
2032 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2033 @* This documentation remains because there are existing scripts that
2034 still use this that need to be converted.
2036 working_area target# address size backup| [virtualaddress]
2038 @* The target# is a the 0 based target numerical index.
2040 This command specifies a working area for the debugger to use. This
2041 may be used to speed-up downloads to target memory and flash
2042 operations, or to perform otherwise unavailable operations (some
2043 coprocessor operations on ARM7/9 systems, for example). The last
2044 parameter decides whether the memory should be preserved
2045 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2046 possible, use a working_area that doesn't need to be backed up, as
2047 performing a backup slows down operation.
2049 @node Flash Configuration
2050 @chapter Flash Programing
2051 @cindex Flash Configuration
2053 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2054 flash that a micro may boot from. Perhaps you the reader would like to
2055 contribute support for this.
2059 @item Configure via the command @b{flash bank}
2060 @* Normally this is done in a configuration file.
2061 @item Operate on the flash via @b{flash SOMECOMMAND}
2062 @* Often commands to manipulate the flash are typed by a human, or run
2063 via a script in some automated way. For example: To program the boot
2064 flash on your board.
2066 @* Flashing via GDB requires the flash be configured via ``flash
2067 bank'', and the GDB flash features be enabled. See the Daemon
2068 configuration section for more details.
2071 @section Flash commands
2072 @cindex Flash commands
2073 @subsection flash banks
2076 @*List configured flash banks
2077 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2078 @subsection flash info
2079 @b{flash info} <@var{num}>
2081 @*Print info about flash bank <@option{num}>
2082 @subsection flash probe
2083 @b{flash probe} <@var{num}>
2085 @*Identify the flash, or validate the parameters of the configured flash. Operation
2086 depends on the flash type.
2087 @subsection flash erase_check
2088 @b{flash erase_check} <@var{num}>
2089 @cindex flash erase_check
2090 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2091 updates the erase state information displayed by @option{flash info}. That means you have
2092 to issue an @option{erase_check} command after erasing or programming the device to get
2093 updated information.
2094 @subsection flash protect_check
2095 @b{flash protect_check} <@var{num}>
2096 @cindex flash protect_check
2097 @*Check protection state of sectors in flash bank <num>.
2098 @option{flash erase_sector} using the same syntax.
2099 @subsection flash erase_sector
2100 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2101 @cindex flash erase_sector
2102 @anchor{flash erase_sector}
2103 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2104 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2105 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2107 @subsection flash erase_address
2108 @b{flash erase_address} <@var{address}> <@var{length}>
2109 @cindex flash erase_address
2110 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2111 @subsection flash write_bank
2112 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2113 @cindex flash write_bank
2114 @anchor{flash write_bank}
2115 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2116 <@option{offset}> bytes from the beginning of the bank.
2117 @subsection flash write_image
2118 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2119 @cindex flash write_image
2120 @anchor{flash write_image}
2121 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2122 [@var{offset}] can be specified and the file [@var{type}] can be specified
2123 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2124 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2125 if the @option{erase} parameter is given.
2126 @subsection flash protect
2127 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2128 @cindex flash protect
2129 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2130 <@var{last}> of @option{flash bank} <@var{num}>.
2132 @subsection mFlash commands
2133 @cindex mFlash commands
2135 @item @b{mflash probe}
2136 @cindex mflash probe
2138 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2139 @cindex mflash write
2140 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2141 <@var{offset}> bytes from the beginning of the bank.
2142 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2144 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2148 @section flash bank command
2149 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2152 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2153 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2156 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2157 and <@var{bus_width}> bytes using the selected flash <driver>.
2159 @subsection External Flash - cfi options
2161 CFI flash are external flash chips - often they are connected to a
2162 specific chip select on the micro. By default at hard reset most
2163 micros have the ablity to ``boot'' from some flash chip - typically
2164 attached to the chips CS0 pin.
2166 For other chip selects: OpenOCD does not know how to configure, or
2167 access a specific chip select. Instead you the human might need to via
2168 other commands (like: mww) configure additional chip selects, or
2169 perhaps configure a GPIO pin that controls the ``write protect'' pin
2172 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2173 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2174 @*CFI flashes require the number of the target they're connected to as an additional
2175 argument. The CFI driver makes use of a working area (specified for the target)
2176 to significantly speed up operation.
2178 @var{chip_width} and @var{bus_width} are specified in bytes.
2180 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
2184 @subsection Internal Flash (Micro Controllers)
2185 @subsubsection lpc2000 options
2186 @cindex lpc2000 options
2188 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2189 <@var{clock}> [@var{calc_checksum}]
2190 @*LPC flashes don't require the chip and bus width to be specified. Additional
2191 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2192 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2193 of the target this flash belongs to (first is 0), the frequency at which the core
2194 is currently running (in kHz - must be an integral number), and the optional keyword
2195 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2199 @subsubsection at91sam7 options
2200 @cindex at91sam7 options
2202 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2203 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2204 reading the chip-id and type.
2206 @subsubsection str7 options
2207 @cindex str7 options
2209 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2210 @*variant can be either STR71x, STR73x or STR75x.
2212 @subsubsection str9 options
2213 @cindex str9 options
2215 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2216 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
2218 str9x flash_config 0 4 2 0 0x80000
2220 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2222 @subsubsection str9 options (str9xpec driver)
2224 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2225 @*Before using the flash commands the turbo mode will need enabling using str9xpec
2226 @option{enable_turbo} <@var{num>.}
2228 Only use this driver for locking/unlocking the device or configuring the option bytes.
2229 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2231 @subsubsection stellaris (LM3Sxxx) options
2232 @cindex stellaris (LM3Sxxx) options
2234 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2235 @*stellaris flash plugin only require the @var{target#}.
2237 @subsubsection stm32x options
2238 @cindex stm32x options
2240 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2241 @*stm32x flash plugin only require the @var{target#}.
2243 @subsubsection aduc702x options
2244 @cindex aduc702x options
2246 @b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2247 @*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
2249 @subsection mFlash configuration
2250 @cindex mFlash configuration
2251 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2252 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2254 @*Configures a mflash for <@var{soc}> host bank at
2255 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2256 order. Pin number format is dependent on host GPIO calling convention.
2257 If WP or DPD pin was not used, write -1. Currently, mflash bank
2258 support s3c2440 and pxa270.
2260 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2262 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2264 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2266 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2269 @section Micro Controller Specific Flash Commands
2271 @subsection AT91SAM7 specific commands
2272 @cindex AT91SAM7 specific commands
2273 The flash configuration is deduced from the chip identification register. The flash
2274 controller handles erases automatically on a page (128/265 byte) basis so erase is
2275 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2276 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2277 that can be erased separatly. Only an EraseAll command is supported by the controller
2278 for each flash plane and this is called with
2280 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2281 @*bulk erase flash planes first_plane to last_plane.
2282 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2283 @cindex at91sam7 gpnvm
2284 @*set or clear a gpnvm bit for the processor
2287 @subsection STR9 specific commands
2288 @cindex STR9 specific commands
2289 @anchor{STR9 specific commands}
2290 These are flash specific commands when using the str9xpec driver.
2292 @item @b{str9xpec enable_turbo} <@var{num}>
2293 @cindex str9xpec enable_turbo
2294 @*enable turbo mode, simply this will remove the str9 from the chain and talk
2295 directly to the embedded flash controller.
2296 @item @b{str9xpec disable_turbo} <@var{num}>
2297 @cindex str9xpec disable_turbo
2298 @*restore the str9 into jtag chain.
2299 @item @b{str9xpec lock} <@var{num}>
2300 @cindex str9xpec lock
2301 @*lock str9 device. The str9 will only respond to an unlock command that will
2303 @item @b{str9xpec unlock} <@var{num}>
2304 @cindex str9xpec unlock
2305 @*unlock str9 device.
2306 @item @b{str9xpec options_read} <@var{num}>
2307 @cindex str9xpec options_read
2308 @*read str9 option bytes.
2309 @item @b{str9xpec options_write} <@var{num}>
2310 @cindex str9xpec options_write
2311 @*write str9 option bytes.
2314 Note: Before using the str9xpec driver here is some background info to help
2315 you better understand how the drivers works. OpenOCD has two flash drivers for
2319 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2320 flash programming as it is faster than the @option{str9xpec} driver.
2322 Direct programming @option{str9xpec} using the flash controller, this is
2323 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2324 core does not need to be running to program using this flash driver. Typical use
2325 for this driver is locking/unlocking the target and programming the option bytes.
2328 Before we run any cmds using the @option{str9xpec} driver we must first disable
2329 the str9 core. This example assumes the @option{str9xpec} driver has been
2330 configured for flash bank 0.
2332 # assert srst, we do not want core running
2333 # while accessing str9xpec flash driver
2335 # turn off target polling
2338 str9xpec enable_turbo 0
2340 str9xpec options_read 0
2341 # re-enable str9 core
2342 str9xpec disable_turbo 0
2346 The above example will read the str9 option bytes.
2347 When performing a unlock remember that you will not be able to halt the str9 - it
2348 has been locked. Halting the core is not required for the @option{str9xpec} driver
2349 as mentioned above, just issue the cmds above manually or from a telnet prompt.
2351 @subsection STR9 configuration
2352 @cindex STR9 configuration
2354 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2355 <@var{BBADR}> <@var{NBBADR}>
2356 @cindex str9x flash_config
2357 @*Configure str9 flash controller.
2359 eg. str9x flash_config 0 4 2 0 0x80000
2361 BBSR - Boot Bank Size register
2362 NBBSR - Non Boot Bank Size register
2363 BBADR - Boot Bank Start Address register
2364 NBBADR - Boot Bank Start Address register
2368 @subsection STR9 option byte configuration
2369 @cindex STR9 option byte configuration
2371 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2372 @cindex str9xpec options_cmap
2373 @*configure str9 boot bank.
2374 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2375 @cindex str9xpec options_lvdthd
2376 @*configure str9 lvd threshold.
2377 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2378 @cindex str9xpec options_lvdsel
2379 @*configure str9 lvd source.
2380 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2381 @cindex str9xpec options_lvdwarn
2382 @*configure str9 lvd reset warning source.
2385 @subsection STM32x specific commands
2386 @cindex STM32x specific commands
2388 These are flash specific commands when using the stm32x driver.
2390 @item @b{stm32x lock} <@var{num}>
2392 @*lock stm32 device.
2393 @item @b{stm32x unlock} <@var{num}>
2394 @cindex stm32x unlock
2395 @*unlock stm32 device.
2396 @item @b{stm32x options_read} <@var{num}>
2397 @cindex stm32x options_read
2398 @*read stm32 option bytes.
2399 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2400 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2401 @cindex stm32x options_write
2402 @*write stm32 option bytes.
2403 @item @b{stm32x mass_erase} <@var{num}>
2404 @cindex stm32x mass_erase
2405 @*mass erase flash memory.
2408 @subsection Stellaris specific commands
2409 @cindex Stellaris specific commands
2411 These are flash specific commands when using the Stellaris driver.
2413 @item @b{stellaris mass_erase} <@var{num}>
2414 @cindex stellaris mass_erase
2415 @*mass erase flash memory.
2419 @node General Commands
2420 @chapter General Commands
2423 The commands documented in this chapter here are common commands that
2424 you a human may want to type and see the output of. Configuration type
2425 commands are documented elsewhere.
2429 @item @b{Source Of Commands}
2430 @* OpenOCD commands can occur in a configuration script (discussed
2431 elsewhere) or typed manually by a human or supplied programatically,
2432 or via one of several Tcp/Ip Ports.
2434 @item @b{From the human}
2435 @* A human should interact with the Telnet interface (default port: 4444,
2436 or via GDB, default port 3333)
2438 To issue commands from within a GDB session, use the @option{monitor}
2439 command, e.g. use @option{monitor poll} to issue the @option{poll}
2440 command. All output is relayed through the GDB session.
2442 @item @b{Machine Interface}
2443 The TCL interface intent is to be a machine interface. The default TCL
2448 @section Daemon Commands
2450 @subsection sleep [@var{msec}]
2452 @*Wait for n milliseconds before resuming. Useful in connection with script files
2453 (@var{script} command and @var{target_script} configuration).
2455 @subsection shutdown
2457 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
2459 @subsection debug_level [@var{n}]
2461 @anchor{debug_level}
2462 @*Display or adjust debug level to n<0-3>
2464 @subsection fast [@var{enable|disable}]
2466 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2467 downloads and fast memory access will work if the JTAG interface isn't too fast and
2468 the core doesn't run at a too low frequency. Note that this option only changes the default
2469 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2472 The target specific "dangerous" optimisation tweaking options may come and go
2473 as more robust and user friendly ways are found to ensure maximum throughput
2474 and robustness with a minimum of configuration.
2476 Typically the "fast enable" is specified first on the command line:
2479 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2482 @subsection log_output <@var{file}>
2484 @*Redirect logging to <file> (default: stderr)
2486 @subsection script <@var{file}>
2488 @*Execute commands from <file>
2489 Also see: ``source [find FILENAME]''
2491 @section Target state handling
2492 @subsection power <@var{on}|@var{off}>
2494 @*Turn power switch to target on/off.
2495 No arguments: print status.
2496 Not all interfaces support this.
2498 @subsection reg [@option{#}|@option{name}] [value]
2500 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2501 No arguments: list all available registers for the current target.
2502 Number or name argument: display a register
2503 Number or name and value arguments: set register value
2505 @subsection poll [@option{on}|@option{off}]
2507 @*Poll the target for its current state. If the target is in debug mode, architecture
2508 specific information about the current state is printed. An optional parameter
2509 allows continuous polling to be enabled and disabled.
2511 @subsection halt [@option{ms}]
2513 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2514 Default [@option{ms}] is 5 seconds if no arg given.
2515 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2516 will stop OpenOCD from waiting.
2518 @subsection wait_halt [@option{ms}]
2520 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2521 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2524 @subsection resume [@var{address}]
2526 @*Resume the target at its current code position, or at an optional address.
2527 OpenOCD will wait 5 seconds for the target to resume.
2529 @subsection step [@var{address}]
2531 @*Single-step the target at its current code position, or at an optional address.
2533 @subsection reset [@option{run}|@option{halt}|@option{init}]
2535 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2537 With no arguments a "reset run" is executed
2541 @*Let the target run.
2544 @*Immediately halt the target (works only with certain configurations).
2547 @*Immediately halt the target, and execute the reset script (works only with certain
2551 @subsection soft_reset_halt
2553 @*Requesting target halt and executing a soft reset. This often used
2554 when a target cannot be reset and halted. The target, after reset is
2555 released begins to execute code. OpenOCD attempts to stop the CPU and
2556 then sets the Program counter back at the reset vector. Unfortunatlly
2557 that code that was executed may have left hardware in an unknown
2561 @section Memory access commands
2563 display available ram memory.
2564 @subsection Memory Peek/Poke type commands
2565 These commands allow accesses of a specific size to the memory
2566 system. Often these are used to configure the current target in some
2567 special way. For example - one may need to write certian values to the
2568 SDRAM controller to enable SDRAM.
2571 @item To change the current target see the ``targets'' (plural) command
2572 @item In system level scripts these commands are depricated, please use the TARGET object versions.
2576 @item @b{mdw} <@var{addr}> [@var{count}]
2578 @*display memory words (32bit)
2579 @item @b{mdh} <@var{addr}> [@var{count}]
2581 @*display memory half-words (16bit)
2582 @item @b{mdb} <@var{addr}> [@var{count}]
2584 @*display memory bytes (8bit)
2585 @item @b{mww} <@var{addr}> <@var{value}>
2587 @*write memory word (32bit)
2588 @item @b{mwh} <@var{addr}> <@var{value}>
2590 @*write memory half-word (16bit)
2591 @item @b{mwb} <@var{addr}> <@var{value}>
2593 @*write memory byte (8bit)
2596 @section Image Loading Commands
2597 @subsection load_image
2598 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2601 @*Load image <@var{file}> to target memory at <@var{address}>
2602 @subsection fast_load_image
2603 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2604 @cindex fast_load_image
2605 @anchor{fast_load_image}
2606 @*Normally you should be using @b{load_image} or GDB load. However, for
2607 testing purposes or when IO overhead is significant(OpenOCD running on embedded
2608 host), then storing the image in memory and uploading the image to the target
2609 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2610 Arguments as @b{load_image}, but image is stored in OpenOCD host
2611 memory, i.e. does not affect target. This approach is also useful when profiling
2612 target programming performance as IO and target programming can easily be profiled
2614 @subsection fast_load
2618 @*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
2619 @subsection dump_image
2620 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2623 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2624 (binary) <@var{file}>.
2625 @subsection verify_image
2626 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2627 @cindex verify_image
2628 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2629 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
2632 @section Breakpoint commands
2633 @cindex Breakpoint commands
2635 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2637 @*set breakpoint <address> <length> [hw]
2638 @item @b{rbp} <@var{addr}>
2640 @*remove breakpoint <adress>
2641 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2643 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2644 @item @b{rwp} <@var{addr}>
2646 @*remove watchpoint <adress>
2649 @section Misc Commands
2650 @cindex Other Target Commands
2652 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2654 Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
2657 @section Target Specific Commands
2658 @cindex Target Specific Commands
2662 @section Architecture Specific Commands
2663 @cindex Architecture Specific Commands
2665 @subsection ARMV4/5 specific commands
2666 @cindex ARMV4/5 specific commands
2668 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2669 or Intel XScale (XScale isn't supported yet).
2671 @item @b{armv4_5 reg}
2673 @*Display a list of all banked core registers, fetching the current value from every
2674 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2676 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2677 @cindex armv4_5 core_mode
2678 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2679 The target is resumed in the currently set @option{core_mode}.
2682 @subsection ARM7/9 specific commands
2683 @cindex ARM7/9 specific commands
2685 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2686 ARM920t or ARM926EJ-S.
2688 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2689 @cindex arm7_9 dbgrq
2690 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2691 safe for all but ARM7TDMI--S cores (like Philips LPC).
2692 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2693 @cindex arm7_9 fast_memory_access
2694 @anchor{arm7_9 fast_memory_access}
2695 @*Allow OpenOCD to read and write memory without checking completion of
2696 the operation. This provides a huge speed increase, especially with USB JTAG
2697 cables (FT2232), but might be unsafe if used with targets running at a very low
2698 speed, like the 32kHz startup clock of an AT91RM9200.
2699 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2700 @cindex arm7_9 dcc_downloads
2701 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2702 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2703 unsafe, especially with targets running at a very low speed. This command was introduced
2704 with OpenOCD rev. 60.
2707 @subsection ARM720T specific commands
2708 @cindex ARM720T specific commands
2711 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2712 @cindex arm720t cp15
2713 @*display/modify cp15 register <@option{num}> [@option{value}].
2714 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2715 @cindex arm720t md<bhw>_phys
2716 @*Display memory at physical address addr.
2717 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2718 @cindex arm720t mw<bhw>_phys
2719 @*Write memory at physical address addr.
2720 @item @b{arm720t virt2phys} <@var{va}>
2721 @cindex arm720t virt2phys
2722 @*Translate a virtual address to a physical address.
2725 @subsection ARM9TDMI specific commands
2726 @cindex ARM9TDMI specific commands
2729 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2730 @cindex arm9tdmi vector_catch
2731 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2732 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2733 @option{irq} @option{fiq}.
2735 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
2738 @subsection ARM966E specific commands
2739 @cindex ARM966E specific commands
2742 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2743 @cindex arm966e cp15
2744 @*display/modify cp15 register <@option{num}> [@option{value}].
2747 @subsection ARM920T specific commands
2748 @cindex ARM920T specific commands
2751 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2752 @cindex arm920t cp15
2753 @*display/modify cp15 register <@option{num}> [@option{value}].
2754 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2755 @cindex arm920t cp15i
2756 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2757 @item @b{arm920t cache_info}
2758 @cindex arm920t cache_info
2759 @*Print information about the caches found. This allows you to see if your target
2760 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2761 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2762 @cindex arm920t md<bhw>_phys
2763 @*Display memory at physical address addr.
2764 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2765 @cindex arm920t mw<bhw>_phys
2766 @*Write memory at physical address addr.
2767 @item @b{arm920t read_cache} <@var{filename}>
2768 @cindex arm920t read_cache
2769 @*Dump the content of ICache and DCache to a file.
2770 @item @b{arm920t read_mmu} <@var{filename}>
2771 @cindex arm920t read_mmu
2772 @*Dump the content of the ITLB and DTLB to a file.
2773 @item @b{arm920t virt2phys} <@var{va}>
2774 @cindex arm920t virt2phys
2775 @*Translate a virtual address to a physical address.
2778 @subsection ARM926EJS specific commands
2779 @cindex ARM926EJS specific commands
2782 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2783 @cindex arm926ejs cp15
2784 @*display/modify cp15 register <@option{num}> [@option{value}].
2785 @item @b{arm926ejs cache_info}
2786 @cindex arm926ejs cache_info
2787 @*Print information about the caches found.
2788 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2789 @cindex arm926ejs md<bhw>_phys
2790 @*Display memory at physical address addr.
2791 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2792 @cindex arm926ejs mw<bhw>_phys
2793 @*Write memory at physical address addr.
2794 @item @b{arm926ejs virt2phys} <@var{va}>
2795 @cindex arm926ejs virt2phys
2796 @*Translate a virtual address to a physical address.
2799 @subsection CORTEX_M3 specific commands
2800 @cindex CORTEX_M3 specific commands
2803 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2804 @cindex cortex_m3 maskisr
2805 @*Enable masking (disabling) interrupts during target step/resume.
2809 @section Debug commands
2810 @cindex Debug commands
2811 The following commands give direct access to the core, and are most likely
2812 only useful while debugging OpenOCD.
2814 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2815 @cindex arm7_9 write_xpsr
2816 @*Immediately write either the current program status register (CPSR) or the saved
2817 program status register (SPSR), without changing the register cache (as displayed
2818 by the @option{reg} and @option{armv4_5 reg} commands).
2819 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2820 <@var{0=cpsr},@var{1=spsr}>
2821 @cindex arm7_9 write_xpsr_im8
2822 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2823 operation (similar to @option{write_xpsr}).
2824 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2825 @cindex arm7_9 write_core_reg
2826 @*Write a core register, without changing the register cache (as displayed by the
2827 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2828 encoding of the [M4:M0] bits of the PSR.
2831 @section Target Requests
2832 @cindex Target Requests
2833 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2834 See libdcc in the contrib dir for more details.
2836 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2837 @cindex target_request debugmsgs
2838 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2842 @chapter JTAG Commands
2843 @cindex JTAG commands
2844 Generally most people will not use the bulk of these commands. They
2845 are mostly used by the OpenOCD developers or those who need to
2846 directly manipulate the JTAG taps.
2848 In general these commands control JTAG taps at a very low level. For
2849 example if you need to control a JTAG Route Controller (ie: the
2850 OMAP3530 on the Beagle Board has one) you might use these commands in
2851 a script or an event procedure.
2855 @item @b{scan_chain}
2857 @*Print current scan chain configuration.
2858 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2860 @*Toggle reset lines.
2861 @item @b{endstate} <@var{tap_state}>
2863 @*Finish JTAG operations in <@var{tap_state}>.
2864 @item @b{runtest} <@var{num_cycles}>
2866 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2867 @item @b{statemove} [@var{tap_state}]
2869 @*Move to current endstate or [@var{tap_state}]
2870 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2872 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2873 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2875 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2876 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2877 @cindex verify_ircapture
2878 @*Verify value captured during Capture-IR. Default is enabled.
2879 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2881 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2882 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2884 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2889 Available tap_states are:
2929 If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
2930 be used to access files on PCs(either developer PC or some other PC).
2932 The way this works on the ZY1000 is to prefix a filename by
2933 "/tftp/ip/" and append the tftp path on the tftp
2934 server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2935 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2936 if the file was hosted on the embedded host.
2938 In order to achieve decent performance, you must choose a tftp server
2939 that supports a packet size bigger than the default packet size(512 bytes). There
2940 are numerous tftp servers out there(free and commercial) and you will have to do
2941 a bit of googling to find something that fits your requirements.
2943 @node Sample Scripts
2944 @chapter Sample Scripts
2947 This page shows how to use the target library.
2949 The configuration script can be divided in the following section:
2951 @item daemon configuration
2953 @item jtag scan chain
2954 @item target configuration
2955 @item flash configuration
2958 Detailed information about each section can be found at OpenOCD configuration.
2960 @section AT91R40008 example
2961 @cindex AT91R40008 example
2962 To start OpenOCD with a target script for the AT91R40008 CPU and reset
2963 the CPU upon startup of the OpenOCD daemon.
2965 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
2969 @node GDB and OpenOCD
2970 @chapter GDB and OpenOCD
2971 @cindex GDB and OpenOCD
2972 OpenOCD complies with the remote gdbserver protocol, and as such can be used
2973 to debug remote targets.
2975 @section Connecting to GDB
2976 @cindex Connecting to GDB
2977 @anchor{Connecting to GDB}
2978 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
2979 instance 6.3 has a known bug where it produces bogus memory access
2980 errors, which has since been fixed: look up 1836 in
2981 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
2983 @*OpenOCD can communicate with GDB in two ways:
2986 A socket (tcp) connection is typically started as follows:
2988 target remote localhost:3333
2990 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
2992 A pipe connection is typically started as follows:
2994 target remote openocd --pipe
2996 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
2997 Using this method has the advantage of GDB starting/stopping OpenOCD for debug session.
3000 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3003 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3004 to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
3005 packet size and device memory map.
3007 Previous versions of OpenOCD required the following GDB options to increase
3008 the packet size and speed up GDB communication.
3010 set remote memory-write-packet-size 1024
3011 set remote memory-write-packet-size fixed
3012 set remote memory-read-packet-size 1024
3013 set remote memory-read-packet-size fixed
3015 This is now handled in the @option{qSupported} PacketSize and should not be required.
3017 @section Programming using GDB
3018 @cindex Programming using GDB
3020 By default the target memory map is sent to GDB, this can be disabled by
3021 the following OpenOCD config option:
3023 gdb_memory_map disable
3025 For this to function correctly a valid flash config must also be configured
3026 in OpenOCD. For faster performance you should also configure a valid
3029 Informing GDB of the memory map of the target will enable GDB to protect any
3030 flash area of the target and use hardware breakpoints by default. This means
3031 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3032 using a memory map. @xref{gdb_breakpoint_override}.
3034 To view the configured memory map in GDB, use the gdb command @option{info mem}
3035 All other unasigned addresses within GDB are treated as RAM.
3037 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
3038 this can be changed to the old behaviour by using the following GDB command.
3040 set mem inaccessible-by-default off
3043 If @option{gdb_flash_program enable} is also used, GDB will be able to
3044 program any flash memory using the vFlash interface.
3046 GDB will look at the target memory map when a load command is given, if any
3047 areas to be programmed lie within the target flash area the vFlash packets
3050 If the target needs configuring before GDB programming, an event
3051 script can be executed.
3053 $_TARGETNAME configure -event EVENTNAME BODY
3056 To verify any flash programming the GDB command @option{compare-sections}
3059 @node TCL scripting API
3060 @chapter TCL scripting API
3061 @cindex TCL scripting API
3064 The commands are stateless. E.g. the telnet command line has a concept
3065 of currently active target, the Tcl API proc's take this sort of state
3066 information as an argument to each proc.
3068 There are three main types of return values: single value, name value
3069 pair list and lists.
3071 Name value pair. The proc 'foo' below returns a name/value pair
3077 > set foo(you) Oyvind
3078 > set foo(mouse) Micky
3079 > set foo(duck) Donald
3087 me Duane you Oyvind mouse Micky duck Donald
3089 Thus, to get the names of the associative array is easy:
3091 foreach { name value } [set foo] {
3092 puts "Name: $name, Value: $value"
3096 Lists returned must be relatively small. Otherwise a range
3097 should be passed in to the proc in question.
3099 Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
3100 is the low level API upon which "flash banks" is implemented.
3103 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3105 Read memory and return as a TCL array for script processing
3106 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3108 Convert a TCL array to memory locations and write the values
3109 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3111 Return information about the flash banks
3114 OpenOCD commands can consist of two words, e.g. "flash banks". The
3115 startup.tcl "unknown" proc will translate this into a tcl proc
3116 called "flash_banks".
3120 @chapter Deprecated/Removed Commands
3121 @cindex Deprecated/Removed Commands
3122 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3125 @item @b{arm7_9 fast_writes}
3126 @cindex arm7_9 fast_writes
3127 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3128 @item @b{arm7_9 force_hw_bkpts}
3129 @cindex arm7_9 force_hw_bkpts
3130 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3131 for flash if the gdb memory map has been set up(default when flash is declared in
3132 target configuration). @xref{gdb_breakpoint_override}.
3133 @item @b{arm7_9 sw_bkpts}
3134 @cindex arm7_9 sw_bkpts
3135 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3136 @item @b{daemon_startup}
3137 @cindex daemon_startup
3138 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3139 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3140 and @option{target cortex_m3 little reset_halt 0}.
3141 @item @b{dump_binary}
3143 @*use @option{dump_image} command with same args. @xref{dump_image}.
3144 @item @b{flash erase}
3146 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3147 @item @b{flash write}
3149 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3150 @item @b{flash write_binary}
3151 @cindex flash write_binary
3152 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3153 @item @b{flash auto_erase}
3154 @cindex flash auto_erase
3155 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3156 @item @b{load_binary}
3158 @*use @option{load_image} command with same args. @xref{load_image}.
3159 @item @b{run_and_halt_time}
3160 @cindex run_and_halt_time
3161 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3168 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3170 @*use the create subcommand of @option{target}.
3171 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3172 @cindex target_script
3173 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3174 @item @b{working_area}
3175 @cindex working_area
3176 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3183 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3185 @cindex adaptive clocking
3188 In digital circuit design it is often refered to as ``clock
3189 syncronization'' the JTAG interface uses one clock (TCK or TCLK)
3190 operating at some speed, your target is operating at another. The two
3191 clocks are not syncronized, they are ``asynchronous''
3193 In order for the two to work together they must syncronize. Otherwise
3194 the two systems will get out of sync with each other and nothing will
3195 work. There are 2 basic options. @b{1.} use a special circuit or
3196 @b{2.} one clock must be some multile slower the the other.
3198 @b{Does this really matter?} For some chips and some situations, this
3199 is a non-issue (ie: A 500mhz ARM926) but for others - for example some
3200 ATMEL SAM7 and SAM9 chips start operation from reset at 32khz -
3201 program/enable the oscillators and eventually the main clock. It is in
3202 those critical times you must slow the jtag clock to sometimes 1 to
3205 Imagine debugging that 500mhz arm926 hand held battery powered device
3206 that ``deep sleeps'' at 32khz between every keystroke. It can be
3209 @b{Solution #1 - A special circuit}
3211 In order to make use of this your jtag dongle must support the RTCK
3212 feature. Not all dongles support this - keep reading!
3214 The RTCK signal often found in some ARM chips is used to help with
3215 this problem. ARM has a good description of the problem described at
3216 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3217 28/nov/2008]. Link title: ``How does the jtag synchronisation logic
3218 work? / how does adaptive clocking working?''.
3220 The nice thing about adaptive clocking is that ``battery powered hand
3221 held device example'' - the adaptiveness works perfectly all the
3222 time. One can set a break point or halt the system in the deep power
3223 down code, slow step out until the system speeds up.
3225 @b{Solution #2 - Always works - but is slower}
3227 Often this is a perfectly acceptable solution.
3229 In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3230 the target clock speed. But what is that ``magic division'' it varies
3231 depending upon the chips on your board. @b{ARM Rule of thumb} Most ARM
3232 based systems require an 8:1 division. @b{Xilinx Rule of thumb} is
3233 1/12 the clock speed.
3235 Note: Many FTDI2232C based JTAG dongles are limited to 6mhz.
3237 You can still debug the 'lower power' situations - you just need to
3238 manually adjust the clock speed at every step. While painful and
3239 teadious, it is not always practical.
3241 It is however easy to ``code your way around it'' - ie: Cheat a little
3242 have a special debug mode in your application that does a ``high power
3243 sleep''. If you are careful - 98% of your problems can be debugged
3246 To set the JTAG frequency use the command:
3254 @item @b{Win32 Pathnames} Why does not backslashes in paths under Windows doesn't work?
3256 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3257 around Windows filenames.
3270 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3272 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3273 claims to come with all the necessary dlls. When using Cygwin, try launching
3274 OpenOCD from the Cygwin shell.
3276 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3277 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3278 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3280 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3281 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
3282 software breakpoints consume one of the two available hardware breakpoints.
3284 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
3285 and works sometimes fine.
3287 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3288 clock at the time you're programming the flash. If you've specified the crystal's
3289 frequency, make sure the PLL is disabled, if you've specified the full core speed
3290 (e.g. 60MHz), make sure the PLL is enabled.
3292 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3293 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3294 out while waiting for end of scan, rtck was disabled".
3296 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3297 settings in your PC BIOS (ECP, EPP, and different versions of those).
3299 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3300 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3301 memory read caused data abort".
3303 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3304 beyond the last valid frame. It might be possible to prevent this by setting up
3305 a proper "initial" stack frame, if you happen to know what exactly has to
3306 be done, feel free to add this here.
3308 @b{Simple:} In your startup code - push 8 registers of ZEROs onto the
3309 stack before calling main(). What GDB is doing is ``climbing'' the run
3310 time stack by reading various values on the stack using the standard
3311 call frame for the target. GDB keeps going - until one of 2 things
3312 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3313 stackframes have been processed. By pushing ZEROs on the stack, GDB
3316 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3317 your C code, do the same, artifically push some zeros on to the stack,
3318 remember to pop them off when the ISR is done.
3320 @b{Also note:} If you have a multi-threaded operating system, they
3321 often do not @b{in the intrest of saving memory} waste these few
3325 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3326 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3328 This warning doesn't indicate any serious problem, as long as you don't want to
3329 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3330 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3331 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3332 independently. With this setup, it's not possible to halt the core right out of
3333 reset, everything else should work fine.
3335 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3336 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3337 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3338 quit with an error message. Is there a stability issue with OpenOCD?
3340 No, this is not a stability issue concerning OpenOCD. Most users have solved
3341 this issue by simply using a self-powered USB hub, which they connect their
3342 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3343 supply stable enough for the Amontec JTAGkey to be operated.
3345 @b{Laptops running on battery have this problem too...}
3347 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3348 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3349 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3350 What does that mean and what might be the reason for this?
3352 First of all, the reason might be the USB power supply. Try using a self-powered
3353 hub instead of a direct connection to your computer. Secondly, the error code 4
3354 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3355 chip ran into some sort of error - this points us to a USB problem.
3357 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3358 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3359 What does that mean and what might be the reason for this?
3361 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3362 has closed the connection to OpenOCD. This might be a GDB issue.
3364 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3365 are described, there is a parameter for specifying the clock frequency
3366 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3367 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3368 specified in kilohertz. However, I do have a quartz crystal of a
3369 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3370 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3373 No. The clock frequency specified here must be given as an integral number.
3374 However, this clock frequency is used by the In-Application-Programming (IAP)
3375 routines of the LPC2000 family only, which seems to be very tolerant concerning
3376 the given clock frequency, so a slight difference between the specified clock
3377 frequency and the actual clock frequency will not cause any trouble.
3379 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3381 Well, yes and no. Commands can be given in arbitrary order, yet the
3382 devices listed for the JTAG scan chain must be given in the right
3383 order (jtag newdevice), with the device closest to the TDO-Pin being
3384 listed first. In general, whenever objects of the same type exist
3385 which require an index number, then these objects must be given in the
3386 right order (jtag newtap, targets and flash banks - a target
3387 references a jtag newtap and a flash bank references a target).
3389 You can use the ``scan_chain'' command to verify and display the tap order.
3391 @item @b{JTAG Tap Order} JTAG Tap Order - Command Order
3393 Many newer devices have multiple JTAG taps. For example: ST
3394 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3395 ``cortexM3'' tap. Example: The STM32 reference manual, Document ID:
3396 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3397 connected to the Boundary Scan Tap, which then connects to the
3398 CortexM3 Tap, which then connects to the TDO pin.
3400 Thus, the proper order for the STM32 chip is: (1) The CortexM3, then
3401 (2) The Boundary Scan Tap. If your board includes an additional JTAG
3402 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3403 place it before or after the stm32 chip in the chain. For example:
3406 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3407 @item STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)
3408 @item STM32 CortexM3 TDO (output) -> SM32 TDO Pin
3409 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3410 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3413 The ``jtag device'' commands would thus be in the order shown below. Note
3416 @item jtag newtap Xilinx tap -irlen ...
3417 @item jtag newtap stm32 cpu -irlen ...
3418 @item jtag newtap stm32 bs -irlen ...
3419 @item # Create the debug target and say where it is
3420 @item target create stm32.cpu -chain-position stm32.cpu ...
3424 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3425 log file, I can see these error messages: Error: arm7_9_common.c:561
3426 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3432 @node TCL Crash Course
3433 @chapter TCL Crash Course
3436 Not everyone knows TCL - this is not intended to be a replacement for
3437 learning TCL, the intent of this chapter is to give you some idea of
3438 how the TCL Scripts work.
3440 This chapter is written with two audiences in mind. (1) OpenOCD users
3441 who need to understand a bit more of how JIM-Tcl works so they can do
3442 something useful, and (2) those that want to add a new command to
3445 @section TCL Rule #1
3446 There is a famous joke, it goes like this:
3448 @item Rule #1: The wife is always correct
3449 @item Rule #2: If you think otherwise, See Rule #1
3452 The TCL equal is this:
3455 @item Rule #1: Everything is a string
3456 @item Rule #2: If you think otherwise, See Rule #1
3459 As in the famous joke, the consequences of Rule #1 are profound. Once
3460 you understand Rule #1, you will understand TCL.
3462 @section TCL Rule #1b
3463 There is a second pair of rules.
3465 @item Rule #1: Control flow does not exist. Only commands
3466 @* For example: the classic FOR loop or IF statement is not a control
3467 flow item, they are commands, there is no such thing as control flow
3469 @item Rule #2: If you think otherwise, See Rule #1
3470 @* Actually what happens is this: There are commands that by
3471 convention, act like control flow key words in other languages. One of
3472 those commands is the word ``for'', another command is ``if''.
3475 @section Per Rule #1 - All Results are strings
3476 Every TCL command results in a string. The word ``result'' is used
3477 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3478 Everything is a string}
3480 @section TCL Quoting Operators
3481 In life of a TCL script, there are two important periods of time, the
3482 difference is subtle.
3485 @item Evaluation Time
3488 The two key items here are how ``quoted things'' work in TCL. TCL has
3489 three primary quoting constructs, the [square-brackets] the
3490 @{curly-braces@} and ``double-quotes''
3492 By now you should know $VARIABLES always start with a $DOLLAR
3493 sign. BTW, to set a variable, you actually use the command ``set'', as
3494 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3495 = 1'' statement, but without the equal sign.
3498 @item @b{[square-brackets]}
3499 @* @b{[square-brackets]} are command subsitution. It operates much
3500 like Unix Shell `back-ticks`. The result of a [square-bracket]
3501 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3502 string}. These two statments are roughly identical.
3506 echo "The Date is: $X"
3509 puts "The Date is: $X"
3511 @item @b{``double-quoted-things''}
3512 @* @b{``double-quoted-things''} are just simply quoted
3513 text. $VARIABLES and [square-brackets] are expanded in place - the
3514 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3518 puts "It is now \"[date]\", $x is in 1 hour"
3520 @item @b{@{Curly-Braces@}}
3521 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3522 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3523 'single-quote' operators in BASH shell scripts, with the added
3524 feature: @{curly-braces@} nest, single quotes can not. @{@{@{this is
3525 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3526 28/nov/2008, Jim/OpenOCD does not have a date command.
3529 @section Consequences of Rule 1/2/3/4
3531 The consequences of Rule 1 is profound.
3533 @subsection Tokenizing & Execution.
3535 Of course, whitespace, blank lines and #comment lines are handled in
3538 As a script is parsed, each (multi) line in the script file is
3539 tokenized and according to the quoting rules. After tokenizing, that
3540 line is immedatly executed.
3542 Multi line statements end with one or more ``still-open''
3543 @{curly-braces@} which - eventually - a few lines later closes.
3545 @subsection Command Execution
3547 Remember earlier: There is no such thing as ``control flow''
3548 statements in TCL. Instead there are COMMANDS that simpily act like
3549 control flow operators.
3551 Commands are executed like this:
3554 @item Parse the next line into (argc) and (argv[]).
3555 @item Look up (argv[0]) in a table and call its function.
3556 @item Repeat until End Of File.
3559 It sort of works like this:
3562 ReadAndParse( &argc, &argv );
3564 cmdPtr = LookupCommand( argv[0] );
3566 (*cmdPtr->Execute)( argc, argv );
3570 When the command ``proc'' is parsed (which creates a procedure
3571 function) it gets 3 parameters on the command line. @b{1} the name of
3572 the proc (function), @b{2} the list of parameters, and @b{3} the body
3573 of the function. Not the choice of words: LIST and BODY. The PROC
3574 command stores these items in a table somewhere so it can be found by
3577 @subsection The FOR Command
3579 The most interesting command to look at is the FOR command. In TCL,
3580 the FOR command is normally implimented in C. Remember, FOR is a
3581 command just like any other command.
3583 When the ascii text containing the FOR command is parsed, the parser
3584 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3588 @item The ascii text 'for'
3589 @item The start text
3590 @item The test expression
3595 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3596 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3597 Often many of those parameters are in @{curly-braces@} - thus the
3598 variables inside are not expanded or replaced until later.
3600 Remember that every TCL command looks like the classic ``main( argc,
3601 argv )'' function in C. In JimTCL - they actually look like this:
3605 MyCommand( Jim_Interp *interp,
3607 Jim_Obj * const *argvs );
3610 Real TCL is nearly identical. Although the newer versions have
3611 introduced a byte-code parser and intepreter, but at the core, it
3612 still operates in the same basic way.
3614 @subsection FOR Command Implimentation
3616 To understand TCL it is perhaps most helpful to see the FOR
3617 command. Remember, it is a COMMAND not a control flow structure.
3619 In TCL there are two underying C helper functions.
3621 Remember Rule #1 - You are a string.
3623 The @b{first} helper parses and executes commands found in an ascii
3624 string. Commands can be seperated by semi-colons, or newlines. While
3625 parsing, variables are expanded per the quoting rules
3627 The @b{second} helper evaluates an ascii string as a numerical
3628 expression and returns a value.
3630 Here is an example of how the @b{FOR} command could be
3631 implimented. The pseudo code below does not show error handling.
3633 void Execute_AsciiString( void *interp, const char *string );
3635 int Evaluate_AsciiExpression( void *interp, const char *string );
3638 MyForCommand( void *interp,
3643 SetResult( interp, "WRONG number of parameters");
3647 // argv[0] = the ascii string just like C
3649 // Execute the start statement.
3650 Execute_AsciiString( interp, argv[1] );
3654 i = Evaluate_AsciiExpression(interp, argv[2]);
3659 Execute_AsciiString( interp, argv[3] );
3661 // Execute the LOOP part
3662 Execute_AsciiString( interp, argv[4] );
3666 SetResult( interp, "" );
3671 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3672 in the same basic way.
3674 @section OpenOCD TCL Usage
3676 @subsection source and find commands
3677 @b{Where:} In many configuration files
3678 @* Example: @b{ source [find FILENAME] }
3679 @*Remember the parsing rules
3681 @item The FIND command is in square brackets.
3682 @* The FIND command is executed with the parameter FILENAME. It should
3683 find the full path to the named file. The RESULT is a string, which is
3684 subsituted on the orginal command line.
3685 @item The command source is executed with the resulting filename.
3686 @* SOURCE reads a file and executes as a script.
3688 @subsection format command
3689 @b{Where:} Generally occurs in numerous places.
3690 @* TCL no command like @b{printf()}, intead it has @b{format}, which is really more like
3696 puts [format "The answer: %d" [expr $x * $y]]
3699 @item The SET command creates 2 variables, X and Y.
3700 @item The double [nested] EXPR command performs math
3701 @* The EXPR command produces numerical result as a string.
3703 @item The format command is executed, producing a single string
3704 @* Refer to Rule #1.
3705 @item The PUTS command outputs the text.
3707 @subsection Body Or Inlined Text
3708 @b{Where:} Various TARGET scripts.
3711 proc someproc @{@} @{
3712 ... multiple lines of stuff ...
3714 $_TARGETNAME configure -event FOO someproc
3715 #2 Good - no variables
3716 $_TARGETNAME confgure -event foo "this ; that;"
3717 #3 Good Curly Braces
3718 $_TARGETNAME configure -event FOO @{
3721 #4 DANGER DANGER DANGER
3722 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3725 @item The $_TARGETNAME is an OpenOCD variable convention.
3726 @*@b{$_TARGETNAME} represents the last target created, the value changes
3727 each time a new target is created. Remember the parsing rules. When
3728 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3729 the name of the target which happens to be a TARGET (object)
3731 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3732 @*There are 4 examples:
3734 @item The TCLBODY is a simple string that happens to be a proc name
3735 @item The TCLBODY is several simple commands semi-colon seperated
3736 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3737 @item The TCLBODY is a string with variables that get expanded.
3740 In the end, when the target event FOO occurs the TCLBODY is
3741 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3742 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3744 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3745 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3746 and the text is evaluated. In case #4, they are replaced before the
3747 ``Target Object Command'' is executed. This occurs at the same time
3748 $_TARGETNAME is replaced. In case #4 the date will never
3749 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3750 Jim/OpenOCD does not have a date command@}
3752 @subsection Global Variables
3753 @b{Where:} You might discover this when writing your own procs @* In
3754 simple terms: Inside a PROC, if you need to access a global variable
3755 you must say so. Also see ``upvar''. Example:
3757 proc myproc @{ @} @{
3758 set y 0 #Local variable Y
3759 global x #Global variable X
3760 puts [format "X=%d, Y=%d" $x $y]
3763 @section Other Tcl Hacks
3764 @b{Dynamic Variable Creation}
3766 # Dynamically create a bunch of variables.
3767 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3769 set vn [format "BIT%d" $x]
3773 set $vn [expr (1 << $x)]
3776 @b{Dynamic Proc/Command Creation}
3778 # One "X" function - 5 uart functions.
3779 foreach who @{A B C D E@}
3780 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3784 @node Target library
3785 @chapter Target library
3786 @cindex Target library
3788 OpenOCD comes with a target configuration script library. These scripts can be
3789 used as-is or serve as a starting point.
3791 The target library is published together with the OpenOCD executable and
3792 the path to the target library is in the OpenOCD script search path.
3793 Similarly there are example scripts for configuring the JTAG interface.
3795 The command line below uses the example parport configuration scripts
3796 that ship with OpenOCD, then configures the str710.cfg target and
3797 finally issues the init and reset command. The communication speed
3798 is set to 10kHz for reset and 8MHz for post reset.
3802 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3806 To list the target scripts available:
3809 $ ls /usr/local/lib/openocd/target
3811 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3812 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3813 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3814 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3822 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3823 @comment case issue with ``Index.html'' and ``index.html''
3824 @comment Occurs when creating ``--html --no-split'' output
3825 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3826 @unnumbered OpenOCD Index