1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD
55 * Developers:: OpenOCD Developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl Scripting API:: Tcl Scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target Library:: Target Library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main Index
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 based, parallel port based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}.
126 @section Coding Style
129 The following rules try to describe formatting and naming conventions that should be
130 followed to make the whole OpenOCD code look more consistent. The ultimate goal of
131 coding style should be readability, and these rules may be ignored for a particular
132 (small) piece of code if that makes it more readable.
134 @subsection Formatting rules:
136 @item remove any trailing white space
137 @item use TAB characters for indentation, not spaces
138 @item displayed TAB width is 4 characters
139 @item make sure NOT to use DOS '\r\n' line feeds
140 @item do not add more than 2 empty lines to source files
141 @item do not add trailing empty lines to source files
142 @item do not use C++ style comments (//)
143 @item lines may be reasonably wide - there's no anachronistic 80 characters limit
146 @subsection Naming rules:
148 @item identifiers use lower-case letters only
149 @item identifiers consisting of multiple words use underline characters between consecutive words
150 @item macros use upper-case letters only
151 @item structure names shall be appended with '_s'
152 @item typedefs shall be appended with '_t'
155 @subsection Function calls:
157 @item function calls have no space between the functions name and the parameter
158 list: my_func(param1, param2, ...)
163 @cindex building OpenOCD
165 @section Pre-Built Tools
166 If you are interested in getting actual work done rather than building
167 OpenOCD, then check if your interface supplier provides binaries for
168 you. Chances are that that binary is from some SVN version that is more
169 stable than SVN trunk where bleeding edge development takes place.
171 @section Packagers Please Read!
173 You are a @b{PACKAGER} of OpenOCD if you
176 @item @b{Sell dongles} and include pre-built binaries
177 @item @b{Supply tools} i.e.: A complete development solution
178 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
179 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
182 As a @b{PACKAGER} - you are at the top of the food chain. You solve
183 problems for downstream users. What you fix or solve - solves hundreds
184 if not thousands of user questions. If something does not work for you
185 please let us know. That said, would also like you to follow a few
189 @item @b{Always build with printer ports enabled.}
190 @item @b{Try to use LIBFTDI + LIBUSB where possible. You cover more bases.}
194 @item @b{Why YES to LIBFTDI + LIBUSB?}
196 @item @b{LESS} work - libusb perhaps already there
197 @item @b{LESS} work - identical code, multiple platforms
198 @item @b{MORE} dongles are supported
199 @item @b{MORE} platforms are supported
200 @item @b{MORE} complete solution
202 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)?
204 @item @b{LESS} speed - some say it is slower
205 @item @b{LESS} complex to distribute (external dependencies)
209 @section Building From Source
211 You can download the current SVN version with an SVN client of your choice from the
212 following repositories:
214 @uref{svn://svn.berlios.de/openocd/trunk}
218 @uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
220 Using the SVN command line client, you can use the following command to fetch the
221 latest version (make sure there is no (non-svn) directory called "openocd" in the
225 svn checkout svn://svn.berlios.de/openocd/trunk openocd
228 Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
229 For building on Windows,
230 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
231 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
232 paths, resulting in obscure dependency errors (This is an observation I've gathered
233 from the logs of one user - correct me if I'm wrong).
235 You further need the appropriate driver files, if you want to build support for
236 a FTDI FT2232 based interface:
239 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
240 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
241 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
242 homepage (@uref{http://www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
245 libftdi is supported under Windows. Do not use versions earlier than 0.14.
247 In general, the D2XX driver provides superior performance (several times as fast),
248 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
249 a kernel module, only a user space library.
251 To build OpenOCD (on both Linux and Cygwin), use the following commands:
257 Bootstrap generates the configure script, and prepares building on your system.
260 ./configure [options, see below]
263 Configure generates the Makefiles used to build OpenOCD.
270 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
272 The configure script takes several options, specifying which JTAG interfaces
273 should be included (among other things):
277 @option{--enable-parport} - Enable building the PC parallel port driver.
279 @option{--enable-parport_ppdev} - Enable use of ppdev (/dev/parportN) for parport.
281 @option{--enable-parport_giveio} - Enable use of giveio for parport instead of ioperm.
283 @option{--enable-amtjtagaccel} - Enable building the Amontec JTAG-Accelerator driver.
285 @option{--enable-ecosboard} - Enable building support for eCosBoard based JTAG debugger.
287 @option{--enable-ioutil} - Enable ioutil functions - useful for standalone OpenOCD implementations.
289 @option{--enable-httpd} - Enable builtin httpd server - useful for standalone OpenOCD implementations.
291 @option{--enable-ep93xx} - Enable building support for EP93xx based SBCs.
293 @option{--enable-at91rm9200} - Enable building support for AT91RM9200 based SBCs.
295 @option{--enable-gw16012} - Enable building support for the Gateworks GW16012 JTAG programmer.
297 @option{--enable-ft2232_ftd2xx} - Numerous USB type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
299 @option{--enable-ft2232_libftdi} - An open source (free) alternative to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin).
301 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
303 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only. Equivalent of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
305 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
307 @option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
309 @option{--enable-presto_ftd2xx} - Enable building support for ASIX Presto programmer using the FTD2XX driver.
311 @option{--enable-usbprog} - Enable building support for the USBprog JTAG programmer.
313 @option{--enable-oocd_trace} - Enable building support for the OpenOCD+trace ETM capture device.
315 @option{--enable-jlink} - Enable building support for the Segger J-Link JTAG programmer.
317 @option{--enable-vsllink} - Enable building support for the Versaloon-Link JTAG programmer.
319 @option{--enable-rlink} - Enable building support for the Raisonance RLink JTAG programmer.
321 @option{--enable-arm-jtag-ew} - Enable building support for the Olimex ARM-JTAG-EW programmer.
323 @option{--enable-dummy} - Enable building the dummy port driver.
326 @section Parallel Port Dongles
328 If you want to access the parallel port using the PPDEV interface you have to specify
329 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
330 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
331 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
333 The same is true for the @option{--enable-parport_giveio} option, you have to
334 use both the @option{--enable-parport} AND the @option{--enable-parport_giveio} option if you want to use giveio instead of ioperm parallel port access method.
336 @section FT2232C Based USB Dongles
338 There are 2 methods of using the FTD2232, either (1) using the
339 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
340 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
342 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
343 TAR.GZ file. You must unpack them ``some where'' convient. As of this
344 writing (12/26/2008) FTDICHIP does not supply means to install these
345 files ``in an appropriate place'' As a result, there are two
346 ``./configure'' options that help.
348 Below is an example build process:
350 1) Check out the latest version of ``openocd'' from SVN.
352 2) Download & unpack either the Windows or Linux FTD2xx drivers
353 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm}).
356 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
357 /home/duane/libftd2xx0.4.16 => the Linux TAR.GZ file contents.
360 3) Configure with these options:
363 Cygwin FTDICHIP solution:
364 ./configure --prefix=/home/duane/mytools \
365 --enable-ft2232_ftd2xx \
366 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
368 Linux FTDICHIP solution:
369 ./configure --prefix=/home/duane/mytools \
370 --enable-ft2232_ftd2xx \
371 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
373 Cygwin/Linux LIBFTDI solution:
375 1a) For Windows: The Windows port of LIBUSB is in place.
376 1b) For Linux: libusb has been built/installed and is in place.
378 2) And libftdi has been built and installed
379 Note: libftdi - relies upon libusb.
381 ./configure --prefix=/home/duane/mytools \
382 --enable-ft2232_libftdi
386 4) Then just type ``make'', and perhaps ``make install''.
389 @section Miscellaneous Configure Options
393 @option{--disable-option-checking} - Ignore unrecognized @option{--enable} and @option{--with} options.
395 @option{--enable-gccwarnings} - Enable extra gcc warnings during build.
398 @option{--enable-release} - Enable building of an OpenOCD release, generally
399 this is for developers. It simply omits the svn version string when the
400 openocd @option{-v} is executed.
403 @node JTAG Hardware Dongles
404 @chapter JTAG Hardware Dongles
413 Defined: @b{dongle}: A small device that plugins into a computer and serves as
414 an adapter .... [snip]
416 In the OpenOCD case, this generally refers to @b{a small adapater} one
417 attaches to your computer via USB or the Parallel Printer Port. The
418 execption being the Zylin ZY1000 which is a small box you attach via
419 an ethernet cable. The Zylin ZY1000 has the advantage that it does not
420 require any drivers to be installed on the developer PC. It also has
421 a built in web interface. It supports RTCK/RCLK or adaptive clocking
422 and has a built in relay to power cycle targets remotely.
425 @section Choosing a Dongle
427 There are three things you should keep in mind when choosing a dongle.
430 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
431 @item @b{Connection} Printer Ports - Does your computer have one?
432 @item @b{Connection} Is that long printer bit-bang cable practical?
433 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
436 @section Stand alone Systems
438 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
439 dongle, but a standalone box. The ZY1000 has the advantage that it does
440 not require any drivers installed on the developer PC. It also has
441 a built in web interface. It supports RTCK/RCLK or adaptive clocking
442 and has a built in relay to power cycle targets remotely.
444 @section USB FT2232 Based
446 There are many USB JTAG dongles on the market, many of them are based
447 on a chip from ``Future Technology Devices International'' (FTDI)
448 known as the FTDI FT2232.
450 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
452 As of 28/Nov/2008, the following are supported:
456 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
458 @* See: @url{http://www.amontec.com/jtagkey.shtml}
460 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
462 @* See: @url{http://www.signalyzer.com}
463 @item @b{evb_lm3s811}
464 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
465 @item @b{olimex-jtag}
466 @* See: @url{http://www.olimex.com}
468 @* See: @url{http://www.tincantools.com}
469 @item @b{turtelizer2}
470 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
472 @* Link: @url{http://www.hitex.com/index.php?id=383}
474 @* Link @url{http://www.hitex.com/stm32-stick}
475 @item @b{axm0432_jtag}
476 @* Axiom AXM-0432 Link @url{http://www.axman.com}
479 @section USB JLINK based
480 There are several OEM versions of the Segger @b{JLINK} adapter. It is
481 an example of a micro controller based JTAG adapter, it uses an
482 AT91SAM764 internally.
485 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
486 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
487 @item @b{SEGGER JLINK}
488 @* Link: @url{http://www.segger.com/jlink.html}
490 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
493 @section USB RLINK based
494 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
497 @item @b{Raisonance RLink}
498 @* Link: @url{http://www.raisonance.com/products/RLink.php}
499 @item @b{STM32 Primer}
500 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
501 @item @b{STM32 Primer2}
502 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
508 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
510 @item @b{USB - Presto}
511 @* Link: @url{http://tools.asix.net/prg_presto.htm}
513 @item @b{Versaloon-Link}
514 @* Link: @url{http://www.simonqian.com/en/Versaloon}
516 @item @b{ARM-JTAG-EW}
517 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
520 @section IBM PC Parallel Printer Port Based
522 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
523 and the MacGraigor Wiggler. There are many clones and variations of
528 @item @b{Wiggler} - There are many clones of this.
529 @* Link: @url{http://www.macraigor.com/wiggler.htm}
531 @item @b{DLC5} - From XILINX - There are many clones of this
532 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
533 produced, PDF schematics are easily found and it is easy to make.
535 @item @b{Amontec - JTAG Accelerator}
536 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
539 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
542 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
544 @item @b{Wiggler_ntrst_inverted}
545 @* Yet another variation - See the source code, src/jtag/parport.c
547 @item @b{old_amt_wiggler}
548 @* Unknown - probably not on the market today
551 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
554 @* Link: @url{http://www.amontec.com/chameleon.shtml}
560 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
563 @* From ST Microsystems, link:
564 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
565 Title: FlashLINK JTAG programing cable for PSD and uPSD
573 @* An EP93xx based Linux machine using the GPIO pins directly.
576 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
582 @cindex running OpenOCD
584 @cindex --debug_level
588 The @option{--help} option shows:
592 --help | -h display this help
593 --version | -v display OpenOCD version
594 --file | -f use configuration file <name>
595 --search | -s dir to search for config files and scripts
596 --debug | -d set debug level <0-3>
597 --log_output | -l redirect log output to file <name>
598 --command | -c run <command>
599 --pipe | -p use pipes when talking to gdb
602 By default OpenOCD reads the file configuration file ``openocd.cfg''
603 in the current directory. To specify a different (or multiple)
604 configuration file, you can use the ``-f'' option. For example:
607 openocd -f config1.cfg -f config2.cfg -f config3.cfg
610 Once started, OpenOCD runs as a daemon, waiting for connections from
611 clients (Telnet, GDB, Other).
613 If you are having problems, you can enable internal debug messages via
616 Also it is possible to interleave commands w/config scripts using the
617 @option{-c} command line switch.
619 To enable debug output (when reporting problems or working on OpenOCD
620 itself), use the @option{-d} command line switch. This sets the
621 @option{debug_level} to "3", outputting the most information,
622 including debug messages. The default setting is "2", outputting only
623 informational messages, warnings and errors. You can also change this
624 setting from within a telnet or gdb session using @option{debug_level
625 <n>} @xref{debug_level}.
627 You can redirect all output from the daemon to a file using the
628 @option{-l <logfile>} switch.
630 Search paths for config/script files can be added to OpenOCD by using
631 the @option{-s <search>} switch. The current directory and the OpenOCD
632 target library is in the search path by default.
634 For details on the @option{-p} option. @xref{Connecting to GDB}.
636 Note! OpenOCD will launch the GDB & telnet server even if it can not
637 establish a connection with the target. In general, it is possible for
638 the JTAG controller to be unresponsive until the target is set up
639 correctly via e.g. GDB monitor commands in a GDB init script.
641 @node Simple Configuration Files
642 @chapter Simple Configuration Files
643 @cindex configuration
646 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
649 @item A small openocd.cfg file which ``sources'' other configuration files
650 @item A monolithic openocd.cfg file
651 @item Many -f filename options on the command line
652 @item Your Mixed Solution
655 @section Small configuration file method
657 This is the preferred method. It is simple and works well for many
658 people. The developers of OpenOCD would encourage you to use this
659 method. If you create a new configuration please email new
660 configurations to the development list.
662 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
665 source [find interface/signalyzer.cfg]
667 # Change the default telnet port...
671 # GDB can also flash my flash!
672 gdb_memory_map enable
673 gdb_flash_program enable
675 source [find target/sam7x256.cfg]
678 There are many example configuration scripts you can work with. You
679 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
683 @item @b{board} - eval board level configurations
684 @item @b{interface} - specific dongle configurations
685 @item @b{target} - the target chips
686 @item @b{tcl} - helper scripts
687 @item @b{xscale} - things specific to the xscale.
690 Look first in the ``boards'' area, then the ``targets'' area. Often a board
691 configuration is a good example to work from.
693 @section Many -f filename options
694 Some believe this is a wonderful solution, others find it painful.
696 You can use a series of ``-f filename'' options on the command line,
697 OpenOCD will read each filename in sequence, for example:
700 openocd -f file1.cfg -f file2.cfg -f file2.cfg
703 You can also intermix various commands with the ``-c'' command line
706 @section Monolithic file
707 The ``Monolithic File'' dispenses with all ``source'' statements and
708 puts everything in one self contained (monolithic) file. This is not
711 Please try to ``source'' various files or use the multiple -f
714 @section Advice for you
715 Often, one uses a ``mixed approach''. Where possible, please try to
716 ``source'' common things, and if needed cut/paste parts of the
717 standard distribution configuration files as needed.
719 @b{REMEMBER:} The ``important parts'' of your configuration file are:
722 @item @b{Interface} - Defines the dongle
723 @item @b{Taps} - Defines the JTAG Taps
724 @item @b{GDB Targets} - What GDB talks to
725 @item @b{Flash Programing} - Very Helpful
728 Some key things you should look at and understand are:
731 @item The reset configuration of your debug environment as a whole
732 @item Is there a ``work area'' that OpenOCD can use?
733 @* For ARM - work areas mean up to 10x faster downloads.
734 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
735 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
740 @node Config File Guidelines
741 @chapter Config File Guidelines
743 This section/chapter is aimed at developers and integrators of
744 OpenOCD. These are guidelines for creating new boards and new target
745 configurations as of 28/Nov/2008.
747 However, you, the user of OpenOCD, should be somewhat familiar with
748 this section as it should help explain some of the internals of what
749 you might be looking at.
751 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
755 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
757 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
758 contain initialization items that are specific to a board - for
759 example: The SDRAM initialization sequence for the board, or the type
760 of external flash and what address it is found at. Any initialization
761 sequence to enable that external flash or SDRAM should be found in the
762 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
763 a CPU and an FPGA or CPLD.
765 @* Think chip. The ``target'' directory represents a JTAG tap (or
766 chip) OpenOCD should control, not a board. Two common types of targets
767 are ARM chips and FPGA or CPLD chips.
770 @b{If needed...} The user in their ``openocd.cfg'' file or the board
771 file might override a specific feature in any of the above files by
772 setting a variable or two before sourcing the target file. Or adding
773 various commands specific to their situation.
775 @section Interface Config Files
777 The user should be able to source one of these files via a command like this:
780 source [find interface/FOOBAR.cfg]
782 openocd -f interface/FOOBAR.cfg
785 A preconfigured interface file should exist for every interface in use
786 today, that said, perhaps some interfaces have only been used by the
787 sole developer who created it.
789 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
790 tcl_platform(platform), it should be called jim_platform (because it
791 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
792 ``cygwin'' or ``mingw''
794 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
796 @section Board Config Files
798 @b{Note: BOARD directory NEW as of 28/nov/2008}
800 The user should be able to source one of these files via a command like this:
803 source [find board/FOOBAR.cfg]
805 openocd -f board/FOOBAR.cfg
809 The board file should contain one or more @t{source [find
810 target/FOO.cfg]} statements along with any board specific things.
812 In summary the board files should contain (if present)
815 @item External flash configuration (i.e.: the flash on CS0)
816 @item SDRAM configuration (size, speed, etc.
817 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
818 @item Multiple TARGET source statements
819 @item All things that are not ``inside a chip''
820 @item Things inside a chip go in a 'target' file
823 @section Target Config Files
825 The user should be able to source one of these files via a command like this:
828 source [find target/FOOBAR.cfg]
830 openocd -f target/FOOBAR.cfg
833 In summary the target files should contain
838 @item Reset configuration
840 @item CPU/Chip/CPU-Core specific features
844 @subsection Important variable names
846 By default, the end user should never need to set these
847 variables. However, if the user needs to override a setting they only
848 need to set the variable in a simple way.
852 @* This gives a name to the overall chip, and is used as part of the
853 tap identifier dotted name.
855 @* By default little - unless the chip or board is not normally used that way.
857 @* When OpenOCD examines the JTAG chain, it will attempt to identify
858 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
859 to verify the tap id number verses configuration file and may issue an
860 error or warning like this. The hope is that this will help to pinpoint
861 problems in OpenOCD configurations.
864 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
865 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
866 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
867 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
870 @item @b{_TARGETNAME}
871 @* By convention, this variable is created by the target configuration
872 script. The board configuration file may make use of this variable to
873 configure things like a ``reset init'' script, or other things
874 specific to that board and that target.
876 If the chip has 2 targets, use the names @b{_TARGETNAME0},
877 @b{_TARGETNAME1}, ... etc.
879 @b{Remember:} The ``board file'' may include multiple targets.
881 At no time should the name ``target0'' (the default target name if
882 none was specified) be used. The name ``target0'' is a hard coded name
883 - the next target on the board will be some other number.
885 The user (or board file) should reasonably be able to:
888 source [find target/FOO.cfg]
889 $_TARGETNAME configure ... FOO specific parameters
891 source [find target/BAR.cfg]
892 $_TARGETNAME configure ... BAR specific parameters
897 @subsection Tcl Variables Guide Line
898 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
900 Thus the rule we follow in OpenOCD is this: Variables that begin with
901 a leading underscore are temporary in nature, and can be modified and
902 used at will within a ?TARGET? configuration file.
904 @b{EXAMPLE:} The user should be able to do this:
908 # PXA270 #1 network side, big endian
909 # PXA270 #2 video side, little endian
913 source [find target/pxa270.cfg]
914 # variable: _TARGETNAME = network.cpu
915 # other commands can refer to the "network.cpu" tap.
916 $_TARGETNAME configure .... params for this CPU..
920 source [find target/pxa270.cfg]
921 # variable: _TARGETNAME = video.cpu
922 # other commands can refer to the "video.cpu" tap.
923 $_TARGETNAME configure .... params for this CPU..
927 source [find target/spartan3.cfg]
929 # Since $_TARGETNAME is temporal..
930 # these names still work!
931 network.cpu configure ... params
932 video.cpu configure ... params
936 @subsection Default Value Boiler Plate Code
938 All target configuration files should start with this (or a modified form)
942 if @{ [info exists CHIPNAME] @} @{
943 set _CHIPNAME $CHIPNAME
945 set _CHIPNAME sam7x256
948 if @{ [info exists ENDIAN] @} @{
954 if @{ [info exists CPUTAPID ] @} @{
955 set _CPUTAPID $CPUTAPID
957 set _CPUTAPID 0x3f0f0f0f
962 @subsection Creating Taps
963 After the ``defaults'' are choosen [see above] the taps are created.
965 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
969 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
970 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
975 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
978 @item @b{Unform tap names} - See: Tap Naming Convention
979 @item @b{_TARGETNAME} is created at the end where used.
983 if @{ [info exists FLASHTAPID ] @} @{
984 set _FLASHTAPID $FLASHTAPID
986 set _FLASHTAPID 0x25966041
988 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
990 if @{ [info exists CPUTAPID ] @} @{
991 set _CPUTAPID $CPUTAPID
993 set _CPUTAPID 0x25966041
995 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
998 if @{ [info exists BSTAPID ] @} @{
999 set _BSTAPID $BSTAPID
1001 set _BSTAPID 0x1457f041
1003 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
1005 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
1008 @b{Tap Naming Convention}
1010 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
1018 @item @b{unknownN} - it happens :-(
1021 @subsection Reset Configuration
1023 Some chips have specific ways the TRST and SRST signals are
1024 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
1025 @b{BOARD SPECIFIC} they go in the board file.
1027 @subsection Work Areas
1029 Work areas are small RAM areas used by OpenOCD to speed up downloads,
1030 and to download small snippets of code to program flash chips.
1032 If the chip includes a form of ``on-chip-ram'' - and many do - define
1033 a reasonable work area and use the ``backup'' option.
1035 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
1036 inaccessible if/when the application code enables or disables the MMU.
1038 @subsection ARM Core Specific Hacks
1040 If the chip has a DCC, enable it. If the chip is an ARM9 with some
1041 special high speed download features - enable it.
1043 If the chip has an ARM ``vector catch'' feature - by default enable
1044 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
1045 user is really writing a handler for those situations - they can
1046 easily disable it. Experiance has shown the ``vector catch'' is
1047 helpful - for common programing errors.
1049 If present, the MMU, the MPU and the CACHE should be disabled.
1051 @subsection Internal Flash Configuration
1053 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
1055 @b{Never ever} in the ``target configuration file'' define any type of
1056 flash that is external to the chip. (For example the BOOT flash on
1057 Chip Select 0). The BOOT flash information goes in a board file - not
1058 the TARGET (chip) file.
1062 @item at91sam7x256 - has 256K flash YES enable it.
1063 @item str912 - has flash internal YES enable it.
1064 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1065 @item pxa270 - again - CS0 flash - it goes in the board file.
1069 @chapter About JIM-Tcl
1073 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1074 learn more about JIM here: @url{http://jim.berlios.de}
1077 @item @b{JIM vs. Tcl}
1078 @* JIM-TCL is a stripped down version of the well known Tcl language,
1079 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1080 fewer features. JIM-Tcl is a single .C file and a single .H file and
1081 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1082 4.2 MB .zip file containing 1540 files.
1084 @item @b{Missing Features}
1085 @* Our practice has been: Add/clone the real Tcl feature if/when
1086 needed. We welcome JIM Tcl improvements, not bloat.
1089 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1090 command interpreter today (28/nov/2008) is a mixture of (newer)
1091 JIM-Tcl commands, and (older) the orginal command interpreter.
1094 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1095 can type a Tcl for() loop, set variables, etc.
1097 @item @b{Historical Note}
1098 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1100 @item @b{Need a crash course in Tcl?}
1101 @* See: @xref{Tcl Crash Course}.
1105 @node Daemon Configuration
1106 @chapter Daemon Configuration
1107 The commands here are commonly found in the openocd.cfg file and are
1108 used to specify what TCP/IP ports are used, and how GDB should be
1112 This command terminates the configuration stage and
1113 enters the normal command mode. This can be useful to add commands to
1114 the startup scripts and commands such as resetting the target,
1115 programming flash, etc. To reset the CPU upon startup, add "init" and
1116 "reset" at the end of the config script or at the end of the OpenOCD
1117 command line using the @option{-c} command line switch.
1119 If this command does not appear in any startup/configuration file
1120 OpenOCD executes the command for you after processing all
1121 configuration files and/or command line options.
1123 @b{NOTE:} This command normally occurs at or near the end of your
1124 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1125 targets ready. For example: If your openocd.cfg file needs to
1126 read/write memory on your target - the init command must occur before
1127 the memory read/write commands.
1129 @section TCP/IP Ports
1131 @item @b{telnet_port} <@var{number}>
1133 @*Intended for a human. Port on which to listen for incoming telnet connections.
1135 @item @b{tcl_port} <@var{number}>
1137 @*Intended as a machine interface. Port on which to listen for
1138 incoming Tcl syntax. This port is intended as a simplified RPC
1139 connection that can be used by clients to issue commands and get the
1140 output from the Tcl engine.
1142 @item @b{gdb_port} <@var{number}>
1144 @*First port on which to listen for incoming GDB connections. The GDB port for the
1145 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1150 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1151 @cindex gdb_breakpoint_override
1152 @anchor{gdb_breakpoint_override}
1153 @*Force breakpoint type for gdb 'break' commands.
1154 The raison d'etre for this option is to support GDB GUI's without
1155 a hard/soft breakpoint concept where the default OpenOCD and
1156 GDB behaviour is not sufficient. Note that GDB will use hardware
1157 breakpoints if the memory map has been set up for flash regions.
1159 This option replaces older arm7_9 target commands that addressed
1162 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1164 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1165 Default behaviour is <@var{resume}>
1167 @item @b{gdb_memory_map} <@var{enable|disable}>
1168 @cindex gdb_memory_map
1169 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1170 requested. GDB will then know when to set hardware breakpoints, and program flash
1171 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1172 for flash programming to work.
1173 Default behaviour is <@var{enable}>
1174 @xref{gdb_flash_program}.
1176 @item @b{gdb_flash_program} <@var{enable|disable}>
1177 @cindex gdb_flash_program
1178 @anchor{gdb_flash_program}
1179 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1180 vFlash packet is received.
1181 Default behaviour is <@var{enable}>
1182 @comment END GDB Items
1185 @node Interface - Dongle Configuration
1186 @chapter Interface - Dongle Configuration
1187 Interface commands are normally found in an interface configuration
1188 file which is sourced by your openocd.cfg file. These commands tell
1189 OpenOCD what type of JTAG dongle you have and how to talk to it.
1190 @section Simple Complete Interface Examples
1191 @b{A Turtelizer FT2232 Based JTAG Dongle}
1195 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1196 ft2232_layout turtelizer2
1197 ft2232_vid_pid 0x0403 0xbdc8
1204 @b{A Raisonance RLink}
1213 parport_cable wiggler
1218 interface arm-jtag-ew
1220 @section Interface Command
1222 The interface command tells OpenOCD what type of JTAG dongle you are
1223 using. Depending on the type of dongle, you may need to have one or
1224 more additional commands.
1228 @item @b{interface} <@var{name}>
1230 @*Use the interface driver <@var{name}> to connect to the
1231 target. Currently supported interfaces are
1236 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1238 @item @b{amt_jtagaccel}
1239 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1243 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1244 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1245 platform. The libftdi uses libusb, and should be portable to all systems that provide
1249 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1252 @* ASIX PRESTO USB JTAG programmer.
1255 @* usbprog is a freely programmable USB adapter.
1258 @* Gateworks GW16012 JTAG programmer.
1261 @* Segger jlink USB adapter
1264 @* Raisonance RLink USB adapter
1267 @* vsllink is part of Versaloon which is a versatile USB programmer.
1269 @item @b{arm-jtag-ew}
1270 @* Olimex ARM-JTAG-EW USB adapter
1271 @comment - End parameters
1273 @comment - End Interface
1275 @subsection parport options
1278 @item @b{parport_port} <@var{number}>
1279 @cindex parport_port
1280 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1281 the @file{/dev/parport} device
1283 When using PPDEV to access the parallel port, use the number of the parallel port:
1284 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1285 you may encounter a problem.
1286 @item @b{parport_cable} <@var{name}>
1287 @cindex parport_cable
1288 @*The layout of the parallel port cable used to connect to the target.
1289 Currently supported cables are
1293 The original Wiggler layout, also supported by several clones, such
1294 as the Olimex ARM-JTAG
1297 Same as original wiggler except an led is fitted on D5.
1298 @item @b{wiggler_ntrst_inverted}
1299 @cindex wiggler_ntrst_inverted
1300 Same as original wiggler except TRST is inverted.
1301 @item @b{old_amt_wiggler}
1302 @cindex old_amt_wiggler
1303 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1304 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1307 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1308 program the Chameleon itself, not a connected target.
1311 The Xilinx Parallel cable III.
1314 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1315 This is also the layout used by the HollyGates design
1316 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1319 The ST Parallel cable.
1322 Same as original wiggler except SRST and TRST connections reversed and
1323 TRST is also inverted.
1326 Altium Universal JTAG cable.
1328 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1329 @cindex parport_write_on_exit
1330 @*This will configure the parallel driver to write a known value to the parallel
1331 interface on exiting OpenOCD
1334 @subsection amt_jtagaccel options
1336 @item @b{parport_port} <@var{number}>
1337 @cindex parport_port
1338 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1339 @file{/dev/parport} device
1341 @subsection ft2232 options
1344 @item @b{ft2232_device_desc} <@var{description}>
1345 @cindex ft2232_device_desc
1346 @*The USB device description of the FTDI FT2232 device. If not
1347 specified, the FTDI default value is used. This setting is only valid
1348 if compiled with FTD2XX support.
1350 @b{TODO:} Confirm the following: On Windows the name needs to end with
1351 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1352 this be added and when must it not be added? Why can't the code in the
1353 interface or in OpenOCD automatically add this if needed? -- Duane.
1355 @item @b{ft2232_serial} <@var{serial-number}>
1356 @cindex ft2232_serial
1357 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1359 @item @b{ft2232_layout} <@var{name}>
1360 @cindex ft2232_layout
1361 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1362 signals. Valid layouts are
1365 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1367 Amontec JTAGkey and JTAGkey-Tiny
1368 @item @b{signalyzer}
1370 @item @b{olimex-jtag}
1373 American Microsystems M5960
1374 @item @b{evb_lm3s811}
1375 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1376 SRST signals on external connector
1379 @item @b{stm32stick}
1380 Hitex STM32 Performance Stick
1381 @item @b{flyswatter}
1382 Tin Can Tools Flyswatter
1383 @item @b{turtelizer2}
1384 egnite Software turtelizer2
1387 @item @b{axm0432_jtag}
1391 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1392 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1393 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1395 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1397 @item @b{ft2232_latency} <@var{ms}>
1398 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1399 ft2232_read() fails to return the expected number of bytes. This can be caused by
1400 USB communication delays and has proved hard to reproduce and debug. Setting the
1401 FT2232 latency timer to a larger value increases delays for short USB packets but it
1402 also reduces the risk of timeouts before receiving the expected number of bytes.
1403 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1406 @subsection ep93xx options
1407 @cindex ep93xx options
1408 Currently, there are no options available for the ep93xx interface.
1412 @item @b{jtag_khz} <@var{reset speed kHz}>
1415 It is debatable if this command belongs here - or in a board
1416 configuration file. In fact, in some situations the JTAG speed is
1417 changed during the target initialisation process (i.e.: (1) slow at
1418 reset, (2) program the CPU clocks, (3) run fast)
1420 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1422 Not all interfaces support ``rtck''. If the interface device can not
1423 support the rate asked for, or can not translate from kHz to
1424 jtag_speed, then an error is returned.
1426 Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
1427 especially true for synthesized cores (-S). Also see RTCK.
1429 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1430 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1431 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1432 the specified frequency.
1435 # Fall back to 3mhz if RCLK is not supported
1439 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1441 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1442 speed. The actual effect of this option depends on the JTAG interface used.
1444 The speed used during reset can be adjusted using setting jtag_speed during
1445 pre_reset and post_reset events.
1448 @item wiggler: maximum speed / @var{number}
1449 @item ft2232: 6MHz / (@var{number}+1)
1450 @item amt jtagaccel: 8 / 2**@var{number}
1451 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1452 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1453 @comment end speed list.
1456 @comment END command list
1459 @node Reset Configuration
1460 @chapter Reset Configuration
1461 @cindex Reset Configuration
1463 Every system configuration may require a different reset
1464 configuration. This can also be quite confusing. Please see the
1465 various board files for example.
1467 @section jtag_nsrst_delay <@var{ms}>
1468 @cindex jtag_nsrst_delay
1469 @*How long (in milliseconds) OpenOCD should wait after deasserting
1470 nSRST before starting new JTAG operations.
1472 @section jtag_ntrst_delay <@var{ms}>
1473 @cindex jtag_ntrst_delay
1474 @*Same @b{jtag_nsrst_delay}, but for nTRST
1476 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1477 big resistor/capacitor, reset supervisor, or on-chip features). This
1478 keeps the signal asserted for some time after the external reset got
1481 @section reset_config
1483 @b{Note:} To maintainers and integrators: Where exactly the
1484 ``reset configuration'' goes is a good question. It touches several
1485 things at once. In the end, if you have a board file - the board file
1486 should define it and assume 100% that the DONGLE supports
1487 anything. However, that does not mean the target should not also make
1488 not of something the silicon vendor has done inside the
1489 chip. @i{Grr.... nothing is every pretty.}
1493 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1494 @item Every board is also slightly different; some boards tie TRST and SRST together.
1495 @item Every chip is slightly different; some chips internally tie the two signals together.
1496 @item Some may not implement all of the signals the same way.
1497 @item Some signals might be push-pull, others open-drain/collector.
1499 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1500 reset the TAP via TRST and send commands through the JTAG tap to halt
1501 the CPU at the reset vector before the 1st instruction is executed,
1502 and finally release the SRST signal.
1503 @*Depending on your board vendor, chip vendor, etc., these
1504 signals may have slightly different names.
1506 OpenOCD defines these signals in these terms:
1508 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1509 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1515 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1516 @cindex reset_config
1517 @* The @t{reset_config} command tells OpenOCD the reset configuration
1518 of your combination of Dongle, Board, and Chips.
1519 If the JTAG interface provides SRST, but the target doesn't connect
1520 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1521 be @option{none}, @option{trst_only}, @option{srst_only} or
1522 @option{trst_and_srst}.
1524 [@var{combination}] is an optional value specifying broken reset
1525 signal implementations. @option{srst_pulls_trst} states that the
1526 test logic is reset together with the reset of the system (e.g. Philips
1527 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1528 the system is reset together with the test logic (only hypothetical, I
1529 haven't seen hardware with such a bug, and can be worked around).
1530 @option{combined} implies both @option{srst_pulls_trst} and
1531 @option{trst_pulls_srst}. The default behaviour if no option given is
1534 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1535 driver type of the reset lines to be specified. Possible values are
1536 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1537 test reset signal, and @option{srst_open_drain} (default) and
1538 @option{srst_push_pull} for the system reset. These values only affect
1539 JTAG interfaces with support for different drivers, like the Amontec
1540 JTAGkey and JTAGAccelerator.
1542 @comment - end command
1548 @chapter Tap Creation
1549 @cindex tap creation
1550 @cindex tap configuration
1552 In order for OpenOCD to control a target, a JTAG tap must be
1555 Commands to create taps are normally found in a configuration file and
1556 are not normally typed by a human.
1558 When a tap is created a @b{dotted.name} is created for the tap. Other
1559 commands use that dotted.name to manipulate or refer to the tap.
1563 @item @b{Debug Target} A tap can be used by a GDB debug target
1564 @item @b{Flash Programing} Some chips program the flash via JTAG
1565 @item @b{Boundry Scan} Some chips support boundary scan.
1569 @section jtag newtap
1570 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1575 @cindex tap geometry
1577 @comment START options
1580 @* is a symbolic name of the chip.
1582 @* is a symbol name of a tap present on the chip.
1583 @item @b{Required configparams}
1584 @* Every tap has 3 required configparams, and several ``optional
1585 parameters'', the required parameters are:
1586 @comment START REQUIRED
1588 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1589 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1590 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1591 some devices, there are bits in the IR that aren't used. This lets you mask
1592 them off when doing comparisons. In general, this should just be all ones for
1594 @comment END REQUIRED
1596 An example of a FOOBAR Tap
1598 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1600 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1601 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1602 [6,4,2,0] are checked.
1604 @item @b{Optional configparams}
1605 @comment START Optional
1607 @item @b{-expected-id NUMBER}
1608 @* By default it is zero. If non-zero represents the
1609 expected tap ID used when the JTAG chain is examined. See below.
1612 @* By default not specified the tap is enabled. Some chips have a
1613 JTAG route controller (JRC) that is used to enable and/or disable
1614 specific JTAG taps. You can later enable or disable any JTAG tap via
1615 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1617 @comment END Optional
1620 @comment END OPTIONS
1623 @comment START NOTES
1625 @item @b{Technically}
1626 @* newtap is a sub command of the ``jtag'' command
1627 @item @b{Big Picture Background}
1628 @*GDB Talks to OpenOCD using the GDB protocol via
1629 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1630 control the JTAG chain on your board. Your board has one or more chips
1631 in a @i{daisy chain configuration}. Each chip may have one or more
1632 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1633 @item @b{NAME Rules}
1634 @*Names follow ``C'' symbol name rules (start with alpha ...)
1635 @item @b{TAPNAME - Conventions}
1637 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1638 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1639 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1640 @item @b{bs} - for boundary scan if this is a seperate tap.
1641 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1642 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1643 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1644 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1646 @item @b{DOTTED.NAME}
1647 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1648 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1649 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1650 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1651 numerous other places to refer to various taps.
1653 @* The order this command appears via the config files is
1655 @item @b{Multi Tap Example}
1656 @* This example is based on the ST Microsystems STR912. See the ST
1657 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1658 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1660 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1661 @*@b{checked: 28/nov/2008}
1663 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1664 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1665 tap which then connects to the TDI pin.
1669 # create tap: 'str912.flash'
1670 jtag newtap str912 flash ... params ...
1671 # create tap: 'str912.cpu'
1672 jtag newtap str912 cpu ... params ...
1673 # create tap: 'str912.bs'
1674 jtag newtap str912 bs ... params ...
1677 @item @b{Note: Deprecated} - Index Numbers
1678 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1679 feature is still present, however its use is highly discouraged and
1680 should not be counted upon.
1681 @item @b{Multiple chips}
1682 @* If your board has multiple chips, you should be
1683 able to @b{source} two configuration files, in the proper order, and
1684 have the taps created in the proper order.
1687 @comment at command level
1688 @comment DOCUMENT old command
1689 @section jtag_device - REMOVED
1691 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1695 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1696 by the ``jtag newtap'' command. The documentation remains here so that
1697 one can easily convert the old syntax to the new syntax. About the old
1698 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1699 ``irmask''. The new syntax requires named prefixes, and supports
1700 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1701 @b{jtag newtap} command for details.
1703 OLD: jtag_device 8 0x01 0xe3 0xfe
1704 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1707 @section Enable/Disable Taps
1708 @b{Note:} These commands are intended to be used as a machine/script
1709 interface. Humans might find the ``scan_chain'' command more helpful
1710 when querying the state of the JTAG taps.
1712 @b{By default, all taps are enabled}
1715 @item @b{jtag tapenable} @var{DOTTED.NAME}
1716 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1717 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1722 @cindex route controller
1724 These commands are used when your target has a JTAG route controller
1725 that effectively adds or removes a tap from the JTAG chain in a
1728 The ``standard way'' to remove a tap would be to place the tap in
1729 bypass mode. But with the advent of modern chips, this is not always a
1730 good solution. Some taps operate slowly, others operate fast, and
1731 there are other JTAG clock synchronisation problems one must face. To
1732 solve that problem, the JTAG route controller was introduced. Rather
1733 than ``bypass'' the tap, the tap is completely removed from the
1734 circuit and skipped.
1737 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1740 @item @b{Enabled - Not In ByPass} and has a variable bit length
1741 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1742 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1745 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1746 @b{Historical note:} this feature was added 28/nov/2008
1748 @b{jtag tapisenabled DOTTED.NAME}
1750 This command returns 1 if the named tap is currently enabled, 0 if not.
1751 This command exists so that scripts that manipulate a JRC (like the
1752 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1753 enabled or disabled.
1756 @node Target Configuration
1757 @chapter Target Configuration
1759 This chapter discusses how to create a GDB debug target. Before
1760 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1762 @section targets [NAME]
1763 @b{Note:} This command name is PLURAL - not singular.
1765 With NO parameter, this plural @b{targets} command lists all known
1766 targets in a human friendly form.
1768 With a parameter, this plural @b{targets} command sets the current
1769 target to the given name. (i.e.: If there are multiple debug targets)
1774 CmdName Type Endian ChainPos State
1775 -- ---------- ---------- ---------- -------- ----------
1776 0: target0 arm7tdmi little 0 halted
1779 @section target COMMANDS
1780 @b{Note:} This command name is SINGULAR - not plural. It is used to
1781 manipulate specific targets, to create targets and other things.
1783 Once a target is created, a TARGETNAME (object) command is created;
1784 see below for details.
1786 The TARGET command accepts these sub-commands:
1788 @item @b{create} .. parameters ..
1789 @* creates a new target, see below for details.
1791 @* Lists all supported target types (perhaps some are not yet in this document).
1793 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1795 foreach t [target names] {
1796 puts [format "Target: %s\n" $t]
1800 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1801 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1802 @item @b{number} @b{NUMBER}
1803 @* Internally OpenOCD maintains a list of targets - in numerical index
1804 (0..N-1) this command returns the name of the target at index N.
1807 set thename [target number $x]
1808 puts [format "Target %d is: %s\n" $x $thename]
1811 @* Returns the number of targets known to OpenOCD (see number above)
1814 set c [target count]
1815 for { set x 0 } { $x < $c } { incr x } {
1816 # Assuming you have created this function
1817 print_target_details $x
1823 @section TARGETNAME (object) commands
1824 @b{Use:} Once a target is created, an ``object name'' that represents the
1825 target is created. By convention, the target name is identical to the
1826 tap name. In a multiple target system, one can preceed many common
1827 commands with a specific target name and effect only that target.
1829 str912.cpu mww 0x1234 0x42
1830 omap3530.cpu mww 0x5555 123
1833 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1834 good example is a on screen button, once a button is created a button
1835 has a name (a path in Tk terms) and that name is useable as a 1st
1836 class command. For example in Tk, one can create a button and later
1837 configure it like this:
1841 button .foobar -background red -command @{ foo @}
1843 .foobar configure -foreground blue
1845 set x [.foobar cget -background]
1847 puts [format "The button is %s" $x]
1850 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1851 button. Commands available as a ``target object'' are:
1853 @comment START targetobj commands.
1855 @item @b{configure} - configure the target; see Target Config/Cget Options below
1856 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1857 @item @b{curstate} - current target state (running, halt, etc.
1859 @* Intended for a human to see/read the currently configure target events.
1860 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1861 @comment start memory
1871 @item @b{Memory To Array, Array To Memory}
1872 @* These are aimed at a machine interface to memory
1874 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1875 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1877 @* @b{ARRAYNAME} is the name of an array variable
1878 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1879 @* @b{ADDRESS} is the target memory address
1880 @* @b{COUNT} is the number of elements to process
1882 @item @b{Used during ``reset''}
1883 @* These commands are used internally by the OpenOCD scripts to deal
1884 with odd reset situations and are not documented here.
1886 @item @b{arp_examine}
1890 @item @b{arp_waitstate}
1892 @item @b{invoke-event} @b{EVENT-NAME}
1893 @* Invokes the specific event manually for the target
1896 @section Target Events
1897 At various times, certain things can happen, or you want them to happen.
1901 @item What should happen when GDB connects? Should your target reset?
1902 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1903 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1906 All of the above items are handled by target events.
1908 To specify an event action, either during target creation, or later
1909 via ``$_TARGETNAME configure'' see this example.
1911 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1912 target event name, and BODY is a Tcl procedure or string of commands
1915 The programmers model is the ``-command'' option used in Tcl/Tk
1916 buttons and events. Below are two identical examples, the first
1917 creates and invokes small procedure. The second inlines the procedure.
1920 proc my_attach_proc @{ @} @{
1924 mychip.cpu configure -event gdb-attach my_attach_proc
1925 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1928 @section Current Events
1929 The following events are available:
1931 @item @b{debug-halted}
1932 @* The target has halted for debug reasons (i.e.: breakpoint)
1933 @item @b{debug-resumed}
1934 @* The target has resumed (i.e.: gdb said run)
1935 @item @b{early-halted}
1936 @* Occurs early in the halt process
1937 @item @b{examine-end}
1938 @* Currently not used (goal: when JTAG examine completes)
1939 @item @b{examine-start}
1940 @* Currently not used (goal: when JTAG examine starts)
1941 @item @b{gdb-attach}
1942 @* When GDB connects
1943 @item @b{gdb-detach}
1944 @* When GDB disconnects
1946 @* When the taret has halted and GDB is not doing anything (see early halt)
1947 @item @b{gdb-flash-erase-start}
1948 @* Before the GDB flash process tries to erase the flash
1949 @item @b{gdb-flash-erase-end}
1950 @* After the GDB flash process has finished erasing the flash
1951 @item @b{gdb-flash-write-start}
1952 @* Before GDB writes to the flash
1953 @item @b{gdb-flash-write-end}
1954 @* After GDB writes to the flash
1956 @* Before the taret steps, gdb is trying to start/resume the target
1958 @* The target has halted
1959 @item @b{old-gdb_program_config}
1960 @* DO NOT USE THIS: Used internally
1961 @item @b{old-pre_resume}
1962 @* DO NOT USE THIS: Used internally
1963 @item @b{reset-assert-pre}
1964 @* Before reset is asserted on the tap.
1965 @item @b{reset-assert-post}
1966 @* Reset is now asserted on the tap.
1967 @item @b{reset-deassert-pre}
1968 @* Reset is about to be released on the tap
1969 @item @b{reset-deassert-post}
1970 @* Reset has been released on the tap
1972 @* Currently not used.
1973 @item @b{reset-halt-post}
1974 @* Currently not usd
1975 @item @b{reset-halt-pre}
1976 @* Currently not used
1977 @item @b{reset-init}
1978 @* Currently not used
1979 @item @b{reset-start}
1980 @* Currently not used
1981 @item @b{reset-wait-pos}
1982 @* Currently not used
1983 @item @b{reset-wait-pre}
1984 @* Currently not used
1985 @item @b{resume-start}
1986 @* Before any target is resumed
1987 @item @b{resume-end}
1988 @* After all targets have resumed
1992 @* Target has resumed
1993 @item @b{tap-enable}
1994 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1996 jtag configure DOTTED.NAME -event tap-enable @{
2001 @item @b{tap-disable}
2002 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
2004 jtag configure DOTTED.NAME -event tap-disable @{
2005 puts "Disabling CPU"
2011 @section target create
2013 @cindex target creation
2016 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
2018 @*This command creates a GDB debug target that refers to a specific JTAG tap.
2019 @comment START params
2022 @* Is the name of the debug target. By convention it should be the tap
2023 DOTTED.NAME, this name is also used to create the target object
2026 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
2027 @comment START types
2044 @*PARAMs are various target configuration parameters. The following ones are mandatory:
2045 @comment START mandatory
2047 @item @b{-endian big|little}
2048 @item @b{-chain-position DOTTED.NAME}
2049 @comment end MANDATORY
2054 @section Target Config/Cget Options
2055 These options can be specified when the target is created, or later
2056 via the configure option or to query the target via cget.
2058 @item @b{-type} - returns the target type
2059 @item @b{-event NAME BODY} see Target events
2060 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
2061 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
2062 @item @b{-work-area-size [ADDRESS]} specify/set the work area
2063 @item @b{-work-area-backup [0|1]} does the work area get backed up
2064 @item @b{-endian [big|little]}
2065 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2066 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2070 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2071 set name [target number $x]
2072 set y [$name cget -endian]
2073 set z [$name cget -type]
2074 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2078 @section Target Variants
2081 @* Unknown (please write me)
2083 @* Unknown (please write me) (similar to arm7tdmi)
2085 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2086 This enables the hardware single-stepping support found on these
2091 @* None (this is also used as the ARM946)
2093 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2094 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2095 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2096 be detected and the normal reset behaviour used.
2098 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2100 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2102 @* Use variant @option{ejtag_srst} when debugging targets that do not
2103 provide a functional SRST line on the EJTAG connector. This causes
2104 OpenOCD to instead use an EJTAG software reset command to reset the
2105 processor. You still need to enable @option{srst} on the reset
2106 configuration command to enable OpenOCD hardware reset functionality.
2107 @comment END variants
2109 @section working_area - Command Removed
2110 @cindex working_area
2111 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2112 @* This documentation remains because there are existing scripts that
2113 still use this that need to be converted.
2115 working_area target# address size backup| [virtualaddress]
2117 @* The target# is a the 0 based target numerical index.
2119 This command specifies a working area for the debugger to use. This
2120 may be used to speed-up downloads to target memory and flash
2121 operations, or to perform otherwise unavailable operations (some
2122 coprocessor operations on ARM7/9 systems, for example). The last
2123 parameter decides whether the memory should be preserved
2124 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2125 possible, use a working_area that doesn't need to be backed up, as
2126 performing a backup slows down operation.
2128 @node Flash Configuration
2129 @chapter Flash programming
2130 @cindex Flash Configuration
2132 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2133 flash that a micro may boot from. Perhaps you, the reader, would like to
2134 contribute support for this.
2138 @item Configure via the command @b{flash bank}
2139 @* Normally this is done in a configuration file.
2140 @item Operate on the flash via @b{flash SOMECOMMAND}
2141 @* Often commands to manipulate the flash are typed by a human, or run
2142 via a script in some automated way. For example: To program the boot
2143 flash on your board.
2145 @* Flashing via GDB requires the flash be configured via ``flash
2146 bank'', and the GDB flash features be enabled. See the daemon
2147 configuration section for more details.
2150 @section Flash commands
2151 @cindex Flash commands
2152 @subsection flash banks
2155 @*List configured flash banks
2156 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2157 @subsection flash info
2158 @b{flash info} <@var{num}>
2160 @*Print info about flash bank <@option{num}>
2161 @subsection flash probe
2162 @b{flash probe} <@var{num}>
2164 @*Identify the flash, or validate the parameters of the configured flash. Operation
2165 depends on the flash type.
2166 @subsection flash erase_check
2167 @b{flash erase_check} <@var{num}>
2168 @cindex flash erase_check
2169 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2170 updates the erase state information displayed by @option{flash info}. That means you have
2171 to issue an @option{erase_check} command after erasing or programming the device to get
2172 updated information.
2173 @subsection flash protect_check
2174 @b{flash protect_check} <@var{num}>
2175 @cindex flash protect_check
2176 @*Check protection state of sectors in flash bank <num>.
2177 @option{flash erase_sector} using the same syntax.
2178 @subsection flash erase_sector
2179 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2180 @cindex flash erase_sector
2181 @anchor{flash erase_sector}
2182 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2183 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2184 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2186 @subsection flash erase_address
2187 @b{flash erase_address} <@var{address}> <@var{length}>
2188 @cindex flash erase_address
2189 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2190 @subsection flash write_bank
2191 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2192 @cindex flash write_bank
2193 @anchor{flash write_bank}
2194 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2195 <@option{offset}> bytes from the beginning of the bank.
2196 @subsection flash write_image
2197 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2198 @cindex flash write_image
2199 @anchor{flash write_image}
2200 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2201 [@var{offset}] can be specified and the file [@var{type}] can be specified
2202 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2203 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2204 if the @option{erase} parameter is given.
2205 @subsection flash protect
2206 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2207 @cindex flash protect
2208 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2209 <@var{last}> of @option{flash bank} <@var{num}>.
2211 @subsection mFlash commands
2212 @cindex mFlash commands
2214 @item @b{mflash probe}
2215 @cindex mflash probe
2217 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2218 @cindex mflash write
2219 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2220 <@var{offset}> bytes from the beginning of the bank.
2221 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2223 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2227 @section flash bank command
2228 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2231 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2232 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2235 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2236 and <@var{bus_width}> bytes using the selected flash <driver>.
2238 @subsection External Flash - cfi options
2240 CFI flashes are external flash chips - often they are connected to a
2241 specific chip select on the CPU. By default, at hard reset, most
2242 CPUs have the ablity to ``boot'' from some flash chip - typically
2243 attached to the CPU's CS0 pin.
2245 For other chip selects: OpenOCD does not know how to configure, or
2246 access a specific chip select. Instead you, the human, might need to
2247 configure additional chip selects via other commands (like: mww) , or
2248 perhaps configure a GPIO pin that controls the ``write protect'' pin
2251 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2252 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2253 @*CFI flashes require the number of the target they're connected to as an additional
2254 argument. The CFI driver makes use of a working area (specified for the target)
2255 to significantly speed up operation.
2257 @var{chip_width} and @var{bus_width} are specified in bytes.
2259 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2263 @subsection Internal Flash (Microcontrollers)
2264 @subsubsection lpc2000 options
2265 @cindex lpc2000 options
2267 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2268 <@var{clock}> [@var{calc_checksum}]
2269 @*LPC flashes don't require the chip and bus width to be specified. Additional
2270 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2271 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2272 of the target this flash belongs to (first is 0), the frequency at which the core
2273 is currently running (in kHz - must be an integral number), and the optional keyword
2274 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2278 @subsubsection at91sam7 options
2279 @cindex at91sam7 options
2281 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2282 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2283 reading the chip-id and type.
2285 @subsubsection str7 options
2286 @cindex str7 options
2288 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2289 @*variant can be either STR71x, STR73x or STR75x.
2291 @subsubsection str9 options
2292 @cindex str9 options
2294 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2295 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2297 str9x flash_config 0 4 2 0 0x80000
2299 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2301 @subsubsection str9 options (str9xpec driver)
2303 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2304 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2305 @option{enable_turbo} <@var{num>.}
2307 Only use this driver for locking/unlocking the device or configuring the option bytes.
2308 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2310 @subsubsection Stellaris (LM3Sxxx) options
2311 @cindex Stellaris (LM3Sxxx) options
2313 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2314 @*Stellaris flash plugin only require the @var{target#}.
2316 @subsubsection stm32x options
2317 @cindex stm32x options
2319 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2320 @*stm32x flash plugin only require the @var{target#}.
2322 @subsubsection aduc702x options
2323 @cindex aduc702x options
2325 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2326 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2328 @subsection mFlash Configuration
2329 @cindex mFlash Configuration
2330 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2331 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2333 @*Configures a mflash for <@var{soc}> host bank at
2334 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2335 order. Pin number format is dependent on host GPIO calling convention.
2336 If WP or DPD pin was not used, write -1. Currently, mflash bank
2337 support s3c2440 and pxa270.
2339 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2341 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2343 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2345 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2348 @section Microcontroller specific Flash Commands
2350 @subsection AT91SAM7 specific commands
2351 @cindex AT91SAM7 specific commands
2352 The flash configuration is deduced from the chip identification register. The flash
2353 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2354 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2355 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2356 that can be erased separatly. Only an EraseAll command is supported by the controller
2357 for each flash plane and this is called with
2359 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2360 @*bulk erase flash planes first_plane to last_plane.
2361 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2362 @cindex at91sam7 gpnvm
2363 @*set or clear a gpnvm bit for the processor
2366 @subsection STR9 specific commands
2367 @cindex STR9 specific commands
2368 @anchor{STR9 specific commands}
2369 These are flash specific commands when using the str9xpec driver.
2371 @item @b{str9xpec enable_turbo} <@var{num}>
2372 @cindex str9xpec enable_turbo
2373 @*enable turbo mode, will simply remove the str9 from the chain and talk
2374 directly to the embedded flash controller.
2375 @item @b{str9xpec disable_turbo} <@var{num}>
2376 @cindex str9xpec disable_turbo
2377 @*restore the str9 into JTAG chain.
2378 @item @b{str9xpec lock} <@var{num}>
2379 @cindex str9xpec lock
2380 @*lock str9 device. The str9 will only respond to an unlock command that will
2382 @item @b{str9xpec unlock} <@var{num}>
2383 @cindex str9xpec unlock
2384 @*unlock str9 device.
2385 @item @b{str9xpec options_read} <@var{num}>
2386 @cindex str9xpec options_read
2387 @*read str9 option bytes.
2388 @item @b{str9xpec options_write} <@var{num}>
2389 @cindex str9xpec options_write
2390 @*write str9 option bytes.
2393 Note: Before using the str9xpec driver here is some background info to help
2394 you better understand how the drivers works. OpenOCD has two flash drivers for
2398 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2399 flash programming as it is faster than the @option{str9xpec} driver.
2401 Direct programming @option{str9xpec} using the flash controller. This is an
2402 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2403 core does not need to be running to program using this flash driver. Typical use
2404 for this driver is locking/unlocking the target and programming the option bytes.
2407 Before we run any commands using the @option{str9xpec} driver we must first disable
2408 the str9 core. This example assumes the @option{str9xpec} driver has been
2409 configured for flash bank 0.
2411 # assert srst, we do not want core running
2412 # while accessing str9xpec flash driver
2414 # turn off target polling
2417 str9xpec enable_turbo 0
2419 str9xpec options_read 0
2420 # re-enable str9 core
2421 str9xpec disable_turbo 0
2425 The above example will read the str9 option bytes.
2426 When performing a unlock remember that you will not be able to halt the str9 - it
2427 has been locked. Halting the core is not required for the @option{str9xpec} driver
2428 as mentioned above, just issue the commands above manually or from a telnet prompt.
2430 @subsection STR9 configuration
2431 @cindex STR9 configuration
2433 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2434 <@var{BBADR}> <@var{NBBADR}>
2435 @cindex str9x flash_config
2436 @*Configure str9 flash controller.
2438 e.g. str9x flash_config 0 4 2 0 0x80000
2440 BBSR - Boot Bank Size register
2441 NBBSR - Non Boot Bank Size register
2442 BBADR - Boot Bank Start Address register
2443 NBBADR - Boot Bank Start Address register
2447 @subsection STR9 option byte configuration
2448 @cindex STR9 option byte configuration
2450 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2451 @cindex str9xpec options_cmap
2452 @*configure str9 boot bank.
2453 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2454 @cindex str9xpec options_lvdthd
2455 @*configure str9 lvd threshold.
2456 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2457 @cindex str9xpec options_lvdsel
2458 @*configure str9 lvd source.
2459 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2460 @cindex str9xpec options_lvdwarn
2461 @*configure str9 lvd reset warning source.
2464 @subsection STM32x specific commands
2465 @cindex STM32x specific commands
2467 These are flash specific commands when using the stm32x driver.
2469 @item @b{stm32x lock} <@var{num}>
2471 @*lock stm32 device.
2472 @item @b{stm32x unlock} <@var{num}>
2473 @cindex stm32x unlock
2474 @*unlock stm32 device.
2475 @item @b{stm32x options_read} <@var{num}>
2476 @cindex stm32x options_read
2477 @*read stm32 option bytes.
2478 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2479 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2480 @cindex stm32x options_write
2481 @*write stm32 option bytes.
2482 @item @b{stm32x mass_erase} <@var{num}>
2483 @cindex stm32x mass_erase
2484 @*mass erase flash memory.
2487 @subsection Stellaris specific commands
2488 @cindex Stellaris specific commands
2490 These are flash specific commands when using the Stellaris driver.
2492 @item @b{stellaris mass_erase} <@var{num}>
2493 @cindex stellaris mass_erase
2494 @*mass erase flash memory.
2497 @node General Commands
2498 @chapter General Commands
2501 The commands documented in this chapter here are common commands that
2502 you, as a human, may want to type and see the output of. Configuration type
2503 commands are documented elsewhere.
2507 @item @b{Source Of Commands}
2508 @* OpenOCD commands can occur in a configuration script (discussed
2509 elsewhere) or typed manually by a human or supplied programatically,
2510 or via one of several TCP/IP Ports.
2512 @item @b{From the human}
2513 @* A human should interact with the telnet interface (default port: 4444,
2514 or via GDB, default port 3333)
2516 To issue commands from within a GDB session, use the @option{monitor}
2517 command, e.g. use @option{monitor poll} to issue the @option{poll}
2518 command. All output is relayed through the GDB session.
2520 @item @b{Machine Interface}
2521 The Tcl interface's intent is to be a machine interface. The default Tcl
2526 @section Daemon Commands
2528 @subsection sleep [@var{msec}]
2530 @*Wait for n milliseconds before resuming. Useful in connection with script files
2531 (@var{script} command and @var{target_script} configuration).
2533 @subsection shutdown
2535 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2537 @subsection debug_level [@var{n}]
2539 @anchor{debug_level}
2540 @*Display or adjust debug level to n<0-3>
2542 @subsection fast [@var{enable|disable}]
2544 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2545 downloads and fast memory access will work if the JTAG interface isn't too fast and
2546 the core doesn't run at a too low frequency. Note that this option only changes the default
2547 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2550 The target specific "dangerous" optimisation tweaking options may come and go
2551 as more robust and user friendly ways are found to ensure maximum throughput
2552 and robustness with a minimum of configuration.
2554 Typically the "fast enable" is specified first on the command line:
2557 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2560 @subsection log_output <@var{file}>
2562 @*Redirect logging to <file> (default: stderr)
2564 @subsection script <@var{file}>
2566 @*Execute commands from <file>
2567 See also: ``source [find FILENAME]''
2569 @section Target state handling
2570 @subsection power <@var{on}|@var{off}>
2572 @*Turn power switch to target on/off.
2573 No arguments: print status.
2574 Not all interfaces support this.
2576 @subsection reg [@option{#}|@option{name}] [value]
2578 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2579 No arguments: list all available registers for the current target.
2580 Number or name argument: display a register.
2581 Number or name and value arguments: set register value.
2583 @subsection poll [@option{on}|@option{off}]
2585 @*Poll the target for its current state. If the target is in debug mode, architecture
2586 specific information about the current state is printed. An optional parameter
2587 allows continuous polling to be enabled and disabled.
2589 @subsection halt [@option{ms}]
2591 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2592 Default [@option{ms}] is 5 seconds if no arg given.
2593 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2594 will stop OpenOCD from waiting.
2596 @subsection wait_halt [@option{ms}]
2598 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2599 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2602 @subsection resume [@var{address}]
2604 @*Resume the target at its current code position, or at an optional address.
2605 OpenOCD will wait 5 seconds for the target to resume.
2607 @subsection step [@var{address}]
2609 @*Single-step the target at its current code position, or at an optional address.
2611 @subsection reset [@option{run}|@option{halt}|@option{init}]
2613 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2615 With no arguments a "reset run" is executed
2619 @*Let the target run.
2622 @*Immediately halt the target (works only with certain configurations).
2625 @*Immediately halt the target, and execute the reset script (works only with certain
2629 @subsection soft_reset_halt
2631 @*Requesting target halt and executing a soft reset. This is often used
2632 when a target cannot be reset and halted. The target, after reset is
2633 released begins to execute code. OpenOCD attempts to stop the CPU and
2634 then sets the program counter back to the reset vector. Unfortunately
2635 the code that was executed may have left the hardware in an unknown
2639 @section Memory access commands
2641 display available RAM memory.
2642 @subsection Memory peek/poke type commands
2643 These commands allow accesses of a specific size to the memory
2644 system. Often these are used to configure the current target in some
2645 special way. For example - one may need to write certian values to the
2646 SDRAM controller to enable SDRAM.
2649 @item To change the current target see the ``targets'' (plural) command
2650 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2654 @item @b{mdw} <@var{addr}> [@var{count}]
2656 @*display memory words (32bit)
2657 @item @b{mdh} <@var{addr}> [@var{count}]
2659 @*display memory half-words (16bit)
2660 @item @b{mdb} <@var{addr}> [@var{count}]
2662 @*display memory bytes (8bit)
2663 @item @b{mww} <@var{addr}> <@var{value}>
2665 @*write memory word (32bit)
2666 @item @b{mwh} <@var{addr}> <@var{value}>
2668 @*write memory half-word (16bit)
2669 @item @b{mwb} <@var{addr}> <@var{value}>
2671 @*write memory byte (8bit)
2674 @section Image loading commands
2675 @subsection load_image
2676 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2679 @*Load image <@var{file}> to target memory at <@var{address}>
2680 @subsection fast_load_image
2681 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2682 @cindex fast_load_image
2683 @anchor{fast_load_image}
2684 @*Normally you should be using @b{load_image} or GDB load. However, for
2685 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2686 host), storing the image in memory and uploading the image to the target
2687 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2688 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2689 memory, i.e. does not affect target. This approach is also useful when profiling
2690 target programming performance as I/O and target programming can easily be profiled
2692 @subsection fast_load
2696 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2697 @subsection dump_image
2698 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2701 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2702 (binary) <@var{file}>.
2703 @subsection verify_image
2704 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2705 @cindex verify_image
2706 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2707 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2710 @section Breakpoint commands
2711 @cindex Breakpoint commands
2713 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2715 @*set breakpoint <address> <length> [hw]
2716 @item @b{rbp} <@var{addr}>
2718 @*remove breakpoint <adress>
2719 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2721 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2722 @item @b{rwp} <@var{addr}>
2724 @*remove watchpoint <adress>
2727 @section Misc Commands
2728 @cindex Other Target Commands
2730 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2732 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2736 @section Target Specific Commands
2737 @cindex Target Specific Commands
2741 @section Architecture Specific Commands
2742 @cindex Architecture Specific Commands
2744 @subsection ARMV4/5 specific commands
2745 @cindex ARMV4/5 specific commands
2747 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2748 or Intel XScale (XScale isn't supported yet).
2750 @item @b{armv4_5 reg}
2752 @*Display a list of all banked core registers, fetching the current value from every
2753 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2755 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2756 @cindex armv4_5 core_mode
2757 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2758 The target is resumed in the currently set @option{core_mode}.
2761 @subsection ARM7/9 specific commands
2762 @cindex ARM7/9 specific commands
2764 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2765 ARM920T or ARM926EJ-S.
2767 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2768 @cindex arm7_9 dbgrq
2769 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2770 safe for all but ARM7TDMI--S cores (like Philips LPC).
2771 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2772 @cindex arm7_9 fast_memory_access
2773 @anchor{arm7_9 fast_memory_access}
2774 @*Allow OpenOCD to read and write memory without checking completion of
2775 the operation. This provides a huge speed increase, especially with USB JTAG
2776 cables (FT2232), but might be unsafe if used with targets running at very low
2777 speeds, like the 32kHz startup clock of an AT91RM9200.
2778 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2779 @cindex arm7_9 dcc_downloads
2780 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2781 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2782 unsafe, especially with targets running at very low speeds. This command was introduced
2783 with OpenOCD rev. 60.
2786 @subsection ARM720T specific commands
2787 @cindex ARM720T specific commands
2790 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2791 @cindex arm720t cp15
2792 @*display/modify cp15 register <@option{num}> [@option{value}].
2793 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2794 @cindex arm720t md<bhw>_phys
2795 @*Display memory at physical address addr.
2796 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2797 @cindex arm720t mw<bhw>_phys
2798 @*Write memory at physical address addr.
2799 @item @b{arm720t virt2phys} <@var{va}>
2800 @cindex arm720t virt2phys
2801 @*Translate a virtual address to a physical address.
2804 @subsection ARM9TDMI specific commands
2805 @cindex ARM9TDMI specific commands
2808 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2809 @cindex arm9tdmi vector_catch
2810 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2811 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2812 @option{irq} @option{fiq}.
2814 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2817 @subsection ARM966E specific commands
2818 @cindex ARM966E specific commands
2821 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2822 @cindex arm966e cp15
2823 @*display/modify cp15 register <@option{num}> [@option{value}].
2826 @subsection ARM920T specific commands
2827 @cindex ARM920T specific commands
2830 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2831 @cindex arm920t cp15
2832 @*display/modify cp15 register <@option{num}> [@option{value}].
2833 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2834 @cindex arm920t cp15i
2835 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2836 @item @b{arm920t cache_info}
2837 @cindex arm920t cache_info
2838 @*Print information about the caches found. This allows to see whether your target
2839 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2840 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2841 @cindex arm920t md<bhw>_phys
2842 @*Display memory at physical address addr.
2843 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2844 @cindex arm920t mw<bhw>_phys
2845 @*Write memory at physical address addr.
2846 @item @b{arm920t read_cache} <@var{filename}>
2847 @cindex arm920t read_cache
2848 @*Dump the content of ICache and DCache to a file.
2849 @item @b{arm920t read_mmu} <@var{filename}>
2850 @cindex arm920t read_mmu
2851 @*Dump the content of the ITLB and DTLB to a file.
2852 @item @b{arm920t virt2phys} <@var{va}>
2853 @cindex arm920t virt2phys
2854 @*Translate a virtual address to a physical address.
2857 @subsection ARM926EJ-S specific commands
2858 @cindex ARM926EJ-S specific commands
2861 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2862 @cindex arm926ejs cp15
2863 @*display/modify cp15 register <@option{num}> [@option{value}].
2864 @item @b{arm926ejs cache_info}
2865 @cindex arm926ejs cache_info
2866 @*Print information about the caches found.
2867 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2868 @cindex arm926ejs md<bhw>_phys
2869 @*Display memory at physical address addr.
2870 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2871 @cindex arm926ejs mw<bhw>_phys
2872 @*Write memory at physical address addr.
2873 @item @b{arm926ejs virt2phys} <@var{va}>
2874 @cindex arm926ejs virt2phys
2875 @*Translate a virtual address to a physical address.
2878 @subsection CORTEX_M3 specific commands
2879 @cindex CORTEX_M3 specific commands
2882 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2883 @cindex cortex_m3 maskisr
2884 @*Enable masking (disabling) interrupts during target step/resume.
2888 @section Debug commands
2889 @cindex Debug commands
2890 The following commands give direct access to the core, and are most likely
2891 only useful while debugging OpenOCD.
2893 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2894 @cindex arm7_9 write_xpsr
2895 @*Immediately write either the current program status register (CPSR) or the saved
2896 program status register (SPSR), without changing the register cache (as displayed
2897 by the @option{reg} and @option{armv4_5 reg} commands).
2898 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2899 <@var{0=cpsr},@var{1=spsr}>
2900 @cindex arm7_9 write_xpsr_im8
2901 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2902 operation (similar to @option{write_xpsr}).
2903 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2904 @cindex arm7_9 write_core_reg
2905 @*Write a core register, without changing the register cache (as displayed by the
2906 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2907 encoding of the [M4:M0] bits of the PSR.
2910 @section Target Requests
2911 @cindex Target Requests
2912 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2913 See libdcc in the contrib dir for more details.
2915 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}|@var{charmsg}>
2916 @cindex target_request debugmsgs
2917 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running. @var{charmsg} receives messages if Linux kernel ``Kernel low-level debugging via EmbeddedICE DCC channel'' option is enabled.
2921 @chapter JTAG Commands
2922 @cindex JTAG Commands
2923 Generally most people will not use the bulk of these commands. They
2924 are mostly used by the OpenOCD developers or those who need to
2925 directly manipulate the JTAG taps.
2927 In general these commands control JTAG taps at a very low level. For
2928 example if you need to control a JTAG Route Controller (i.e.: the
2929 OMAP3530 on the Beagle Board has one) you might use these commands in
2930 a script or an event procedure.
2934 @item @b{scan_chain}
2936 @*Print current scan chain configuration.
2937 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2939 @*Toggle reset lines.
2940 @item @b{endstate} <@var{tap_state}>
2942 @*Finish JTAG operations in <@var{tap_state}>.
2943 @item @b{runtest} <@var{num_cycles}>
2945 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2946 @item @b{statemove} [@var{tap_state}]
2948 @*Move to current endstate or [@var{tap_state}]
2949 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2951 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2952 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2954 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2955 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2956 @cindex verify_ircapture
2957 @*Verify value captured during Capture-IR. Default is enabled.
2958 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2960 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2961 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2963 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2968 Available tap_states are:
3008 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
3009 be used to access files on PCs (either the developer's PC or some other PC).
3011 The way this works on the ZY1000 is to prefix a filename by
3012 "/tftp/ip/" and append the TFTP path on the TFTP
3013 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
3014 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
3015 if the file was hosted on the embedded host.
3017 In order to achieve decent performance, you must choose a TFTP server
3018 that supports a packet size bigger than the default packet size (512 bytes). There
3019 are numerous TFTP servers out there (free and commercial) and you will have to do
3020 a bit of googling to find something that fits your requirements.
3022 @node Sample Scripts
3023 @chapter Sample Scripts
3026 This page shows how to use the Target Library.
3028 The configuration script can be divided into the following sections:
3030 @item Daemon configuration
3032 @item JTAG scan chain
3033 @item Target configuration
3034 @item Flash configuration
3037 Detailed information about each section can be found at OpenOCD configuration.
3039 @section AT91R40008 example
3040 @cindex AT91R40008 example
3041 To start OpenOCD with a target script for the AT91R40008 CPU and reset
3042 the CPU upon startup of the OpenOCD daemon.
3044 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
3048 @node GDB and OpenOCD
3049 @chapter GDB and OpenOCD
3050 @cindex GDB and OpenOCD
3051 OpenOCD complies with the remote gdbserver protocol, and as such can be used
3052 to debug remote targets.
3054 @section Connecting to GDB
3055 @cindex Connecting to GDB
3056 @anchor{Connecting to GDB}
3057 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
3058 instance GDB 6.3 has a known bug that produces bogus memory access
3059 errors, which has since been fixed: look up 1836 in
3060 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
3062 @*OpenOCD can communicate with GDB in two ways:
3065 A socket (TCP/IP) connection is typically started as follows:
3067 target remote localhost:3333
3069 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3071 A pipe connection is typically started as follows:
3073 target remote | openocd --pipe
3075 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3076 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3080 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3083 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3084 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3085 packet size and the device's memory map.
3087 Previous versions of OpenOCD required the following GDB options to increase
3088 the packet size and speed up GDB communication:
3090 set remote memory-write-packet-size 1024
3091 set remote memory-write-packet-size fixed
3092 set remote memory-read-packet-size 1024
3093 set remote memory-read-packet-size fixed
3095 This is now handled in the @option{qSupported} PacketSize and should not be required.
3097 @section Programming using GDB
3098 @cindex Programming using GDB
3100 By default the target memory map is sent to GDB. This can be disabled by
3101 the following OpenOCD configuration option:
3103 gdb_memory_map disable
3105 For this to function correctly a valid flash configuration must also be set
3106 in OpenOCD. For faster performance you should also configure a valid
3109 Informing GDB of the memory map of the target will enable GDB to protect any
3110 flash areas of the target and use hardware breakpoints by default. This means
3111 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3112 using a memory map. @xref{gdb_breakpoint_override}.
3114 To view the configured memory map in GDB, use the GDB command @option{info mem}
3115 All other unassigned addresses within GDB are treated as RAM.
3117 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3118 This can be changed to the old behaviour by using the following GDB command
3120 set mem inaccessible-by-default off
3123 If @option{gdb_flash_program enable} is also used, GDB will be able to
3124 program any flash memory using the vFlash interface.
3126 GDB will look at the target memory map when a load command is given, if any
3127 areas to be programmed lie within the target flash area the vFlash packets
3130 If the target needs configuring before GDB programming, an event
3131 script can be executed:
3133 $_TARGETNAME configure -event EVENTNAME BODY
3136 To verify any flash programming the GDB command @option{compare-sections}
3139 @node Tcl Scripting API
3140 @chapter Tcl Scripting API
3141 @cindex Tcl Scripting API
3145 The commands are stateless. E.g. the telnet command line has a concept
3146 of currently active target, the Tcl API proc's take this sort of state
3147 information as an argument to each proc.
3149 There are three main types of return values: single value, name value
3150 pair list and lists.
3152 Name value pair. The proc 'foo' below returns a name/value pair
3158 > set foo(you) Oyvind
3159 > set foo(mouse) Micky
3160 > set foo(duck) Donald
3168 me Duane you Oyvind mouse Micky duck Donald
3170 Thus, to get the names of the associative array is easy:
3172 foreach { name value } [set foo] {
3173 puts "Name: $name, Value: $value"
3177 Lists returned must be relatively small. Otherwise a range
3178 should be passed in to the proc in question.
3180 @section Internal low-level Commands
3182 By low-level, the intent is a human would not directly use these commands.
3184 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3185 is the low level API upon which "flash banks" is implemented.
3188 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3190 Read memory and return as a Tcl array for script processing
3191 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3193 Convert a Tcl array to memory locations and write the values
3194 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3196 Return information about the flash banks
3199 OpenOCD commands can consist of two words, e.g. "flash banks". The
3200 startup.tcl "unknown" proc will translate this into a Tcl proc
3201 called "flash_banks".
3203 @section OpenOCD specific Global Variables
3207 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3208 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3209 holds one of the following values:
3212 @item @b{winxx} Built using Microsoft Visual Studio
3213 @item @b{linux} Linux is the underlying operating sytem
3214 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3215 @item @b{cygwin} Running under Cygwin
3216 @item @b{mingw32} Running under MingW32
3217 @item @b{other} Unknown, none of the above.
3220 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3223 @chapter Deprecated/Removed Commands
3224 @cindex Deprecated/Removed Commands
3225 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3228 @item @b{arm7_9 fast_writes}
3229 @cindex arm7_9 fast_writes
3230 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3231 @item @b{arm7_9 force_hw_bkpts}
3232 @cindex arm7_9 force_hw_bkpts
3233 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3234 for flash if the GDB memory map has been set up(default when flash is declared in
3235 target configuration). @xref{gdb_breakpoint_override}.
3236 @item @b{arm7_9 sw_bkpts}
3237 @cindex arm7_9 sw_bkpts
3238 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3239 @item @b{daemon_startup}
3240 @cindex daemon_startup
3241 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3242 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3243 and @option{target cortex_m3 little reset_halt 0}.
3244 @item @b{dump_binary}
3246 @*use @option{dump_image} command with same args. @xref{dump_image}.
3247 @item @b{flash erase}
3249 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3250 @item @b{flash write}
3252 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3253 @item @b{flash write_binary}
3254 @cindex flash write_binary
3255 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3256 @item @b{flash auto_erase}
3257 @cindex flash auto_erase
3258 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3259 @item @b{load_binary}
3261 @*use @option{load_image} command with same args. @xref{load_image}.
3262 @item @b{run_and_halt_time}
3263 @cindex run_and_halt_time
3264 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3271 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3273 @*use the create subcommand of @option{target}.
3274 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3275 @cindex target_script
3276 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3277 @item @b{working_area}
3278 @cindex working_area
3279 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3286 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3288 @cindex adaptive clocking
3291 In digital circuit design it is often refered to as ``clock
3292 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3293 operating at some speed, your target is operating at another. The two
3294 clocks are not synchronised, they are ``asynchronous''
3296 In order for the two to work together they must be synchronised. Otherwise
3297 the two systems will get out of sync with each other and nothing will
3298 work. There are 2 basic options:
3301 Use a special circuit.
3303 One clock must be some multiple slower than the other.
3306 @b{Does this really matter?} For some chips and some situations, this
3307 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3308 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3309 program/enable the oscillators and eventually the main clock. It is in
3310 those critical times you must slow the JTAG clock to sometimes 1 to
3313 Imagine debugging a 500MHz ARM926 hand held battery powered device
3314 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3317 @b{Solution #1 - A special circuit}
3319 In order to make use of this, your JTAG dongle must support the RTCK
3320 feature. Not all dongles support this - keep reading!
3322 The RTCK signal often found in some ARM chips is used to help with
3323 this problem. ARM has a good description of the problem described at
3324 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3325 28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
3326 work? / how does adaptive clocking work?''.
3328 The nice thing about adaptive clocking is that ``battery powered hand
3329 held device example'' - the adaptiveness works perfectly all the
3330 time. One can set a break point or halt the system in the deep power
3331 down code, slow step out until the system speeds up.
3333 @b{Solution #2 - Always works - but may be slower}
3335 Often this is a perfectly acceptable solution.
3337 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3338 the target clock speed. But what that ``magic division'' is varies
3339 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3340 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3341 1/12 the clock speed.
3343 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3345 You can still debug the 'low power' situations - you just need to
3346 manually adjust the clock speed at every step. While painful and
3347 tedious, it is not always practical.
3349 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3350 have a special debug mode in your application that does a ``high power
3351 sleep''. If you are careful - 98% of your problems can be debugged
3354 To set the JTAG frequency use the command:
3362 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3364 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3365 around Windows filenames.
3378 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3380 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3381 claims to come with all the necessary DLLs. When using Cygwin, try launching
3382 OpenOCD from the Cygwin shell.
3384 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3385 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3386 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3388 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3389 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3390 software breakpoints consume one of the two available hardware breakpoints.
3392 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3394 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3395 clock at the time you're programming the flash. If you've specified the crystal's
3396 frequency, make sure the PLL is disabled. If you've specified the full core speed
3397 (e.g. 60MHz), make sure the PLL is enabled.
3399 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3400 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3401 out while waiting for end of scan, rtck was disabled".
3403 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3404 settings in your PC BIOS (ECP, EPP, and different versions of those).
3406 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3407 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3408 memory read caused data abort".
3410 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3411 beyond the last valid frame. It might be possible to prevent this by setting up
3412 a proper "initial" stack frame, if you happen to know what exactly has to
3413 be done, feel free to add this here.
3415 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3416 stack before calling main(). What GDB is doing is ``climbing'' the run
3417 time stack by reading various values on the stack using the standard
3418 call frame for the target. GDB keeps going - until one of 2 things
3419 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3420 stackframes have been processed. By pushing zeros on the stack, GDB
3423 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3424 your C code, do the same - artifically push some zeros onto the stack,
3425 remember to pop them off when the ISR is done.
3427 @b{Also note:} If you have a multi-threaded operating system, they
3428 often do not @b{in the intrest of saving memory} waste these few
3432 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3433 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3435 This warning doesn't indicate any serious problem, as long as you don't want to
3436 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3437 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3438 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3439 independently. With this setup, it's not possible to halt the core right out of
3440 reset, everything else should work fine.
3442 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3443 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3444 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3445 quit with an error message. Is there a stability issue with OpenOCD?
3447 No, this is not a stability issue concerning OpenOCD. Most users have solved
3448 this issue by simply using a self-powered USB hub, which they connect their
3449 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3450 supply stable enough for the Amontec JTAGkey to be operated.
3452 @b{Laptops running on battery have this problem too...}
3454 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3455 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3456 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3457 What does that mean and what might be the reason for this?
3459 First of all, the reason might be the USB power supply. Try using a self-powered
3460 hub instead of a direct connection to your computer. Secondly, the error code 4
3461 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3462 chip ran into some sort of error - this points us to a USB problem.
3464 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3465 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3466 What does that mean and what might be the reason for this?
3468 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3469 has closed the connection to OpenOCD. This might be a GDB issue.
3471 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3472 are described, there is a parameter for specifying the clock frequency
3473 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3474 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3475 specified in kilohertz. However, I do have a quartz crystal of a
3476 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3477 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3480 No. The clock frequency specified here must be given as an integral number.
3481 However, this clock frequency is used by the In-Application-Programming (IAP)
3482 routines of the LPC2000 family only, which seems to be very tolerant concerning
3483 the given clock frequency, so a slight difference between the specified clock
3484 frequency and the actual clock frequency will not cause any trouble.
3486 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3488 Well, yes and no. Commands can be given in arbitrary order, yet the
3489 devices listed for the JTAG scan chain must be given in the right
3490 order (jtag newdevice), with the device closest to the TDO-Pin being
3491 listed first. In general, whenever objects of the same type exist
3492 which require an index number, then these objects must be given in the
3493 right order (jtag newtap, targets and flash banks - a target
3494 references a jtag newtap and a flash bank references a target).
3496 You can use the ``scan_chain'' command to verify and display the tap order.
3498 @item @b{JTAG Tap Order} JTAG tap order - command order
3500 Many newer devices have multiple JTAG taps. For example: ST
3501 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3502 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3503 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3504 connected to the boundary scan tap, which then connects to the
3505 Cortex-M3 tap, which then connects to the TDO pin.
3507 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3508 (2) The boundary scan tap. If your board includes an additional JTAG
3509 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3510 place it before or after the STM32 chip in the chain. For example:
3513 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3514 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3515 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3516 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3517 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3520 The ``jtag device'' commands would thus be in the order shown below. Note:
3523 @item jtag newtap Xilinx tap -irlen ...
3524 @item jtag newtap stm32 cpu -irlen ...
3525 @item jtag newtap stm32 bs -irlen ...
3526 @item # Create the debug target and say where it is
3527 @item target create stm32.cpu -chain-position stm32.cpu ...
3531 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3532 log file, I can see these error messages: Error: arm7_9_common.c:561
3533 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3539 @node Tcl Crash Course
3540 @chapter Tcl Crash Course
3543 Not everyone knows Tcl - this is not intended to be a replacement for
3544 learning Tcl, the intent of this chapter is to give you some idea of
3545 how the Tcl scripts work.
3547 This chapter is written with two audiences in mind. (1) OpenOCD users
3548 who need to understand a bit more of how JIM-Tcl works so they can do
3549 something useful, and (2) those that want to add a new command to
3552 @section Tcl Rule #1
3553 There is a famous joke, it goes like this:
3555 @item Rule #1: The wife is always correct
3556 @item Rule #2: If you think otherwise, See Rule #1
3559 The Tcl equal is this:
3562 @item Rule #1: Everything is a string
3563 @item Rule #2: If you think otherwise, See Rule #1
3566 As in the famous joke, the consequences of Rule #1 are profound. Once
3567 you understand Rule #1, you will understand Tcl.
3569 @section Tcl Rule #1b
3570 There is a second pair of rules.
3572 @item Rule #1: Control flow does not exist. Only commands
3573 @* For example: the classic FOR loop or IF statement is not a control
3574 flow item, they are commands, there is no such thing as control flow
3576 @item Rule #2: If you think otherwise, See Rule #1
3577 @* Actually what happens is this: There are commands that by
3578 convention, act like control flow key words in other languages. One of
3579 those commands is the word ``for'', another command is ``if''.
3582 @section Per Rule #1 - All Results are strings
3583 Every Tcl command results in a string. The word ``result'' is used
3584 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3585 Everything is a string}
3587 @section Tcl Quoting Operators
3588 In life of a Tcl script, there are two important periods of time, the
3589 difference is subtle.
3592 @item Evaluation Time
3595 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3596 three primary quoting constructs, the [square-brackets] the
3597 @{curly-braces@} and ``double-quotes''
3599 By now you should know $VARIABLES always start with a $DOLLAR
3600 sign. BTW: To set a variable, you actually use the command ``set'', as
3601 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3602 = 1'' statement, but without the equal sign.
3605 @item @b{[square-brackets]}
3606 @* @b{[square-brackets]} are command substitutions. It operates much
3607 like Unix Shell `back-ticks`. The result of a [square-bracket]
3608 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3609 string}. These two statements are roughly identical:
3613 echo "The Date is: $X"
3616 puts "The Date is: $X"
3618 @item @b{``double-quoted-things''}
3619 @* @b{``double-quoted-things''} are just simply quoted
3620 text. $VARIABLES and [square-brackets] are expanded in place - the
3621 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3625 puts "It is now \"[date]\", $x is in 1 hour"
3627 @item @b{@{Curly-Braces@}}
3628 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3629 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3630 'single-quote' operators in BASH shell scripts, with the added
3631 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3632 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3633 28/nov/2008, Jim/OpenOCD does not have a date command.
3636 @section Consequences of Rule 1/2/3/4
3638 The consequences of Rule 1 are profound.
3640 @subsection Tokenisation & Execution.
3642 Of course, whitespace, blank lines and #comment lines are handled in
3645 As a script is parsed, each (multi) line in the script file is
3646 tokenised and according to the quoting rules. After tokenisation, that
3647 line is immedatly executed.
3649 Multi line statements end with one or more ``still-open''
3650 @{curly-braces@} which - eventually - closes a few lines later.
3652 @subsection Command Execution
3654 Remember earlier: There are no ``control flow''
3655 statements in Tcl. Instead there are COMMANDS that simply act like
3656 control flow operators.
3658 Commands are executed like this:
3661 @item Parse the next line into (argc) and (argv[]).
3662 @item Look up (argv[0]) in a table and call its function.
3663 @item Repeat until End Of File.
3666 It sort of works like this:
3669 ReadAndParse( &argc, &argv );
3671 cmdPtr = LookupCommand( argv[0] );
3673 (*cmdPtr->Execute)( argc, argv );
3677 When the command ``proc'' is parsed (which creates a procedure
3678 function) it gets 3 parameters on the command line. @b{1} the name of
3679 the proc (function), @b{2} the list of parameters, and @b{3} the body
3680 of the function. Not the choice of words: LIST and BODY. The PROC
3681 command stores these items in a table somewhere so it can be found by
3684 @subsection The FOR command
3686 The most interesting command to look at is the FOR command. In Tcl,
3687 the FOR command is normally implemented in C. Remember, FOR is a
3688 command just like any other command.
3690 When the ascii text containing the FOR command is parsed, the parser
3691 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3695 @item The ascii text 'for'
3696 @item The start text
3697 @item The test expression
3702 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3703 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3704 Often many of those parameters are in @{curly-braces@} - thus the
3705 variables inside are not expanded or replaced until later.
3707 Remember that every Tcl command looks like the classic ``main( argc,
3708 argv )'' function in C. In JimTCL - they actually look like this:
3712 MyCommand( Jim_Interp *interp,
3714 Jim_Obj * const *argvs );
3717 Real Tcl is nearly identical. Although the newer versions have
3718 introduced a byte-code parser and intepreter, but at the core, it
3719 still operates in the same basic way.
3721 @subsection FOR command implementation
3723 To understand Tcl it is perhaps most helpful to see the FOR
3724 command. Remember, it is a COMMAND not a control flow structure.
3726 In Tcl there are two underlying C helper functions.
3728 Remember Rule #1 - You are a string.
3730 The @b{first} helper parses and executes commands found in an ascii
3731 string. Commands can be seperated by semicolons, or newlines. While
3732 parsing, variables are expanded via the quoting rules.
3734 The @b{second} helper evaluates an ascii string as a numerical
3735 expression and returns a value.
3737 Here is an example of how the @b{FOR} command could be
3738 implemented. The pseudo code below does not show error handling.
3740 void Execute_AsciiString( void *interp, const char *string );
3742 int Evaluate_AsciiExpression( void *interp, const char *string );
3745 MyForCommand( void *interp,
3750 SetResult( interp, "WRONG number of parameters");
3754 // argv[0] = the ascii string just like C
3756 // Execute the start statement.
3757 Execute_AsciiString( interp, argv[1] );
3761 i = Evaluate_AsciiExpression(interp, argv[2]);
3766 Execute_AsciiString( interp, argv[3] );
3768 // Execute the LOOP part
3769 Execute_AsciiString( interp, argv[4] );
3773 SetResult( interp, "" );
3778 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3779 in the same basic way.
3781 @section OpenOCD Tcl Usage
3783 @subsection source and find commands
3784 @b{Where:} In many configuration files
3785 @* Example: @b{ source [find FILENAME] }
3786 @*Remember the parsing rules
3788 @item The FIND command is in square brackets.
3789 @* The FIND command is executed with the parameter FILENAME. It should
3790 find the full path to the named file. The RESULT is a string, which is
3791 substituted on the orginal command line.
3792 @item The command source is executed with the resulting filename.
3793 @* SOURCE reads a file and executes as a script.
3795 @subsection format command
3796 @b{Where:} Generally occurs in numerous places.
3797 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3803 puts [format "The answer: %d" [expr $x * $y]]
3806 @item The SET command creates 2 variables, X and Y.
3807 @item The double [nested] EXPR command performs math
3808 @* The EXPR command produces numerical result as a string.
3810 @item The format command is executed, producing a single string
3811 @* Refer to Rule #1.
3812 @item The PUTS command outputs the text.
3814 @subsection Body or Inlined Text
3815 @b{Where:} Various TARGET scripts.
3818 proc someproc @{@} @{
3819 ... multiple lines of stuff ...
3821 $_TARGETNAME configure -event FOO someproc
3822 #2 Good - no variables
3823 $_TARGETNAME confgure -event foo "this ; that;"
3824 #3 Good Curly Braces
3825 $_TARGETNAME configure -event FOO @{
3828 #4 DANGER DANGER DANGER
3829 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3832 @item The $_TARGETNAME is an OpenOCD variable convention.
3833 @*@b{$_TARGETNAME} represents the last target created, the value changes
3834 each time a new target is created. Remember the parsing rules. When
3835 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3836 the name of the target which happens to be a TARGET (object)
3838 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3839 @*There are 4 examples:
3841 @item The TCLBODY is a simple string that happens to be a proc name
3842 @item The TCLBODY is several simple commands seperated by semicolons
3843 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3844 @item The TCLBODY is a string with variables that get expanded.
3847 In the end, when the target event FOO occurs the TCLBODY is
3848 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3849 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3851 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3852 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3853 and the text is evaluated. In case #4, they are replaced before the
3854 ``Target Object Command'' is executed. This occurs at the same time
3855 $_TARGETNAME is replaced. In case #4 the date will never
3856 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3857 Jim/OpenOCD does not have a date command@}
3859 @subsection Global Variables
3860 @b{Where:} You might discover this when writing your own procs @* In
3861 simple terms: Inside a PROC, if you need to access a global variable
3862 you must say so. See also ``upvar''. Example:
3864 proc myproc @{ @} @{
3865 set y 0 #Local variable Y
3866 global x #Global variable X
3867 puts [format "X=%d, Y=%d" $x $y]
3870 @section Other Tcl Hacks
3871 @b{Dynamic variable creation}
3873 # Dynamically create a bunch of variables.
3874 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3876 set vn [format "BIT%d" $x]
3880 set $vn [expr (1 << $x)]
3883 @b{Dynamic proc/command creation}
3885 # One "X" function - 5 uart functions.
3886 foreach who @{A B C D E@}
3887 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3891 @node Target Library
3892 @chapter Target Library
3893 @cindex Target Library
3895 OpenOCD comes with a target configuration script library. These scripts can be
3896 used as-is or serve as a starting point.
3898 The target library is published together with the OpenOCD executable and
3899 the path to the target library is in the OpenOCD script search path.
3900 Similarly there are example scripts for configuring the JTAG interface.
3902 The command line below uses the example parport configuration script
3903 that ship with OpenOCD, then configures the str710.cfg target and
3904 finally issues the init and reset commands. The communication speed
3905 is set to 10kHz for reset and 8MHz for post reset.
3908 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3911 To list the target scripts available:
3914 $ ls /usr/local/lib/openocd/target
3916 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3917 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3918 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3919 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3925 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3926 @comment case issue with ``Index.html'' and ``index.html''
3927 @comment Occurs when creating ``--html --no-split'' output
3928 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3929 @unnumbered OpenOCD Index