1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD
55 * Developers:: OpenOCD Developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl Scripting API:: Tcl Scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target Library:: Target Library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main Index
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 based, parallel port based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}.
126 @section Coding Style
129 The following rules try to describe formatting and naming conventions that should be
130 followed to make the whole OpenOCD code look more consistent. The ultimate goal of
131 coding style should be readability, and these rules may be ignored for a particular
132 (small) piece of code if that makes it more readable.
134 @subsection Formatting rules:
136 @item remove any trailing white space
137 @item use TAB characters for indentation, not spaces
138 @item displayed TAB width is 4 characters
139 @item make sure NOT to use DOS '\r\n' line feeds
140 @item do not add more than 2 empty lines to source files
141 @item do not add trailing empty lines to source files
142 @item do not use C++ style comments (//)
143 @item lines may be reasonably wide - there's no anachronistic 80 characters limit
146 @subsection Naming rules:
148 @item identifiers use lower-case letters only
149 @item identifiers consisting of multiple words use underline characters between consecutive words
150 @item macros use upper-case letters only
151 @item structure names shall be appended with '_s'
152 @item typedefs shall be appended with '_t'
155 @subsection Function calls:
157 @item function calls have no space between the functions name and the parameter
158 list: my_func(param1, param2, ...)
163 @cindex building OpenOCD
165 @section Pre-Built Tools
166 If you are interested in getting actual work done rather than building
167 OpenOCD, then check if your interface supplier provides binaries for
168 you. Chances are that that binary is from some SVN version that is more
169 stable than SVN trunk where bleeding edge development takes place.
171 @section Packagers Please Read!
173 You are a @b{PACKAGER} of OpenOCD if you
176 @item @b{Sell dongles} and include pre-built binaries
177 @item @b{Supply tools} i.e.: A complete development solution
178 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
179 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
182 As a @b{PACKAGER} - you are at the top of the food chain. You solve
183 problems for downstream users. What you fix or solve - solves hundreds
184 if not thousands of user questions. If something does not work for you
185 please let us know. That said, would also like you to follow a few
189 @item @b{Always build with printer ports enabled.}
190 @item @b{Try to use LIBFTDI + LIBUSB where possible. You cover more bases.}
194 @item @b{Why YES to LIBFTDI + LIBUSB?}
196 @item @b{LESS} work - libusb perhaps already there
197 @item @b{LESS} work - identical code, multiple platforms
198 @item @b{MORE} dongles are supported
199 @item @b{MORE} platforms are supported
200 @item @b{MORE} complete solution
202 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)?
204 @item @b{LESS} speed - some say it is slower
205 @item @b{LESS} complex to distribute (external dependencies)
209 @section Building From Source
211 You can download the current SVN version with an SVN client of your choice from the
212 following repositories:
214 @uref{svn://svn.berlios.de/openocd/trunk}
218 @uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
220 Using the SVN command line client, you can use the following command to fetch the
221 latest version (make sure there is no (non-svn) directory called "openocd" in the
225 svn checkout svn://svn.berlios.de/openocd/trunk openocd
228 Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
229 For building on Windows,
230 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
231 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
232 paths, resulting in obscure dependency errors (This is an observation I've gathered
233 from the logs of one user - correct me if I'm wrong).
235 You further need the appropriate driver files, if you want to build support for
236 a FTDI FT2232 based interface:
239 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
240 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
241 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
242 homepage (@uref{http://www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
245 libftdi is supported under Windows. Do not use versions earlier than 0.14.
247 In general, the D2XX driver provides superior performance (several times as fast),
248 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
249 a kernel module, only a user space library.
251 To build OpenOCD (on both Linux and Cygwin), use the following commands:
257 Bootstrap generates the configure script, and prepares building on your system.
260 ./configure [options, see below]
263 Configure generates the Makefiles used to build OpenOCD.
270 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
272 The configure script takes several options, specifying which JTAG interfaces
273 should be included (among other things):
277 @option{--enable-parport} - Enable building the PC parallel port driver.
279 @option{--enable-parport_ppdev} - Enable use of ppdev (/dev/parportN) for parport.
281 @option{--enable-parport_giveio} - Enable use of giveio for parport instead of ioperm.
283 @option{--enable-amtjtagaccel} - Enable building the Amontec JTAG-Accelerator driver.
285 @option{--enable-ecosboard} - Enable building support for eCosBoard based JTAG debugger.
287 @option{--enable-ioutil} - Enable ioutil functions - useful for standalone OpenOCD implementations.
289 @option{--enable-httpd} - Enable builtin httpd server - useful for standalone OpenOCD implementations.
291 @option{--enable-ep93xx} - Enable building support for EP93xx based SBCs.
293 @option{--enable-at91rm9200} - Enable building support for AT91RM9200 based SBCs.
295 @option{--enable-gw16012} - Enable building support for the Gateworks GW16012 JTAG programmer.
297 @option{--enable-ft2232_ftd2xx} - Numerous USB type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
299 @option{--enable-ft2232_libftdi} - An open source (free) alternative to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin).
301 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
303 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only. Equivalent of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
305 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
307 @option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
309 @option{--enable-presto_ftd2xx} - Enable building support for ASIX Presto programmer using the FTD2XX driver.
311 @option{--enable-usbprog} - Enable building support for the USBprog JTAG programmer.
313 @option{--enable-oocd_trace} - Enable building support for the OpenOCD+trace ETM capture device.
315 @option{--enable-jlink} - Enable building support for the Segger J-Link JTAG programmer.
317 @option{--enable-vsllink} - Enable building support for the Versaloon-Link JTAG programmer.
319 @option{--enable-rlink} - Enable building support for the Raisonance RLink JTAG programmer.
321 @option{--enable-arm-jtag-ew} - Enable building support for the Olimex ARM-JTAG-EW programmer.
323 @option{--enable-dummy} - Enable building the dummy port driver.
326 @section Parallel Port Dongles
328 If you want to access the parallel port using the PPDEV interface you have to specify
329 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
330 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
331 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
333 The same is true for the @option{--enable-parport_giveio} option, you have to
334 use both the @option{--enable-parport} AND the @option{--enable-parport_giveio} option if you want to use giveio instead of ioperm parallel port access method.
336 @section FT2232C Based USB Dongles
338 There are 2 methods of using the FTD2232, either (1) using the
339 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
340 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
342 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
343 TAR.GZ file. You must unpack them ``some where'' convient. As of this
344 writing (12/26/2008) FTDICHIP does not supply means to install these
345 files ``in an appropriate place'' As a result, there are two
346 ``./configure'' options that help.
348 Below is an example build process:
350 1) Check out the latest version of ``openocd'' from SVN.
352 2) Download & unpack either the Windows or Linux FTD2xx drivers
353 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm}).
356 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
357 /home/duane/libftd2xx0.4.16 => the Linux TAR.GZ file contents.
360 3) Configure with these options:
363 Cygwin FTDICHIP solution:
364 ./configure --prefix=/home/duane/mytools \
365 --enable-ft2232_ftd2xx \
366 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
368 Linux FTDICHIP solution:
369 ./configure --prefix=/home/duane/mytools \
370 --enable-ft2232_ftd2xx \
371 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
373 Cygwin/Linux LIBFTDI solution:
375 1a) For Windows: The Windows port of LIBUSB is in place.
376 1b) For Linux: libusb has been built/installed and is in place.
378 2) And libftdi has been built and installed
379 Note: libftdi - relies upon libusb.
381 ./configure --prefix=/home/duane/mytools \
382 --enable-ft2232_libftdi
386 4) Then just type ``make'', and perhaps ``make install''.
389 @section Miscellaneous Configure Options
393 @option{--disable-option-checking} - Ignore unrecognized @option{--enable} and @option{--with} options.
395 @option{--enable-gccwarnings} - Enable extra gcc warnings during build.
398 @option{--enable-release} - Enable building of an OpenOCD release, generally
399 this is for developers. It simply omits the svn version string when the
400 openocd @option{-v} is executed.
403 @node JTAG Hardware Dongles
404 @chapter JTAG Hardware Dongles
413 Defined: @b{dongle}: A small device that plugins into a computer and serves as
414 an adapter .... [snip]
416 In the OpenOCD case, this generally refers to @b{a small adapater} one
417 attaches to your computer via USB or the Parallel Printer Port. The
418 execption being the Zylin ZY1000 which is a small box you attach via
419 an ethernet cable. The Zylin ZY1000 has the advantage that it does not
420 require any drivers to be installed on the developer PC. It also has
421 a built in web interface. It supports RTCK/RCLK or adaptive clocking
422 and has a built in relay to power cycle targets remotely.
425 @section Choosing a Dongle
427 There are three things you should keep in mind when choosing a dongle.
430 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
431 @item @b{Connection} Printer Ports - Does your computer have one?
432 @item @b{Connection} Is that long printer bit-bang cable practical?
433 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
436 @section Stand alone Systems
438 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
439 dongle, but a standalone box. The ZY1000 has the advantage that it does
440 not require any drivers installed on the developer PC. It also has
441 a built in web interface. It supports RTCK/RCLK or adaptive clocking
442 and has a built in relay to power cycle targets remotely.
444 @section USB FT2232 Based
446 There are many USB JTAG dongles on the market, many of them are based
447 on a chip from ``Future Technology Devices International'' (FTDI)
448 known as the FTDI FT2232.
450 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
452 As of 28/Nov/2008, the following are supported:
456 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
458 @* See: @url{http://www.amontec.com/jtagkey.shtml}
460 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
462 @* See: @url{http://www.signalyzer.com}
463 @item @b{evb_lm3s811}
464 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
465 @item @b{olimex-jtag}
466 @* See: @url{http://www.olimex.com}
468 @* See: @url{http://www.tincantools.com}
469 @item @b{turtelizer2}
470 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
472 @* Link: @url{http://www.hitex.com/index.php?id=383}
474 @* Link @url{http://www.hitex.com/stm32-stick}
475 @item @b{axm0432_jtag}
476 @* Axiom AXM-0432 Link @url{http://www.axman.com}
479 @section USB JLINK based
480 There are several OEM versions of the Segger @b{JLINK} adapter. It is
481 an example of a micro controller based JTAG adapter, it uses an
482 AT91SAM764 internally.
485 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
486 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
487 @item @b{SEGGER JLINK}
488 @* Link: @url{http://www.segger.com/jlink.html}
490 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
493 @section USB RLINK based
494 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
497 @item @b{Raisonance RLink}
498 @* Link: @url{http://www.raisonance.com/products/RLink.php}
499 @item @b{STM32 Primer}
500 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
501 @item @b{STM32 Primer2}
502 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
508 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
510 @item @b{USB - Presto}
511 @* Link: @url{http://tools.asix.net/prg_presto.htm}
513 @item @b{Versaloon-Link}
514 @* Link: @url{http://www.simonqian.com/en/Versaloon}
516 @item @b{ARM-JTAG-EW}
517 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
520 @section IBM PC Parallel Printer Port Based
522 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
523 and the MacGraigor Wiggler. There are many clones and variations of
528 @item @b{Wiggler} - There are many clones of this.
529 @* Link: @url{http://www.macraigor.com/wiggler.htm}
531 @item @b{DLC5} - From XILINX - There are many clones of this
532 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
533 produced, PDF schematics are easily found and it is easy to make.
535 @item @b{Amontec - JTAG Accelerator}
536 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
539 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
542 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
544 @item @b{Wiggler_ntrst_inverted}
545 @* Yet another variation - See the source code, src/jtag/parport.c
547 @item @b{old_amt_wiggler}
548 @* Unknown - probably not on the market today
551 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
554 @* Link: @url{http://www.amontec.com/chameleon.shtml}
560 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
563 @* From ST Microsystems, link:
564 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
565 Title: FlashLINK JTAG programing cable for PSD and uPSD
573 @* An EP93xx based Linux machine using the GPIO pins directly.
576 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
582 @cindex running OpenOCD
584 @cindex --debug_level
588 The @option{--help} option shows:
592 --help | -h display this help
593 --version | -v display OpenOCD version
594 --file | -f use configuration file <name>
595 --search | -s dir to search for config files and scripts
596 --debug | -d set debug level <0-3>
597 --log_output | -l redirect log output to file <name>
598 --command | -c run <command>
599 --pipe | -p use pipes when talking to gdb
602 By default OpenOCD reads the file configuration file ``openocd.cfg''
603 in the current directory. To specify a different (or multiple)
604 configuration file, you can use the ``-f'' option. For example:
607 openocd -f config1.cfg -f config2.cfg -f config3.cfg
610 Once started, OpenOCD runs as a daemon, waiting for connections from
611 clients (Telnet, GDB, Other).
613 If you are having problems, you can enable internal debug messages via
616 Also it is possible to interleave commands w/config scripts using the
617 @option{-c} command line switch.
619 To enable debug output (when reporting problems or working on OpenOCD
620 itself), use the @option{-d} command line switch. This sets the
621 @option{debug_level} to "3", outputting the most information,
622 including debug messages. The default setting is "2", outputting only
623 informational messages, warnings and errors. You can also change this
624 setting from within a telnet or gdb session using @option{debug_level
625 <n>} @xref{debug_level}.
627 You can redirect all output from the daemon to a file using the
628 @option{-l <logfile>} switch.
630 Search paths for config/script files can be added to OpenOCD by using
631 the @option{-s <search>} switch. The current directory and the OpenOCD
632 target library is in the search path by default.
634 For details on the @option{-p} option. @xref{Connecting to GDB}.
636 Note! OpenOCD will launch the GDB & telnet server even if it can not
637 establish a connection with the target. In general, it is possible for
638 the JTAG controller to be unresponsive until the target is set up
639 correctly via e.g. GDB monitor commands in a GDB init script.
641 @node Simple Configuration Files
642 @chapter Simple Configuration Files
643 @cindex configuration
646 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
649 @item A small openocd.cfg file which ``sources'' other configuration files
650 @item A monolithic openocd.cfg file
651 @item Many -f filename options on the command line
652 @item Your Mixed Solution
655 @section Small configuration file method
657 This is the preferred method. It is simple and works well for many
658 people. The developers of OpenOCD would encourage you to use this
659 method. If you create a new configuration please email new
660 configurations to the development list.
662 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
665 source [find interface/signalyzer.cfg]
667 # Change the default telnet port...
671 # GDB can also flash my flash!
672 gdb_memory_map enable
673 gdb_flash_program enable
675 source [find target/sam7x256.cfg]
678 There are many example configuration scripts you can work with. You
679 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
683 @item @b{board} - eval board level configurations
684 @item @b{interface} - specific dongle configurations
685 @item @b{target} - the target chips
686 @item @b{tcl} - helper scripts
687 @item @b{xscale} - things specific to the xscale.
690 Look first in the ``boards'' area, then the ``targets'' area. Often a board
691 configuration is a good example to work from.
693 @section Many -f filename options
694 Some believe this is a wonderful solution, others find it painful.
696 You can use a series of ``-f filename'' options on the command line,
697 OpenOCD will read each filename in sequence, for example:
700 openocd -f file1.cfg -f file2.cfg -f file2.cfg
703 You can also intermix various commands with the ``-c'' command line
706 @section Monolithic file
707 The ``Monolithic File'' dispenses with all ``source'' statements and
708 puts everything in one self contained (monolithic) file. This is not
711 Please try to ``source'' various files or use the multiple -f
714 @section Advice for you
715 Often, one uses a ``mixed approach''. Where possible, please try to
716 ``source'' common things, and if needed cut/paste parts of the
717 standard distribution configuration files as needed.
719 @b{REMEMBER:} The ``important parts'' of your configuration file are:
722 @item @b{Interface} - Defines the dongle
723 @item @b{Taps} - Defines the JTAG Taps
724 @item @b{GDB Targets} - What GDB talks to
725 @item @b{Flash Programing} - Very Helpful
728 Some key things you should look at and understand are:
731 @item The reset configuration of your debug environment as a whole
732 @item Is there a ``work area'' that OpenOCD can use?
733 @* For ARM - work areas mean up to 10x faster downloads.
734 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
735 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
740 @node Config File Guidelines
741 @chapter Config File Guidelines
743 This section/chapter is aimed at developers and integrators of
744 OpenOCD. These are guidelines for creating new boards and new target
745 configurations as of 28/Nov/2008.
747 However, you, the user of OpenOCD, should be somewhat familiar with
748 this section as it should help explain some of the internals of what
749 you might be looking at.
751 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
755 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
757 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
758 contain initialization items that are specific to a board - for
759 example: The SDRAM initialization sequence for the board, or the type
760 of external flash and what address it is found at. Any initialization
761 sequence to enable that external flash or SDRAM should be found in the
762 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
763 a CPU and an FPGA or CPLD.
765 @* Think chip. The ``target'' directory represents a JTAG tap (or
766 chip) OpenOCD should control, not a board. Two common types of targets
767 are ARM chips and FPGA or CPLD chips.
770 @b{If needed...} The user in their ``openocd.cfg'' file or the board
771 file might override a specific feature in any of the above files by
772 setting a variable or two before sourcing the target file. Or adding
773 various commands specific to their situation.
775 @section Interface Config Files
777 The user should be able to source one of these files via a command like this:
780 source [find interface/FOOBAR.cfg]
782 openocd -f interface/FOOBAR.cfg
785 A preconfigured interface file should exist for every interface in use
786 today, that said, perhaps some interfaces have only been used by the
787 sole developer who created it.
789 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
790 tcl_platform(platform), it should be called jim_platform (because it
791 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
792 ``cygwin'' or ``mingw''
794 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
796 @section Board Config Files
798 @b{Note: BOARD directory NEW as of 28/nov/2008}
800 The user should be able to source one of these files via a command like this:
803 source [find board/FOOBAR.cfg]
805 openocd -f board/FOOBAR.cfg
809 The board file should contain one or more @t{source [find
810 target/FOO.cfg]} statements along with any board specific things.
812 In summary the board files should contain (if present)
815 @item External flash configuration (i.e.: the flash on CS0)
816 @item SDRAM configuration (size, speed, etc.
817 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
818 @item Multiple TARGET source statements
819 @item All things that are not ``inside a chip''
820 @item Things inside a chip go in a 'target' file
823 @section Target Config Files
825 The user should be able to source one of these files via a command like this:
828 source [find target/FOOBAR.cfg]
830 openocd -f target/FOOBAR.cfg
833 In summary the target files should contain
838 @item Reset configuration
840 @item CPU/Chip/CPU-Core specific features
844 @subsection Important variable names
846 By default, the end user should never need to set these
847 variables. However, if the user needs to override a setting they only
848 need to set the variable in a simple way.
852 @* This gives a name to the overall chip, and is used as part of the
853 tap identifier dotted name.
855 @* By default little - unless the chip or board is not normally used that way.
857 @* When OpenOCD examines the JTAG chain, it will attempt to identify
858 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
859 to verify the tap id number verses configuration file and may issue an
860 error or warning like this. The hope is that this will help to pinpoint
861 problems in OpenOCD configurations.
864 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
865 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
866 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
867 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
870 @item @b{_TARGETNAME}
871 @* By convention, this variable is created by the target configuration
872 script. The board configuration file may make use of this variable to
873 configure things like a ``reset init'' script, or other things
874 specific to that board and that target.
876 If the chip has 2 targets, use the names @b{_TARGETNAME0},
877 @b{_TARGETNAME1}, ... etc.
879 @b{Remember:} The ``board file'' may include multiple targets.
881 At no time should the name ``target0'' (the default target name if
882 none was specified) be used. The name ``target0'' is a hard coded name
883 - the next target on the board will be some other number.
884 In the same way, avoid using target numbers even when they are
885 permitted; use the right target name(s) for your board.
887 The user (or board file) should reasonably be able to:
890 source [find target/FOO.cfg]
891 $_TARGETNAME configure ... FOO specific parameters
893 source [find target/BAR.cfg]
894 $_TARGETNAME configure ... BAR specific parameters
899 @subsection Tcl Variables Guide Line
900 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
902 Thus the rule we follow in OpenOCD is this: Variables that begin with
903 a leading underscore are temporary in nature, and can be modified and
904 used at will within a ?TARGET? configuration file.
906 @b{EXAMPLE:} The user should be able to do this:
910 # PXA270 #1 network side, big endian
911 # PXA270 #2 video side, little endian
915 source [find target/pxa270.cfg]
916 # variable: _TARGETNAME = network.cpu
917 # other commands can refer to the "network.cpu" tap.
918 $_TARGETNAME configure .... params for this CPU..
922 source [find target/pxa270.cfg]
923 # variable: _TARGETNAME = video.cpu
924 # other commands can refer to the "video.cpu" tap.
925 $_TARGETNAME configure .... params for this CPU..
929 source [find target/spartan3.cfg]
931 # Since $_TARGETNAME is temporal..
932 # these names still work!
933 network.cpu configure ... params
934 video.cpu configure ... params
938 @subsection Default Value Boiler Plate Code
940 All target configuration files should start with this (or a modified form)
944 if @{ [info exists CHIPNAME] @} @{
945 set _CHIPNAME $CHIPNAME
947 set _CHIPNAME sam7x256
950 if @{ [info exists ENDIAN] @} @{
956 if @{ [info exists CPUTAPID ] @} @{
957 set _CPUTAPID $CPUTAPID
959 set _CPUTAPID 0x3f0f0f0f
964 @subsection Creating Taps
965 After the ``defaults'' are choosen [see above] the taps are created.
967 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
971 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
972 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
977 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
980 @item @b{Unform tap names} - See: Tap Naming Convention
981 @item @b{_TARGETNAME} is created at the end where used.
985 if @{ [info exists FLASHTAPID ] @} @{
986 set _FLASHTAPID $FLASHTAPID
988 set _FLASHTAPID 0x25966041
990 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
992 if @{ [info exists CPUTAPID ] @} @{
993 set _CPUTAPID $CPUTAPID
995 set _CPUTAPID 0x25966041
997 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
1000 if @{ [info exists BSTAPID ] @} @{
1001 set _BSTAPID $BSTAPID
1003 set _BSTAPID 0x1457f041
1005 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
1007 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
1010 @b{Tap Naming Convention}
1012 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
1021 @item @b{unknownN} - it happens :-(
1024 @subsection Reset Configuration
1026 Some chips have specific ways the TRST and SRST signals are
1027 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
1028 @b{BOARD SPECIFIC} they go in the board file.
1030 @subsection Work Areas
1032 Work areas are small RAM areas used by OpenOCD to speed up downloads,
1033 and to download small snippets of code to program flash chips.
1035 If the chip includes a form of ``on-chip-ram'' - and many do - define
1036 a reasonable work area and use the ``backup'' option.
1038 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
1039 inaccessible if/when the application code enables or disables the MMU.
1041 @subsection ARM Core Specific Hacks
1043 If the chip has a DCC, enable it. If the chip is an ARM9 with some
1044 special high speed download features - enable it.
1046 If the chip has an ARM ``vector catch'' feature - by default enable
1047 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
1048 user is really writing a handler for those situations - they can
1049 easily disable it. Experiance has shown the ``vector catch'' is
1050 helpful - for common programing errors.
1052 If present, the MMU, the MPU and the CACHE should be disabled.
1054 Some ARM cores are equipped with trace support, which permits
1055 examination of the instruction and data bus activity. Trace
1056 activity is controlled through an ``Embedded Trace Module'' (ETM)
1057 on one of the core's scan chains. The ETM emits voluminous data
1058 through a ``trace port''. The trace port is accessed in one
1059 of two ways. When its signals are pinned out from the chip,
1060 boards may provide a special high speed debugging connector;
1061 software support for this is not configured by default, use
1062 the ``--enable-oocd_trace'' option. Alternatively, trace data
1063 may be stored an on-chip SRAM which is packaged as an ``Embedded
1064 Trace Buffer'' (ETB). An ETB has its own TAP, usually right after
1065 its associated ARM core. OpenOCD supports the ETM, and your
1066 target configuration should set it up with the relevant trace
1067 port: ``etb'' for chips which use that, else the board-specific
1068 option will be either ``oocd_trace'' or ``dummy''.
1071 etm config $_TARGETNAME 16 normal full etb
1072 etb config $_TARGETNAME $_CHIPNAME.etb
1075 @subsection Internal Flash Configuration
1077 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
1079 @b{Never ever} in the ``target configuration file'' define any type of
1080 flash that is external to the chip. (For example the BOOT flash on
1081 Chip Select 0). The BOOT flash information goes in a board file - not
1082 the TARGET (chip) file.
1086 @item at91sam7x256 - has 256K flash YES enable it.
1087 @item str912 - has flash internal YES enable it.
1088 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1089 @item pxa270 - again - CS0 flash - it goes in the board file.
1093 @chapter About JIM-Tcl
1097 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1098 learn more about JIM here: @url{http://jim.berlios.de}
1101 @item @b{JIM vs. Tcl}
1102 @* JIM-TCL is a stripped down version of the well known Tcl language,
1103 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1104 fewer features. JIM-Tcl is a single .C file and a single .H file and
1105 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1106 4.2 MB .zip file containing 1540 files.
1108 @item @b{Missing Features}
1109 @* Our practice has been: Add/clone the real Tcl feature if/when
1110 needed. We welcome JIM Tcl improvements, not bloat.
1113 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1114 command interpreter today (28/nov/2008) is a mixture of (newer)
1115 JIM-Tcl commands, and (older) the orginal command interpreter.
1118 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1119 can type a Tcl for() loop, set variables, etc.
1121 @item @b{Historical Note}
1122 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1124 @item @b{Need a crash course in Tcl?}
1125 @* See: @xref{Tcl Crash Course}.
1129 @node Daemon Configuration
1130 @chapter Daemon Configuration
1131 The commands here are commonly found in the openocd.cfg file and are
1132 used to specify what TCP/IP ports are used, and how GDB should be
1136 This command terminates the configuration stage and
1137 enters the normal command mode. This can be useful to add commands to
1138 the startup scripts and commands such as resetting the target,
1139 programming flash, etc. To reset the CPU upon startup, add "init" and
1140 "reset" at the end of the config script or at the end of the OpenOCD
1141 command line using the @option{-c} command line switch.
1143 If this command does not appear in any startup/configuration file
1144 OpenOCD executes the command for you after processing all
1145 configuration files and/or command line options.
1147 @b{NOTE:} This command normally occurs at or near the end of your
1148 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1149 targets ready. For example: If your openocd.cfg file needs to
1150 read/write memory on your target - the init command must occur before
1151 the memory read/write commands.
1153 @section TCP/IP Ports
1155 @item @b{telnet_port} <@var{number}>
1157 @*Intended for a human. Port on which to listen for incoming telnet connections.
1159 @item @b{tcl_port} <@var{number}>
1161 @*Intended as a machine interface. Port on which to listen for
1162 incoming Tcl syntax. This port is intended as a simplified RPC
1163 connection that can be used by clients to issue commands and get the
1164 output from the Tcl engine.
1166 @item @b{gdb_port} <@var{number}>
1168 @*First port on which to listen for incoming GDB connections. The GDB port for the
1169 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1174 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1175 @cindex gdb_breakpoint_override
1176 @anchor{gdb_breakpoint_override}
1177 @*Force breakpoint type for gdb 'break' commands.
1178 The raison d'etre for this option is to support GDB GUI's without
1179 a hard/soft breakpoint concept where the default OpenOCD and
1180 GDB behaviour is not sufficient. Note that GDB will use hardware
1181 breakpoints if the memory map has been set up for flash regions.
1183 This option replaces older arm7_9 target commands that addressed
1186 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1188 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1189 Default behaviour is <@var{resume}>
1191 @item @b{gdb_memory_map} <@var{enable|disable}>
1192 @cindex gdb_memory_map
1193 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1194 requested. GDB will then know when to set hardware breakpoints, and program flash
1195 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1196 for flash programming to work.
1197 Default behaviour is <@var{enable}>
1198 @xref{gdb_flash_program}.
1200 @item @b{gdb_flash_program} <@var{enable|disable}>
1201 @cindex gdb_flash_program
1202 @anchor{gdb_flash_program}
1203 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1204 vFlash packet is received.
1205 Default behaviour is <@var{enable}>
1206 @comment END GDB Items
1209 @node Interface - Dongle Configuration
1210 @chapter Interface - Dongle Configuration
1211 Interface commands are normally found in an interface configuration
1212 file which is sourced by your openocd.cfg file. These commands tell
1213 OpenOCD what type of JTAG dongle you have and how to talk to it.
1214 @section Simple Complete Interface Examples
1215 @b{A Turtelizer FT2232 Based JTAG Dongle}
1219 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1220 ft2232_layout turtelizer2
1221 ft2232_vid_pid 0x0403 0xbdc8
1228 @b{A Raisonance RLink}
1237 parport_cable wiggler
1242 interface arm-jtag-ew
1244 @section Interface Command
1246 The interface command tells OpenOCD what type of JTAG dongle you are
1247 using. Depending on the type of dongle, you may need to have one or
1248 more additional commands.
1252 @item @b{interface} <@var{name}>
1254 @*Use the interface driver <@var{name}> to connect to the
1255 target. Currently supported interfaces are
1260 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1262 @item @b{amt_jtagaccel}
1263 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1267 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1268 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1269 platform. The libftdi uses libusb, and should be portable to all systems that provide
1273 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1276 @* ASIX PRESTO USB JTAG programmer.
1279 @* usbprog is a freely programmable USB adapter.
1282 @* Gateworks GW16012 JTAG programmer.
1285 @* Segger jlink USB adapter
1288 @* Raisonance RLink USB adapter
1291 @* vsllink is part of Versaloon which is a versatile USB programmer.
1293 @item @b{arm-jtag-ew}
1294 @* Olimex ARM-JTAG-EW USB adapter
1295 @comment - End parameters
1297 @comment - End Interface
1299 @subsection parport options
1302 @item @b{parport_port} <@var{number}>
1303 @cindex parport_port
1304 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1305 the @file{/dev/parport} device
1307 When using PPDEV to access the parallel port, use the number of the parallel port:
1308 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1309 you may encounter a problem.
1310 @item @b{parport_cable} <@var{name}>
1311 @cindex parport_cable
1312 @*The layout of the parallel port cable used to connect to the target.
1313 Currently supported cables are
1317 The original Wiggler layout, also supported by several clones, such
1318 as the Olimex ARM-JTAG
1321 Same as original wiggler except an led is fitted on D5.
1322 @item @b{wiggler_ntrst_inverted}
1323 @cindex wiggler_ntrst_inverted
1324 Same as original wiggler except TRST is inverted.
1325 @item @b{old_amt_wiggler}
1326 @cindex old_amt_wiggler
1327 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1328 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1331 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1332 program the Chameleon itself, not a connected target.
1335 The Xilinx Parallel cable III.
1338 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1339 This is also the layout used by the HollyGates design
1340 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1343 The ST Parallel cable.
1346 Same as original wiggler except SRST and TRST connections reversed and
1347 TRST is also inverted.
1350 Altium Universal JTAG cable.
1352 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1353 @cindex parport_write_on_exit
1354 @*This will configure the parallel driver to write a known value to the parallel
1355 interface on exiting OpenOCD
1358 @subsection amt_jtagaccel options
1360 @item @b{parport_port} <@var{number}>
1361 @cindex parport_port
1362 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1363 @file{/dev/parport} device
1365 @subsection ft2232 options
1368 @item @b{ft2232_device_desc} <@var{description}>
1369 @cindex ft2232_device_desc
1370 @*The USB device description of the FTDI FT2232 device. If not
1371 specified, the FTDI default value is used. This setting is only valid
1372 if compiled with FTD2XX support.
1374 @b{TODO:} Confirm the following: On Windows the name needs to end with
1375 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1376 this be added and when must it not be added? Why can't the code in the
1377 interface or in OpenOCD automatically add this if needed? -- Duane.
1379 @item @b{ft2232_serial} <@var{serial-number}>
1380 @cindex ft2232_serial
1381 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1383 @item @b{ft2232_layout} <@var{name}>
1384 @cindex ft2232_layout
1385 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1386 signals. Valid layouts are
1389 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1391 Amontec JTAGkey and JTAGkey-Tiny
1392 @item @b{signalyzer}
1394 @item @b{olimex-jtag}
1397 American Microsystems M5960
1398 @item @b{evb_lm3s811}
1399 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1400 SRST signals on external connector
1403 @item @b{stm32stick}
1404 Hitex STM32 Performance Stick
1405 @item @b{flyswatter}
1406 Tin Can Tools Flyswatter
1407 @item @b{turtelizer2}
1408 egnite Software turtelizer2
1411 @item @b{axm0432_jtag}
1415 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1416 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1417 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1419 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1421 @item @b{ft2232_latency} <@var{ms}>
1422 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1423 ft2232_read() fails to return the expected number of bytes. This can be caused by
1424 USB communication delays and has proved hard to reproduce and debug. Setting the
1425 FT2232 latency timer to a larger value increases delays for short USB packets but it
1426 also reduces the risk of timeouts before receiving the expected number of bytes.
1427 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1430 @subsection ep93xx options
1431 @cindex ep93xx options
1432 Currently, there are no options available for the ep93xx interface.
1436 @item @b{jtag_khz} <@var{reset speed kHz}>
1439 It is debatable if this command belongs here - or in a board
1440 configuration file. In fact, in some situations the JTAG speed is
1441 changed during the target initialisation process (i.e.: (1) slow at
1442 reset, (2) program the CPU clocks, (3) run fast)
1444 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1446 Not all interfaces support ``rtck''. If the interface device can not
1447 support the rate asked for, or can not translate from kHz to
1448 jtag_speed, then an error is returned.
1450 Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
1451 especially true for synthesized cores (-S). Also see RTCK.
1453 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1454 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1455 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1456 the specified frequency.
1459 # Fall back to 3mhz if RCLK is not supported
1463 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1465 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1466 speed. The actual effect of this option depends on the JTAG interface used.
1468 The speed used during reset can be adjusted using setting jtag_speed during
1469 pre_reset and post_reset events.
1472 @item wiggler: maximum speed / @var{number}
1473 @item ft2232: 6MHz / (@var{number}+1)
1474 @item amt jtagaccel: 8 / 2**@var{number}
1475 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1476 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1477 @comment end speed list.
1480 @comment END command list
1483 @node Reset Configuration
1484 @chapter Reset Configuration
1485 @cindex Reset Configuration
1487 Every system configuration may require a different reset
1488 configuration. This can also be quite confusing. Please see the
1489 various board files for example.
1491 @section jtag_nsrst_delay <@var{ms}>
1492 @cindex jtag_nsrst_delay
1493 @*How long (in milliseconds) OpenOCD should wait after deasserting
1494 nSRST before starting new JTAG operations.
1496 @section jtag_ntrst_delay <@var{ms}>
1497 @cindex jtag_ntrst_delay
1498 @*Same @b{jtag_nsrst_delay}, but for nTRST
1500 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1501 big resistor/capacitor, reset supervisor, or on-chip features). This
1502 keeps the signal asserted for some time after the external reset got
1505 @section reset_config
1507 @b{Note:} To maintainers and integrators: Where exactly the
1508 ``reset configuration'' goes is a good question. It touches several
1509 things at once. In the end, if you have a board file - the board file
1510 should define it and assume 100% that the DONGLE supports
1511 anything. However, that does not mean the target should not also make
1512 not of something the silicon vendor has done inside the
1513 chip. @i{Grr.... nothing is every pretty.}
1517 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1518 @item Every board is also slightly different; some boards tie TRST and SRST together.
1519 @item Every chip is slightly different; some chips internally tie the two signals together.
1520 @item Some may not implement all of the signals the same way.
1521 @item Some signals might be push-pull, others open-drain/collector.
1523 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1524 reset the TAP via TRST and send commands through the JTAG tap to halt
1525 the CPU at the reset vector before the 1st instruction is executed,
1526 and finally release the SRST signal.
1527 @*Depending on your board vendor, chip vendor, etc., these
1528 signals may have slightly different names.
1530 OpenOCD defines these signals in these terms:
1532 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1533 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1539 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1540 @cindex reset_config
1541 @* The @t{reset_config} command tells OpenOCD the reset configuration
1542 of your combination of Dongle, Board, and Chips.
1543 If the JTAG interface provides SRST, but the target doesn't connect
1544 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1545 be @option{none}, @option{trst_only}, @option{srst_only} or
1546 @option{trst_and_srst}.
1548 [@var{combination}] is an optional value specifying broken reset
1549 signal implementations. @option{srst_pulls_trst} states that the
1550 test logic is reset together with the reset of the system (e.g. Philips
1551 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1552 the system is reset together with the test logic (only hypothetical, I
1553 haven't seen hardware with such a bug, and can be worked around).
1554 @option{combined} implies both @option{srst_pulls_trst} and
1555 @option{trst_pulls_srst}. The default behaviour if no option given is
1558 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1559 driver type of the reset lines to be specified. Possible values are
1560 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1561 test reset signal, and @option{srst_open_drain} (default) and
1562 @option{srst_push_pull} for the system reset. These values only affect
1563 JTAG interfaces with support for different drivers, like the Amontec
1564 JTAGkey and JTAGAccelerator.
1566 @comment - end command
1572 @chapter Tap Creation
1573 @cindex tap creation
1574 @cindex tap configuration
1576 In order for OpenOCD to control a target, a JTAG tap must be
1579 Commands to create taps are normally found in a configuration file and
1580 are not normally typed by a human.
1582 When a tap is created a @b{dotted.name} is created for the tap. Other
1583 commands use that dotted.name to manipulate or refer to the tap.
1587 @item @b{Debug Target} A tap can be used by a GDB debug target
1588 @item @b{Flash Programing} Some chips program the flash via JTAG
1589 @item @b{Boundry Scan} Some chips support boundary scan.
1593 @section jtag newtap
1594 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1599 @cindex tap geometry
1601 @comment START options
1604 @* is a symbolic name of the chip.
1606 @* is a symbol name of a tap present on the chip.
1607 @item @b{Required configparams}
1608 @* Every tap has 3 required configparams, and several ``optional
1609 parameters'', the required parameters are:
1610 @comment START REQUIRED
1612 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1613 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1614 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1615 some devices, there are bits in the IR that aren't used. This lets you mask
1616 them off when doing comparisons. In general, this should just be all ones for
1618 @comment END REQUIRED
1620 An example of a FOOBAR Tap
1622 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1624 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1625 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1626 [6,4,2,0] are checked.
1628 @item @b{Optional configparams}
1629 @comment START Optional
1631 @item @b{-expected-id NUMBER}
1632 @* By default it is zero. If non-zero represents the
1633 expected tap ID used when the JTAG chain is examined. Repeat
1634 the option as many times as required if multiple id's can be
1635 expected. See below.
1638 @* By default not specified the tap is enabled. Some chips have a
1639 JTAG route controller (JRC) that is used to enable and/or disable
1640 specific JTAG taps. You can later enable or disable any JTAG tap via
1641 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1643 @comment END Optional
1646 @comment END OPTIONS
1649 @comment START NOTES
1651 @item @b{Technically}
1652 @* newtap is a sub command of the ``jtag'' command
1653 @item @b{Big Picture Background}
1654 @*GDB Talks to OpenOCD using the GDB protocol via
1655 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1656 control the JTAG chain on your board. Your board has one or more chips
1657 in a @i{daisy chain configuration}. Each chip may have one or more
1658 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1659 @item @b{NAME Rules}
1660 @*Names follow ``C'' symbol name rules (start with alpha ...)
1661 @item @b{TAPNAME - Conventions}
1663 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1664 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1665 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1666 @item @b{bs} - for boundary scan if this is a seperate tap.
1667 @item @b{etb} - for an embedded trace buffer (example: an ARM ETB11)
1668 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1669 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1670 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1671 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1673 @item @b{DOTTED.NAME}
1674 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1675 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1676 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1677 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1678 numerous other places to refer to various taps.
1680 @* The order this command appears via the config files is
1682 @item @b{Multi Tap Example}
1683 @* This example is based on the ST Microsystems STR912. See the ST
1684 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1685 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1687 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1688 @*@b{checked: 28/nov/2008}
1690 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1691 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1692 tap which then connects to the TDI pin.
1696 # create tap: 'str912.flash'
1697 jtag newtap str912 flash ... params ...
1698 # create tap: 'str912.cpu'
1699 jtag newtap str912 cpu ... params ...
1700 # create tap: 'str912.bs'
1701 jtag newtap str912 bs ... params ...
1704 @item @b{Note: Deprecated} - Index Numbers
1705 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1706 feature is still present, however its use is highly discouraged and
1707 should not be counted upon. Update all of your scripts to use
1708 TAP names rather than numbers.
1709 @item @b{Multiple chips}
1710 @* If your board has multiple chips, you should be
1711 able to @b{source} two configuration files, in the proper order, and
1712 have the taps created in the proper order.
1715 @comment at command level
1716 @comment DOCUMENT old command
1717 @section jtag_device - REMOVED
1719 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1723 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1724 by the ``jtag newtap'' command. The documentation remains here so that
1725 one can easily convert the old syntax to the new syntax. About the old
1726 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1727 ``irmask''. The new syntax requires named prefixes, and supports
1728 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1729 @b{jtag newtap} command for details.
1731 OLD: jtag_device 8 0x01 0xe3 0xfe
1732 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1735 @section Enable/Disable Taps
1736 @b{Note:} These commands are intended to be used as a machine/script
1737 interface. Humans might find the ``scan_chain'' command more helpful
1738 when querying the state of the JTAG taps.
1740 @b{By default, all taps are enabled}
1743 @item @b{jtag tapenable} @var{DOTTED.NAME}
1744 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1745 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1750 @cindex route controller
1752 These commands are used when your target has a JTAG route controller
1753 that effectively adds or removes a tap from the JTAG chain in a
1756 The ``standard way'' to remove a tap would be to place the tap in
1757 bypass mode. But with the advent of modern chips, this is not always a
1758 good solution. Some taps operate slowly, others operate fast, and
1759 there are other JTAG clock synchronisation problems one must face. To
1760 solve that problem, the JTAG route controller was introduced. Rather
1761 than ``bypass'' the tap, the tap is completely removed from the
1762 circuit and skipped.
1765 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1768 @item @b{Enabled - Not In ByPass} and has a variable bit length
1769 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1770 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1773 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1774 @b{Historical note:} this feature was added 28/nov/2008
1776 @b{jtag tapisenabled DOTTED.NAME}
1778 This command returns 1 if the named tap is currently enabled, 0 if not.
1779 This command exists so that scripts that manipulate a JRC (like the
1780 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1781 enabled or disabled.
1784 @node Target Configuration
1785 @chapter Target Configuration
1787 This chapter discusses how to create a GDB debug target. Before
1788 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1790 @section targets [NAME]
1791 @b{Note:} This command name is PLURAL - not singular.
1793 With NO parameter, this plural @b{targets} command lists all known
1794 targets in a human friendly form.
1796 With a parameter, this plural @b{targets} command sets the current
1797 target to the given name. (i.e.: If there are multiple debug targets)
1802 CmdName Type Endian ChainPos State
1803 -- ---------- ---------- ---------- -------- ----------
1804 0: target0 arm7tdmi little 0 halted
1807 @section target COMMANDS
1808 @b{Note:} This command name is SINGULAR - not plural. It is used to
1809 manipulate specific targets, to create targets and other things.
1811 Once a target is created, a TARGETNAME (object) command is created;
1812 see below for details.
1814 The TARGET command accepts these sub-commands:
1816 @item @b{create} .. parameters ..
1817 @* creates a new target, see below for details.
1819 @* Lists all supported target types (perhaps some are not yet in this document).
1821 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1823 foreach t [target names] {
1824 puts [format "Target: %s\n" $t]
1828 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1829 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1830 @item @b{number} @b{NUMBER}
1831 @* Internally OpenOCD maintains a list of targets - in numerical index
1832 (0..N-1) this command returns the name of the target at index N.
1835 set thename [target number $x]
1836 puts [format "Target %d is: %s\n" $x $thename]
1839 @* Returns the number of targets known to OpenOCD (see number above)
1842 set c [target count]
1843 for { set x 0 } { $x < $c } { incr x } {
1844 # Assuming you have created this function
1845 print_target_details $x
1851 @section TARGETNAME (object) commands
1852 @b{Use:} Once a target is created, an ``object name'' that represents the
1853 target is created. By convention, the target name is identical to the
1854 tap name. In a multiple target system, one can preceed many common
1855 commands with a specific target name and effect only that target.
1857 str912.cpu mww 0x1234 0x42
1858 omap3530.cpu mww 0x5555 123
1861 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1862 good example is a on screen button, once a button is created a button
1863 has a name (a path in Tk terms) and that name is useable as a 1st
1864 class command. For example in Tk, one can create a button and later
1865 configure it like this:
1869 button .foobar -background red -command @{ foo @}
1871 .foobar configure -foreground blue
1873 set x [.foobar cget -background]
1875 puts [format "The button is %s" $x]
1878 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1879 button. Commands available as a ``target object'' are:
1881 @comment START targetobj commands.
1883 @item @b{configure} - configure the target; see Target Config/Cget Options below
1884 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1885 @item @b{curstate} - current target state (running, halt, etc.
1887 @* Intended for a human to see/read the currently configure target events.
1888 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1889 @comment start memory
1899 @item @b{Memory To Array, Array To Memory}
1900 @* These are aimed at a machine interface to memory
1902 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1903 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1905 @* @b{ARRAYNAME} is the name of an array variable
1906 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1907 @* @b{ADDRESS} is the target memory address
1908 @* @b{COUNT} is the number of elements to process
1910 @item @b{Used during ``reset''}
1911 @* These commands are used internally by the OpenOCD scripts to deal
1912 with odd reset situations and are not documented here.
1914 @item @b{arp_examine}
1918 @item @b{arp_waitstate}
1920 @item @b{invoke-event} @b{EVENT-NAME}
1921 @* Invokes the specific event manually for the target
1924 @section Target Events
1925 At various times, certain things can happen, or you want them to happen.
1929 @item What should happen when GDB connects? Should your target reset?
1930 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1931 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1934 All of the above items are handled by target events.
1936 To specify an event action, either during target creation, or later
1937 via ``$_TARGETNAME configure'' see this example.
1939 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1940 target event name, and BODY is a Tcl procedure or string of commands
1943 The programmers model is the ``-command'' option used in Tcl/Tk
1944 buttons and events. Below are two identical examples, the first
1945 creates and invokes small procedure. The second inlines the procedure.
1948 proc my_attach_proc @{ @} @{
1952 mychip.cpu configure -event gdb-attach my_attach_proc
1953 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1956 @section Current Events
1957 The following events are available:
1959 @item @b{debug-halted}
1960 @* The target has halted for debug reasons (i.e.: breakpoint)
1961 @item @b{debug-resumed}
1962 @* The target has resumed (i.e.: gdb said run)
1963 @item @b{early-halted}
1964 @* Occurs early in the halt process
1965 @item @b{examine-end}
1966 @* Currently not used (goal: when JTAG examine completes)
1967 @item @b{examine-start}
1968 @* Currently not used (goal: when JTAG examine starts)
1969 @item @b{gdb-attach}
1970 @* When GDB connects
1971 @item @b{gdb-detach}
1972 @* When GDB disconnects
1974 @* When the taret has halted and GDB is not doing anything (see early halt)
1975 @item @b{gdb-flash-erase-start}
1976 @* Before the GDB flash process tries to erase the flash
1977 @item @b{gdb-flash-erase-end}
1978 @* After the GDB flash process has finished erasing the flash
1979 @item @b{gdb-flash-write-start}
1980 @* Before GDB writes to the flash
1981 @item @b{gdb-flash-write-end}
1982 @* After GDB writes to the flash
1984 @* Before the taret steps, gdb is trying to start/resume the target
1986 @* The target has halted
1987 @item @b{old-gdb_program_config}
1988 @* DO NOT USE THIS: Used internally
1989 @item @b{old-pre_resume}
1990 @* DO NOT USE THIS: Used internally
1991 @item @b{reset-assert-pre}
1992 @* Before reset is asserted on the tap.
1993 @item @b{reset-assert-post}
1994 @* Reset is now asserted on the tap.
1995 @item @b{reset-deassert-pre}
1996 @* Reset is about to be released on the tap
1997 @item @b{reset-deassert-post}
1998 @* Reset has been released on the tap
2000 @* Currently not used.
2001 @item @b{reset-halt-post}
2002 @* Currently not usd
2003 @item @b{reset-halt-pre}
2004 @* Currently not used
2005 @item @b{reset-init}
2006 @* Currently not used
2007 @item @b{reset-start}
2008 @* Currently not used
2009 @item @b{reset-wait-pos}
2010 @* Currently not used
2011 @item @b{reset-wait-pre}
2012 @* Currently not used
2013 @item @b{resume-start}
2014 @* Before any target is resumed
2015 @item @b{resume-end}
2016 @* After all targets have resumed
2020 @* Target has resumed
2021 @item @b{tap-enable}
2022 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
2024 jtag configure DOTTED.NAME -event tap-enable @{
2029 @item @b{tap-disable}
2030 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
2032 jtag configure DOTTED.NAME -event tap-disable @{
2033 puts "Disabling CPU"
2039 @section target create
2041 @cindex target creation
2044 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
2046 @*This command creates a GDB debug target that refers to a specific JTAG tap.
2047 @comment START params
2050 @* Is the name of the debug target. By convention it should be the tap
2051 DOTTED.NAME. This name is also used to create the target object
2052 command, and in other places the target needs to be identified.
2054 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
2055 @comment START types
2072 @*PARAMs are various target configuration parameters. The following ones are mandatory:
2073 @comment START mandatory
2075 @item @b{-endian big|little}
2076 @item @b{-chain-position DOTTED.NAME}
2077 @comment end MANDATORY
2082 @section Target Config/Cget Options
2083 These options can be specified when the target is created, or later
2084 via the configure option or to query the target via cget.
2086 You should specify a working area if you can; typically it uses some
2087 on-chip SRAM. Such a working area can speed up many things, including bulk
2088 writes to target memory; flash operations like checking to see if memory needs
2089 to be erased; GDB memory checksumming; and may help perform otherwise
2090 unavailable operations (like some coprocessor operations on ARM7/9 systems).
2092 @item @b{-type} - returns the target type
2093 @item @b{-event NAME BODY} see Target events
2094 @item @b{-work-area-virt [ADDRESS]} specify/set the work area base address
2095 which will be used when an MMU is active.
2096 @item @b{-work-area-phys [ADDRESS]} specify/set the work area base address
2097 which will be used when an MMU is inactive.
2098 @item @b{-work-area-size [ADDRESS]} specify/set the work area
2099 @item @b{-work-area-backup [0|1]} does the work area get backed up;
2100 by default, it doesn't. When possible, use a working_area that doesn't
2101 need to be backed up, since performing a backup slows down operations.
2102 @item @b{-endian [big|little]}
2103 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2104 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2108 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2109 set name [target number $x]
2110 set y [$name cget -endian]
2111 set z [$name cget -type]
2112 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2116 @section Target Variants
2119 @* Unknown (please write me)
2121 @* Unknown (please write me) (similar to arm7tdmi)
2123 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2124 This enables the hardware single-stepping support found on these
2129 @* None (this is also used as the ARM946)
2131 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2132 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2133 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2134 be detected and the normal reset behaviour used.
2136 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2138 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2140 @* Use variant @option{ejtag_srst} when debugging targets that do not
2141 provide a functional SRST line on the EJTAG connector. This causes
2142 OpenOCD to instead use an EJTAG software reset command to reset the
2143 processor. You still need to enable @option{srst} on the reset
2144 configuration command to enable OpenOCD hardware reset functionality.
2145 @comment END variants
2147 @section working_area - Command Removed
2148 @cindex working_area
2149 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2150 @* This documentation remains because there are existing scripts that
2151 still use this that need to be converted.
2153 working_area target# address size backup| [virtualaddress]
2155 @* The target# is a the 0 based target numerical index.
2157 @node Flash Configuration
2158 @chapter Flash programming
2159 @cindex Flash Configuration
2161 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2162 flash that a micro may boot from. Perhaps you, the reader, would like to
2163 contribute support for this.
2167 @item Configure via the command @b{flash bank}
2168 @* Normally this is done in a configuration file.
2169 @item Operate on the flash via @b{flash SOMECOMMAND}
2170 @* Often commands to manipulate the flash are typed by a human, or run
2171 via a script in some automated way. For example: To program the boot
2172 flash on your board.
2174 @* Flashing via GDB requires the flash be configured via ``flash
2175 bank'', and the GDB flash features be enabled. See the daemon
2176 configuration section for more details.
2179 @section Flash commands
2180 @cindex Flash commands
2181 @subsection flash banks
2184 @*List configured flash banks
2185 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2186 @subsection flash info
2187 @b{flash info} <@var{num}>
2189 @*Print info about flash bank <@option{num}>
2190 @subsection flash probe
2191 @b{flash probe} <@var{num}>
2193 @*Identify the flash, or validate the parameters of the configured flash. Operation
2194 depends on the flash type.
2195 @subsection flash erase_check
2196 @b{flash erase_check} <@var{num}>
2197 @cindex flash erase_check
2198 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2199 updates the erase state information displayed by @option{flash info}. That means you have
2200 to issue an @option{erase_check} command after erasing or programming the device to get
2201 updated information.
2202 @subsection flash protect_check
2203 @b{flash protect_check} <@var{num}>
2204 @cindex flash protect_check
2205 @*Check protection state of sectors in flash bank <num>.
2206 @option{flash erase_sector} using the same syntax.
2207 @subsection flash erase_sector
2208 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2209 @cindex flash erase_sector
2210 @anchor{flash erase_sector}
2211 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2212 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2213 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2215 @subsection flash erase_address
2216 @b{flash erase_address} <@var{address}> <@var{length}>
2217 @cindex flash erase_address
2218 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2219 @subsection flash write_bank
2220 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2221 @cindex flash write_bank
2222 @anchor{flash write_bank}
2223 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2224 <@option{offset}> bytes from the beginning of the bank.
2225 @subsection flash write_image
2226 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2227 @cindex flash write_image
2228 @anchor{flash write_image}
2229 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2230 [@var{offset}] can be specified and the file [@var{type}] can be specified
2231 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2232 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2233 if the @option{erase} parameter is given.
2234 @subsection flash protect
2235 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2236 @cindex flash protect
2237 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2238 <@var{last}> of @option{flash bank} <@var{num}>.
2240 @subsection mFlash commands
2241 @cindex mFlash commands
2243 @item @b{mflash probe}
2244 @cindex mflash probe
2246 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2247 @cindex mflash write
2248 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2249 <@var{offset}> bytes from the beginning of the bank.
2250 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2252 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2256 @section flash bank command
2257 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2260 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2261 <@var{bus_width}> <@var{target}> [@var{driver_options ...}]
2264 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2265 and <@var{bus_width}> bytes using the selected flash <driver>.
2267 @subsection External Flash - cfi options
2269 CFI flashes are external flash chips - often they are connected to a
2270 specific chip select on the CPU. By default, at hard reset, most
2271 CPUs have the ablity to ``boot'' from some flash chip - typically
2272 attached to the CPU's CS0 pin.
2274 For other chip selects: OpenOCD does not know how to configure, or
2275 access a specific chip select. Instead you, the human, might need to
2276 configure additional chip selects via other commands (like: mww) , or
2277 perhaps configure a GPIO pin that controls the ``write protect'' pin
2280 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2281 <@var{target}> [@var{jedec_probe}|@var{x16_as_x8}]
2282 @*CFI flashes require the name or number of the target they're connected to
2284 argument. The CFI driver makes use of a working area (specified for the target)
2285 to significantly speed up operation.
2287 @var{chip_width} and @var{bus_width} are specified in bytes.
2289 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2293 @subsection Internal Flash (Microcontrollers)
2294 @subsubsection lpc2000 options
2295 @cindex lpc2000 options
2297 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target}> <@var{variant}>
2298 <@var{clock}> [@var{calc_checksum}]
2299 @*LPC flashes don't require the chip and bus width to be specified. Additional
2300 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2301 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx),
2302 the name or number of the target this flash belongs to (first is 0),
2303 the frequency at which the core
2304 is currently running (in kHz - must be an integral number), and the optional keyword
2305 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2309 @subsubsection at91sam7 options
2310 @cindex at91sam7 options
2312 @b{flash bank at91sam7} 0 0 0 0 <@var{target}>
2313 @*AT91SAM7 flashes only require the @var{target}, all other values are looked up after
2314 reading the chip-id and type.
2316 @subsubsection str7 options
2317 @cindex str7 options
2319 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target}> <@var{variant}>
2320 @*variant can be either STR71x, STR73x or STR75x.
2322 @subsubsection str9 options
2323 @cindex str9 options
2325 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target}>
2326 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2328 str9x flash_config 0 4 2 0 0x80000
2330 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2332 @subsubsection str9 options (str9xpec driver)
2334 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target}>
2335 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2336 @option{enable_turbo} <@var{num>.}
2338 Only use this driver for locking/unlocking the device or configuring the option bytes.
2339 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2341 @subsubsection Stellaris (LM3Sxxx) options
2342 @cindex Stellaris (LM3Sxxx) options
2344 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target}>
2345 @*Stellaris flash plugin only require the @var{target}.
2347 @subsubsection stm32x options
2348 @cindex stm32x options
2350 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target}>
2351 @*stm32x flash plugin only require the @var{target}.
2353 @subsubsection aduc702x options
2354 @cindex aduc702x options
2356 @b{flash bank aduc702x} 0 0 0 0 <@var{target}>
2357 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target} argument (all devices in this family have the same memory layout).
2359 @subsection mFlash Configuration
2360 @cindex mFlash Configuration
2361 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2362 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target}>
2364 @*Configures a mflash for <@var{soc}> host bank at
2365 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2366 order. Pin number format is dependent on host GPIO calling convention.
2367 If WP or DPD pin was not used, write -1. Currently, mflash bank
2368 support s3c2440 and pxa270.
2370 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2372 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2374 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2376 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2379 @section Microcontroller specific Flash Commands
2381 @subsection AT91SAM7 specific commands
2382 @cindex AT91SAM7 specific commands
2383 The flash configuration is deduced from the chip identification register. The flash
2384 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2385 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2386 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2387 that can be erased separatly. Only an EraseAll command is supported by the controller
2388 for each flash plane and this is called with
2390 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2391 @*bulk erase flash planes first_plane to last_plane.
2392 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2393 @cindex at91sam7 gpnvm
2394 @*set or clear a gpnvm bit for the processor
2397 @subsection STR9 specific commands
2398 @cindex STR9 specific commands
2399 @anchor{STR9 specific commands}
2400 These are flash specific commands when using the str9xpec driver.
2402 @item @b{str9xpec enable_turbo} <@var{num}>
2403 @cindex str9xpec enable_turbo
2404 @*enable turbo mode, will simply remove the str9 from the chain and talk
2405 directly to the embedded flash controller.
2406 @item @b{str9xpec disable_turbo} <@var{num}>
2407 @cindex str9xpec disable_turbo
2408 @*restore the str9 into JTAG chain.
2409 @item @b{str9xpec lock} <@var{num}>
2410 @cindex str9xpec lock
2411 @*lock str9 device. The str9 will only respond to an unlock command that will
2413 @item @b{str9xpec unlock} <@var{num}>
2414 @cindex str9xpec unlock
2415 @*unlock str9 device.
2416 @item @b{str9xpec options_read} <@var{num}>
2417 @cindex str9xpec options_read
2418 @*read str9 option bytes.
2419 @item @b{str9xpec options_write} <@var{num}>
2420 @cindex str9xpec options_write
2421 @*write str9 option bytes.
2424 Note: Before using the str9xpec driver here is some background info to help
2425 you better understand how the drivers works. OpenOCD has two flash drivers for
2429 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2430 flash programming as it is faster than the @option{str9xpec} driver.
2432 Direct programming @option{str9xpec} using the flash controller. This is an
2433 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2434 core does not need to be running to program using this flash driver. Typical use
2435 for this driver is locking/unlocking the target and programming the option bytes.
2438 Before we run any commands using the @option{str9xpec} driver we must first disable
2439 the str9 core. This example assumes the @option{str9xpec} driver has been
2440 configured for flash bank 0.
2442 # assert srst, we do not want core running
2443 # while accessing str9xpec flash driver
2445 # turn off target polling
2448 str9xpec enable_turbo 0
2450 str9xpec options_read 0
2451 # re-enable str9 core
2452 str9xpec disable_turbo 0
2456 The above example will read the str9 option bytes.
2457 When performing a unlock remember that you will not be able to halt the str9 - it
2458 has been locked. Halting the core is not required for the @option{str9xpec} driver
2459 as mentioned above, just issue the commands above manually or from a telnet prompt.
2461 @subsection STR9 configuration
2462 @cindex STR9 configuration
2464 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2465 <@var{BBADR}> <@var{NBBADR}>
2466 @cindex str9x flash_config
2467 @*Configure str9 flash controller.
2469 e.g. str9x flash_config 0 4 2 0 0x80000
2471 BBSR - Boot Bank Size register
2472 NBBSR - Non Boot Bank Size register
2473 BBADR - Boot Bank Start Address register
2474 NBBADR - Boot Bank Start Address register
2478 @subsection STR9 option byte configuration
2479 @cindex STR9 option byte configuration
2481 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2482 @cindex str9xpec options_cmap
2483 @*configure str9 boot bank.
2484 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2485 @cindex str9xpec options_lvdthd
2486 @*configure str9 lvd threshold.
2487 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2488 @cindex str9xpec options_lvdsel
2489 @*configure str9 lvd source.
2490 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2491 @cindex str9xpec options_lvdwarn
2492 @*configure str9 lvd reset warning source.
2495 @subsection STM32x specific commands
2496 @cindex STM32x specific commands
2498 These are flash specific commands when using the stm32x driver.
2500 @item @b{stm32x lock} <@var{num}>
2502 @*lock stm32 device.
2503 @item @b{stm32x unlock} <@var{num}>
2504 @cindex stm32x unlock
2505 @*unlock stm32 device.
2506 @item @b{stm32x options_read} <@var{num}>
2507 @cindex stm32x options_read
2508 @*read stm32 option bytes.
2509 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2510 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2511 @cindex stm32x options_write
2512 @*write stm32 option bytes.
2513 @item @b{stm32x mass_erase} <@var{num}>
2514 @cindex stm32x mass_erase
2515 @*mass erase flash memory.
2518 @subsection Stellaris specific commands
2519 @cindex Stellaris specific commands
2521 These are flash specific commands when using the Stellaris driver.
2523 @item @b{stellaris mass_erase} <@var{num}>
2524 @cindex stellaris mass_erase
2525 @*mass erase flash memory.
2528 @node General Commands
2529 @chapter General Commands
2532 The commands documented in this chapter here are common commands that
2533 you, as a human, may want to type and see the output of. Configuration type
2534 commands are documented elsewhere.
2538 @item @b{Source Of Commands}
2539 @* OpenOCD commands can occur in a configuration script (discussed
2540 elsewhere) or typed manually by a human or supplied programatically,
2541 or via one of several TCP/IP Ports.
2543 @item @b{From the human}
2544 @* A human should interact with the telnet interface (default port: 4444,
2545 or via GDB, default port 3333)
2547 To issue commands from within a GDB session, use the @option{monitor}
2548 command, e.g. use @option{monitor poll} to issue the @option{poll}
2549 command. All output is relayed through the GDB session.
2551 @item @b{Machine Interface}
2552 The Tcl interface's intent is to be a machine interface. The default Tcl
2557 @section Daemon Commands
2559 @subsection sleep [@var{msec}]
2561 @*Wait for n milliseconds before resuming. Useful in connection with script files
2562 (@var{script} command and @var{target_script} configuration).
2564 @subsection shutdown
2566 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2568 @subsection debug_level [@var{n}]
2570 @anchor{debug_level}
2571 @*Display or adjust debug level to n<0-3>
2573 @subsection fast [@var{enable|disable}]
2575 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2576 downloads and fast memory access will work if the JTAG interface isn't too fast and
2577 the core doesn't run at a too low frequency. Note that this option only changes the default
2578 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2581 The target specific "dangerous" optimisation tweaking options may come and go
2582 as more robust and user friendly ways are found to ensure maximum throughput
2583 and robustness with a minimum of configuration.
2585 Typically the "fast enable" is specified first on the command line:
2588 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2591 @subsection log_output <@var{file}>
2593 @*Redirect logging to <file> (default: stderr)
2595 @subsection script <@var{file}>
2597 @*Execute commands from <file>
2598 See also: ``source [find FILENAME]''
2600 @section Target state handling
2601 @subsection power <@var{on}|@var{off}>
2603 @*Turn power switch to target on/off.
2604 No arguments: print status.
2605 Not all interfaces support this.
2607 @subsection reg [@option{#}|@option{name}] [value]
2609 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2610 No arguments: list all available registers for the current target.
2611 Number or name argument: display a register.
2612 Number or name and value arguments: set register value.
2614 @subsection poll [@option{on}|@option{off}]
2616 @*Poll the target for its current state. If the target is in debug mode, architecture
2617 specific information about the current state is printed. An optional parameter
2618 allows continuous polling to be enabled and disabled.
2620 @subsection halt [@option{ms}]
2622 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2623 Default [@option{ms}] is 5 seconds if no arg given.
2624 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2625 will stop OpenOCD from waiting.
2627 @subsection wait_halt [@option{ms}]
2629 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2630 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2633 @subsection resume [@var{address}]
2635 @*Resume the target at its current code position, or at an optional address.
2636 OpenOCD will wait 5 seconds for the target to resume.
2638 @subsection step [@var{address}]
2640 @*Single-step the target at its current code position, or at an optional address.
2642 @subsection reset [@option{run}|@option{halt}|@option{init}]
2644 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2646 With no arguments a "reset run" is executed
2650 @*Let the target run.
2653 @*Immediately halt the target (works only with certain configurations).
2656 @*Immediately halt the target, and execute the reset script (works only with certain
2660 @subsection soft_reset_halt
2662 @*Requesting target halt and executing a soft reset. This is often used
2663 when a target cannot be reset and halted. The target, after reset is
2664 released begins to execute code. OpenOCD attempts to stop the CPU and
2665 then sets the program counter back to the reset vector. Unfortunately
2666 the code that was executed may have left the hardware in an unknown
2670 @section Memory access commands
2672 display available RAM memory.
2673 @subsection Memory peek/poke type commands
2674 These commands allow accesses of a specific size to the memory
2675 system. Often these are used to configure the current target in some
2676 special way. For example - one may need to write certian values to the
2677 SDRAM controller to enable SDRAM.
2680 @item To change the current target see the ``targets'' (plural) command
2681 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2685 @item @b{mdw} <@var{addr}> [@var{count}]
2687 @*display memory words (32bit)
2688 @item @b{mdh} <@var{addr}> [@var{count}]
2690 @*display memory half-words (16bit)
2691 @item @b{mdb} <@var{addr}> [@var{count}]
2693 @*display memory bytes (8bit)
2694 @item @b{mww} <@var{addr}> <@var{value}>
2696 @*write memory word (32bit)
2697 @item @b{mwh} <@var{addr}> <@var{value}>
2699 @*write memory half-word (16bit)
2700 @item @b{mwb} <@var{addr}> <@var{value}>
2702 @*write memory byte (8bit)
2705 @section Image loading commands
2706 @subsection load_image
2707 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2710 @*Load image <@var{file}> to target memory at <@var{address}>
2711 @subsection fast_load_image
2712 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2713 @cindex fast_load_image
2714 @anchor{fast_load_image}
2715 @*Normally you should be using @b{load_image} or GDB load. However, for
2716 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2717 host), storing the image in memory and uploading the image to the target
2718 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2719 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2720 memory, i.e. does not affect target. This approach is also useful when profiling
2721 target programming performance as I/O and target programming can easily be profiled
2723 @subsection fast_load
2727 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2728 @subsection dump_image
2729 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2732 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2733 (binary) <@var{file}>.
2734 @subsection verify_image
2735 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2736 @cindex verify_image
2737 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2738 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2741 @section Breakpoint commands
2742 @cindex Breakpoint commands
2744 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2746 @*set breakpoint <address> <length> [hw]
2747 @item @b{rbp} <@var{addr}>
2749 @*remove breakpoint <adress>
2750 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2752 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2753 @item @b{rwp} <@var{addr}>
2755 @*remove watchpoint <adress>
2758 @section Misc Commands
2759 @cindex Other Target Commands
2761 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2763 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2767 @section Target Specific Commands
2768 @cindex Target Specific Commands
2772 @section Architecture Specific Commands
2773 @cindex Architecture Specific Commands
2775 @subsection ARMV4/5 specific commands
2776 @cindex ARMV4/5 specific commands
2778 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2779 or Intel XScale (XScale isn't supported yet).
2781 @item @b{armv4_5 reg}
2783 @*Display a list of all banked core registers, fetching the current value from every
2784 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2786 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2787 @cindex armv4_5 core_mode
2788 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2789 The target is resumed in the currently set @option{core_mode}.
2792 @subsection ARM7/9 specific commands
2793 @cindex ARM7/9 specific commands
2795 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2796 ARM920T or ARM926EJ-S.
2798 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2799 @cindex arm7_9 dbgrq
2800 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2801 safe for all but ARM7TDMI--S cores (like Philips LPC).
2802 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2803 @cindex arm7_9 fast_memory_access
2804 @anchor{arm7_9 fast_memory_access}
2805 @*Allow OpenOCD to read and write memory without checking completion of
2806 the operation. This provides a huge speed increase, especially with USB JTAG
2807 cables (FT2232), but might be unsafe if used with targets running at very low
2808 speeds, like the 32kHz startup clock of an AT91RM9200.
2809 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2810 @cindex arm7_9 dcc_downloads
2811 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2812 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2813 unsafe, especially with targets running at very low speeds. This command was introduced
2814 with OpenOCD rev. 60, and requires a few bytes of working area.
2817 @subsection ARM720T specific commands
2818 @cindex ARM720T specific commands
2821 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2822 @cindex arm720t cp15
2823 @*display/modify cp15 register <@option{num}> [@option{value}].
2824 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2825 @cindex arm720t md<bhw>_phys
2826 @*Display memory at physical address addr.
2827 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2828 @cindex arm720t mw<bhw>_phys
2829 @*Write memory at physical address addr.
2830 @item @b{arm720t virt2phys} <@var{va}>
2831 @cindex arm720t virt2phys
2832 @*Translate a virtual address to a physical address.
2835 @subsection ARM9TDMI specific commands
2836 @cindex ARM9TDMI specific commands
2839 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2840 @cindex arm9tdmi vector_catch
2841 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2842 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2843 @option{irq} @option{fiq}.
2845 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2848 @subsection ARM966E specific commands
2849 @cindex ARM966E specific commands
2852 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2853 @cindex arm966e cp15
2854 @*display/modify cp15 register <@option{num}> [@option{value}].
2857 @subsection ARM920T specific commands
2858 @cindex ARM920T specific commands
2861 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2862 @cindex arm920t cp15
2863 @*display/modify cp15 register <@option{num}> [@option{value}].
2864 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2865 @cindex arm920t cp15i
2866 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2867 @item @b{arm920t cache_info}
2868 @cindex arm920t cache_info
2869 @*Print information about the caches found. This allows to see whether your target
2870 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2871 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2872 @cindex arm920t md<bhw>_phys
2873 @*Display memory at physical address addr.
2874 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2875 @cindex arm920t mw<bhw>_phys
2876 @*Write memory at physical address addr.
2877 @item @b{arm920t read_cache} <@var{filename}>
2878 @cindex arm920t read_cache
2879 @*Dump the content of ICache and DCache to a file.
2880 @item @b{arm920t read_mmu} <@var{filename}>
2881 @cindex arm920t read_mmu
2882 @*Dump the content of the ITLB and DTLB to a file.
2883 @item @b{arm920t virt2phys} <@var{va}>
2884 @cindex arm920t virt2phys
2885 @*Translate a virtual address to a physical address.
2888 @subsection ARM926EJ-S specific commands
2889 @cindex ARM926EJ-S specific commands
2892 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2893 @cindex arm926ejs cp15
2894 @*display/modify cp15 register <@option{num}> [@option{value}].
2895 @item @b{arm926ejs cache_info}
2896 @cindex arm926ejs cache_info
2897 @*Print information about the caches found.
2898 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2899 @cindex arm926ejs md<bhw>_phys
2900 @*Display memory at physical address addr.
2901 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2902 @cindex arm926ejs mw<bhw>_phys
2903 @*Write memory at physical address addr.
2904 @item @b{arm926ejs virt2phys} <@var{va}>
2905 @cindex arm926ejs virt2phys
2906 @*Translate a virtual address to a physical address.
2909 @subsection CORTEX_M3 specific commands
2910 @cindex CORTEX_M3 specific commands
2913 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2914 @cindex cortex_m3 maskisr
2915 @*Enable masking (disabling) interrupts during target step/resume.
2919 @section Debug commands
2920 @cindex Debug commands
2921 The following commands give direct access to the core, and are most likely
2922 only useful while debugging OpenOCD.
2924 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2925 @cindex arm7_9 write_xpsr
2926 @*Immediately write either the current program status register (CPSR) or the saved
2927 program status register (SPSR), without changing the register cache (as displayed
2928 by the @option{reg} and @option{armv4_5 reg} commands).
2929 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2930 <@var{0=cpsr},@var{1=spsr}>
2931 @cindex arm7_9 write_xpsr_im8
2932 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2933 operation (similar to @option{write_xpsr}).
2934 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2935 @cindex arm7_9 write_core_reg
2936 @*Write a core register, without changing the register cache (as displayed by the
2937 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2938 encoding of the [M4:M0] bits of the PSR.
2941 @section Target Requests
2942 @cindex Target Requests
2943 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2944 See libdcc in the contrib dir for more details.
2946 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}|@var{charmsg}>
2947 @cindex target_request debugmsgs
2948 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running. @var{charmsg} receives messages if Linux kernel ``Kernel low-level debugging via EmbeddedICE DCC channel'' option is enabled.
2952 @chapter JTAG Commands
2953 @cindex JTAG Commands
2954 Generally most people will not use the bulk of these commands. They
2955 are mostly used by the OpenOCD developers or those who need to
2956 directly manipulate the JTAG taps.
2958 In general these commands control JTAG taps at a very low level. For
2959 example if you need to control a JTAG Route Controller (i.e.: the
2960 OMAP3530 on the Beagle Board has one) you might use these commands in
2961 a script or an event procedure.
2965 @item @b{scan_chain}
2967 @*Print current scan chain configuration.
2968 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2970 @*Toggle reset lines.
2971 @item @b{endstate} <@var{tap_state}>
2973 @*Finish JTAG operations in <@var{tap_state}>.
2974 @item @b{runtest} <@var{num_cycles}>
2976 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2977 @item @b{statemove} [@var{tap_state}]
2979 @*Move to current endstate or [@var{tap_state}]
2980 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2982 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2983 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2985 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2986 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2987 @cindex verify_ircapture
2988 @*Verify value captured during Capture-IR. Default is enabled.
2989 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2991 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2992 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2994 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2999 Available tap_states are:
3039 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
3040 be used to access files on PCs (either the developer's PC or some other PC).
3042 The way this works on the ZY1000 is to prefix a filename by
3043 "/tftp/ip/" and append the TFTP path on the TFTP
3044 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
3045 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
3046 if the file was hosted on the embedded host.
3048 In order to achieve decent performance, you must choose a TFTP server
3049 that supports a packet size bigger than the default packet size (512 bytes). There
3050 are numerous TFTP servers out there (free and commercial) and you will have to do
3051 a bit of googling to find something that fits your requirements.
3053 @node Sample Scripts
3054 @chapter Sample Scripts
3057 This page shows how to use the Target Library.
3059 The configuration script can be divided into the following sections:
3061 @item Daemon configuration
3063 @item JTAG scan chain
3064 @item Target configuration
3065 @item Flash configuration
3068 Detailed information about each section can be found at OpenOCD configuration.
3070 @section AT91R40008 example
3071 @cindex AT91R40008 example
3072 To start OpenOCD with a target script for the AT91R40008 CPU and reset
3073 the CPU upon startup of the OpenOCD daemon.
3075 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
3079 @node GDB and OpenOCD
3080 @chapter GDB and OpenOCD
3081 @cindex GDB and OpenOCD
3082 OpenOCD complies with the remote gdbserver protocol, and as such can be used
3083 to debug remote targets.
3085 @section Connecting to GDB
3086 @cindex Connecting to GDB
3087 @anchor{Connecting to GDB}
3088 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
3089 instance GDB 6.3 has a known bug that produces bogus memory access
3090 errors, which has since been fixed: look up 1836 in
3091 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
3093 @*OpenOCD can communicate with GDB in two ways:
3096 A socket (TCP/IP) connection is typically started as follows:
3098 target remote localhost:3333
3100 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3102 A pipe connection is typically started as follows:
3104 target remote | openocd --pipe
3106 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3107 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3111 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3114 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3115 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3116 packet size and the device's memory map.
3118 Previous versions of OpenOCD required the following GDB options to increase
3119 the packet size and speed up GDB communication:
3121 set remote memory-write-packet-size 1024
3122 set remote memory-write-packet-size fixed
3123 set remote memory-read-packet-size 1024
3124 set remote memory-read-packet-size fixed
3126 This is now handled in the @option{qSupported} PacketSize and should not be required.
3128 @section Programming using GDB
3129 @cindex Programming using GDB
3131 By default the target memory map is sent to GDB. This can be disabled by
3132 the following OpenOCD configuration option:
3134 gdb_memory_map disable
3136 For this to function correctly a valid flash configuration must also be set
3137 in OpenOCD. For faster performance you should also configure a valid
3140 Informing GDB of the memory map of the target will enable GDB to protect any
3141 flash areas of the target and use hardware breakpoints by default. This means
3142 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3143 using a memory map. @xref{gdb_breakpoint_override}.
3145 To view the configured memory map in GDB, use the GDB command @option{info mem}
3146 All other unassigned addresses within GDB are treated as RAM.
3148 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3149 This can be changed to the old behaviour by using the following GDB command
3151 set mem inaccessible-by-default off
3154 If @option{gdb_flash_program enable} is also used, GDB will be able to
3155 program any flash memory using the vFlash interface.
3157 GDB will look at the target memory map when a load command is given, if any
3158 areas to be programmed lie within the target flash area the vFlash packets
3161 If the target needs configuring before GDB programming, an event
3162 script can be executed:
3164 $_TARGETNAME configure -event EVENTNAME BODY
3167 To verify any flash programming the GDB command @option{compare-sections}
3170 @node Tcl Scripting API
3171 @chapter Tcl Scripting API
3172 @cindex Tcl Scripting API
3176 The commands are stateless. E.g. the telnet command line has a concept
3177 of currently active target, the Tcl API proc's take this sort of state
3178 information as an argument to each proc.
3180 There are three main types of return values: single value, name value
3181 pair list and lists.
3183 Name value pair. The proc 'foo' below returns a name/value pair
3189 > set foo(you) Oyvind
3190 > set foo(mouse) Micky
3191 > set foo(duck) Donald
3199 me Duane you Oyvind mouse Micky duck Donald
3201 Thus, to get the names of the associative array is easy:
3203 foreach { name value } [set foo] {
3204 puts "Name: $name, Value: $value"
3208 Lists returned must be relatively small. Otherwise a range
3209 should be passed in to the proc in question.
3211 @section Internal low-level Commands
3213 By low-level, the intent is a human would not directly use these commands.
3215 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3216 is the low level API upon which "flash banks" is implemented.
3219 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3221 Read memory and return as a Tcl array for script processing
3222 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3224 Convert a Tcl array to memory locations and write the values
3225 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3227 Return information about the flash banks
3230 OpenOCD commands can consist of two words, e.g. "flash banks". The
3231 startup.tcl "unknown" proc will translate this into a Tcl proc
3232 called "flash_banks".
3234 @section OpenOCD specific Global Variables
3238 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3239 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3240 holds one of the following values:
3243 @item @b{winxx} Built using Microsoft Visual Studio
3244 @item @b{linux} Linux is the underlying operating sytem
3245 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3246 @item @b{cygwin} Running under Cygwin
3247 @item @b{mingw32} Running under MingW32
3248 @item @b{other} Unknown, none of the above.
3251 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3254 @chapter Deprecated/Removed Commands
3255 @cindex Deprecated/Removed Commands
3256 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3259 @item @b{arm7_9 fast_writes}
3260 @cindex arm7_9 fast_writes
3261 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3262 @item @b{arm7_9 force_hw_bkpts}
3263 @cindex arm7_9 force_hw_bkpts
3264 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3265 for flash if the GDB memory map has been set up(default when flash is declared in
3266 target configuration). @xref{gdb_breakpoint_override}.
3267 @item @b{arm7_9 sw_bkpts}
3268 @cindex arm7_9 sw_bkpts
3269 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3270 @item @b{daemon_startup}
3271 @cindex daemon_startup
3272 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3273 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3274 and @option{target cortex_m3 little reset_halt 0}.
3275 @item @b{dump_binary}
3277 @*use @option{dump_image} command with same args. @xref{dump_image}.
3278 @item @b{flash erase}
3280 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3281 @item @b{flash write}
3283 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3284 @item @b{flash write_binary}
3285 @cindex flash write_binary
3286 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3287 @item @b{flash auto_erase}
3288 @cindex flash auto_erase
3289 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3290 @item @b{load_binary}
3292 @*use @option{load_image} command with same args. @xref{load_image}.
3293 @item @b{run_and_halt_time}
3294 @cindex run_and_halt_time
3295 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3302 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3304 @*use the create subcommand of @option{target}.
3305 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3306 @cindex target_script
3307 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3308 @item @b{working_area}
3309 @cindex working_area
3310 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3317 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3319 @cindex adaptive clocking
3322 In digital circuit design it is often refered to as ``clock
3323 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3324 operating at some speed, your target is operating at another. The two
3325 clocks are not synchronised, they are ``asynchronous''
3327 In order for the two to work together they must be synchronised. Otherwise
3328 the two systems will get out of sync with each other and nothing will
3329 work. There are 2 basic options:
3332 Use a special circuit.
3334 One clock must be some multiple slower than the other.
3337 @b{Does this really matter?} For some chips and some situations, this
3338 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3339 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3340 program/enable the oscillators and eventually the main clock. It is in
3341 those critical times you must slow the JTAG clock to sometimes 1 to
3344 Imagine debugging a 500MHz ARM926 hand held battery powered device
3345 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3348 @b{Solution #1 - A special circuit}
3350 In order to make use of this, your JTAG dongle must support the RTCK
3351 feature. Not all dongles support this - keep reading!
3353 The RTCK signal often found in some ARM chips is used to help with
3354 this problem. ARM has a good description of the problem described at
3355 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3356 28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
3357 work? / how does adaptive clocking work?''.
3359 The nice thing about adaptive clocking is that ``battery powered hand
3360 held device example'' - the adaptiveness works perfectly all the
3361 time. One can set a break point or halt the system in the deep power
3362 down code, slow step out until the system speeds up.
3364 @b{Solution #2 - Always works - but may be slower}
3366 Often this is a perfectly acceptable solution.
3368 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3369 the target clock speed. But what that ``magic division'' is varies
3370 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3371 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3372 1/12 the clock speed.
3374 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3376 You can still debug the 'low power' situations - you just need to
3377 manually adjust the clock speed at every step. While painful and
3378 tedious, it is not always practical.
3380 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3381 have a special debug mode in your application that does a ``high power
3382 sleep''. If you are careful - 98% of your problems can be debugged
3385 To set the JTAG frequency use the command:
3393 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3395 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3396 around Windows filenames.
3409 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3411 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3412 claims to come with all the necessary DLLs. When using Cygwin, try launching
3413 OpenOCD from the Cygwin shell.
3415 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3416 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3417 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3419 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3420 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3421 software breakpoints consume one of the two available hardware breakpoints.
3423 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3425 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3426 clock at the time you're programming the flash. If you've specified the crystal's
3427 frequency, make sure the PLL is disabled. If you've specified the full core speed
3428 (e.g. 60MHz), make sure the PLL is enabled.
3430 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3431 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3432 out while waiting for end of scan, rtck was disabled".
3434 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3435 settings in your PC BIOS (ECP, EPP, and different versions of those).
3437 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3438 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3439 memory read caused data abort".
3441 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3442 beyond the last valid frame. It might be possible to prevent this by setting up
3443 a proper "initial" stack frame, if you happen to know what exactly has to
3444 be done, feel free to add this here.
3446 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3447 stack before calling main(). What GDB is doing is ``climbing'' the run
3448 time stack by reading various values on the stack using the standard
3449 call frame for the target. GDB keeps going - until one of 2 things
3450 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3451 stackframes have been processed. By pushing zeros on the stack, GDB
3454 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3455 your C code, do the same - artifically push some zeros onto the stack,
3456 remember to pop them off when the ISR is done.
3458 @b{Also note:} If you have a multi-threaded operating system, they
3459 often do not @b{in the intrest of saving memory} waste these few
3463 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3464 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3466 This warning doesn't indicate any serious problem, as long as you don't want to
3467 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3468 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3469 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3470 independently. With this setup, it's not possible to halt the core right out of
3471 reset, everything else should work fine.
3473 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3474 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3475 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3476 quit with an error message. Is there a stability issue with OpenOCD?
3478 No, this is not a stability issue concerning OpenOCD. Most users have solved
3479 this issue by simply using a self-powered USB hub, which they connect their
3480 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3481 supply stable enough for the Amontec JTAGkey to be operated.
3483 @b{Laptops running on battery have this problem too...}
3485 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3486 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3487 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3488 What does that mean and what might be the reason for this?
3490 First of all, the reason might be the USB power supply. Try using a self-powered
3491 hub instead of a direct connection to your computer. Secondly, the error code 4
3492 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3493 chip ran into some sort of error - this points us to a USB problem.
3495 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3496 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3497 What does that mean and what might be the reason for this?
3499 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3500 has closed the connection to OpenOCD. This might be a GDB issue.
3502 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3503 are described, there is a parameter for specifying the clock frequency
3504 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3505 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3506 specified in kilohertz. However, I do have a quartz crystal of a
3507 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3508 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3511 No. The clock frequency specified here must be given as an integral number.
3512 However, this clock frequency is used by the In-Application-Programming (IAP)
3513 routines of the LPC2000 family only, which seems to be very tolerant concerning
3514 the given clock frequency, so a slight difference between the specified clock
3515 frequency and the actual clock frequency will not cause any trouble.
3517 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3519 Well, yes and no. Commands can be given in arbitrary order, yet the
3520 devices listed for the JTAG scan chain must be given in the right
3521 order (jtag newdevice), with the device closest to the TDO-Pin being
3522 listed first. In general, whenever objects of the same type exist
3523 which require an index number, then these objects must be given in the
3524 right order (jtag newtap, targets and flash banks - a target
3525 references a jtag newtap and a flash bank references a target).
3527 You can use the ``scan_chain'' command to verify and display the tap order.
3529 @item @b{JTAG Tap Order} JTAG tap order - command order
3531 Many newer devices have multiple JTAG taps. For example: ST
3532 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3533 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3534 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3535 connected to the boundary scan tap, which then connects to the
3536 Cortex-M3 tap, which then connects to the TDO pin.
3538 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3539 (2) The boundary scan tap. If your board includes an additional JTAG
3540 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3541 place it before or after the STM32 chip in the chain. For example:
3544 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3545 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3546 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3547 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3548 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3551 The ``jtag device'' commands would thus be in the order shown below. Note:
3554 @item jtag newtap Xilinx tap -irlen ...
3555 @item jtag newtap stm32 cpu -irlen ...
3556 @item jtag newtap stm32 bs -irlen ...
3557 @item # Create the debug target and say where it is
3558 @item target create stm32.cpu -chain-position stm32.cpu ...
3562 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3563 log file, I can see these error messages: Error: arm7_9_common.c:561
3564 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3570 @node Tcl Crash Course
3571 @chapter Tcl Crash Course
3574 Not everyone knows Tcl - this is not intended to be a replacement for
3575 learning Tcl, the intent of this chapter is to give you some idea of
3576 how the Tcl scripts work.
3578 This chapter is written with two audiences in mind. (1) OpenOCD users
3579 who need to understand a bit more of how JIM-Tcl works so they can do
3580 something useful, and (2) those that want to add a new command to
3583 @section Tcl Rule #1
3584 There is a famous joke, it goes like this:
3586 @item Rule #1: The wife is always correct
3587 @item Rule #2: If you think otherwise, See Rule #1
3590 The Tcl equal is this:
3593 @item Rule #1: Everything is a string
3594 @item Rule #2: If you think otherwise, See Rule #1
3597 As in the famous joke, the consequences of Rule #1 are profound. Once
3598 you understand Rule #1, you will understand Tcl.
3600 @section Tcl Rule #1b
3601 There is a second pair of rules.
3603 @item Rule #1: Control flow does not exist. Only commands
3604 @* For example: the classic FOR loop or IF statement is not a control
3605 flow item, they are commands, there is no such thing as control flow
3607 @item Rule #2: If you think otherwise, See Rule #1
3608 @* Actually what happens is this: There are commands that by
3609 convention, act like control flow key words in other languages. One of
3610 those commands is the word ``for'', another command is ``if''.
3613 @section Per Rule #1 - All Results are strings
3614 Every Tcl command results in a string. The word ``result'' is used
3615 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3616 Everything is a string}
3618 @section Tcl Quoting Operators
3619 In life of a Tcl script, there are two important periods of time, the
3620 difference is subtle.
3623 @item Evaluation Time
3626 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3627 three primary quoting constructs, the [square-brackets] the
3628 @{curly-braces@} and ``double-quotes''
3630 By now you should know $VARIABLES always start with a $DOLLAR
3631 sign. BTW: To set a variable, you actually use the command ``set'', as
3632 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3633 = 1'' statement, but without the equal sign.
3636 @item @b{[square-brackets]}
3637 @* @b{[square-brackets]} are command substitutions. It operates much
3638 like Unix Shell `back-ticks`. The result of a [square-bracket]
3639 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3640 string}. These two statements are roughly identical:
3644 echo "The Date is: $X"
3647 puts "The Date is: $X"
3649 @item @b{``double-quoted-things''}
3650 @* @b{``double-quoted-things''} are just simply quoted
3651 text. $VARIABLES and [square-brackets] are expanded in place - the
3652 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3656 puts "It is now \"[date]\", $x is in 1 hour"
3658 @item @b{@{Curly-Braces@}}
3659 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3660 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3661 'single-quote' operators in BASH shell scripts, with the added
3662 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3663 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3664 28/nov/2008, Jim/OpenOCD does not have a date command.
3667 @section Consequences of Rule 1/2/3/4
3669 The consequences of Rule 1 are profound.
3671 @subsection Tokenisation & Execution.
3673 Of course, whitespace, blank lines and #comment lines are handled in
3676 As a script is parsed, each (multi) line in the script file is
3677 tokenised and according to the quoting rules. After tokenisation, that
3678 line is immedatly executed.
3680 Multi line statements end with one or more ``still-open''
3681 @{curly-braces@} which - eventually - closes a few lines later.
3683 @subsection Command Execution
3685 Remember earlier: There are no ``control flow''
3686 statements in Tcl. Instead there are COMMANDS that simply act like
3687 control flow operators.
3689 Commands are executed like this:
3692 @item Parse the next line into (argc) and (argv[]).
3693 @item Look up (argv[0]) in a table and call its function.
3694 @item Repeat until End Of File.
3697 It sort of works like this:
3700 ReadAndParse( &argc, &argv );
3702 cmdPtr = LookupCommand( argv[0] );
3704 (*cmdPtr->Execute)( argc, argv );
3708 When the command ``proc'' is parsed (which creates a procedure
3709 function) it gets 3 parameters on the command line. @b{1} the name of
3710 the proc (function), @b{2} the list of parameters, and @b{3} the body
3711 of the function. Not the choice of words: LIST and BODY. The PROC
3712 command stores these items in a table somewhere so it can be found by
3715 @subsection The FOR command
3717 The most interesting command to look at is the FOR command. In Tcl,
3718 the FOR command is normally implemented in C. Remember, FOR is a
3719 command just like any other command.
3721 When the ascii text containing the FOR command is parsed, the parser
3722 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3726 @item The ascii text 'for'
3727 @item The start text
3728 @item The test expression
3733 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3734 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3735 Often many of those parameters are in @{curly-braces@} - thus the
3736 variables inside are not expanded or replaced until later.
3738 Remember that every Tcl command looks like the classic ``main( argc,
3739 argv )'' function in C. In JimTCL - they actually look like this:
3743 MyCommand( Jim_Interp *interp,
3745 Jim_Obj * const *argvs );
3748 Real Tcl is nearly identical. Although the newer versions have
3749 introduced a byte-code parser and intepreter, but at the core, it
3750 still operates in the same basic way.
3752 @subsection FOR command implementation
3754 To understand Tcl it is perhaps most helpful to see the FOR
3755 command. Remember, it is a COMMAND not a control flow structure.
3757 In Tcl there are two underlying C helper functions.
3759 Remember Rule #1 - You are a string.
3761 The @b{first} helper parses and executes commands found in an ascii
3762 string. Commands can be seperated by semicolons, or newlines. While
3763 parsing, variables are expanded via the quoting rules.
3765 The @b{second} helper evaluates an ascii string as a numerical
3766 expression and returns a value.
3768 Here is an example of how the @b{FOR} command could be
3769 implemented. The pseudo code below does not show error handling.
3771 void Execute_AsciiString( void *interp, const char *string );
3773 int Evaluate_AsciiExpression( void *interp, const char *string );
3776 MyForCommand( void *interp,
3781 SetResult( interp, "WRONG number of parameters");
3785 // argv[0] = the ascii string just like C
3787 // Execute the start statement.
3788 Execute_AsciiString( interp, argv[1] );
3792 i = Evaluate_AsciiExpression(interp, argv[2]);
3797 Execute_AsciiString( interp, argv[3] );
3799 // Execute the LOOP part
3800 Execute_AsciiString( interp, argv[4] );
3804 SetResult( interp, "" );
3809 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3810 in the same basic way.
3812 @section OpenOCD Tcl Usage
3814 @subsection source and find commands
3815 @b{Where:} In many configuration files
3816 @* Example: @b{ source [find FILENAME] }
3817 @*Remember the parsing rules
3819 @item The FIND command is in square brackets.
3820 @* The FIND command is executed with the parameter FILENAME. It should
3821 find the full path to the named file. The RESULT is a string, which is
3822 substituted on the orginal command line.
3823 @item The command source is executed with the resulting filename.
3824 @* SOURCE reads a file and executes as a script.
3826 @subsection format command
3827 @b{Where:} Generally occurs in numerous places.
3828 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3834 puts [format "The answer: %d" [expr $x * $y]]
3837 @item The SET command creates 2 variables, X and Y.
3838 @item The double [nested] EXPR command performs math
3839 @* The EXPR command produces numerical result as a string.
3841 @item The format command is executed, producing a single string
3842 @* Refer to Rule #1.
3843 @item The PUTS command outputs the text.
3845 @subsection Body or Inlined Text
3846 @b{Where:} Various TARGET scripts.
3849 proc someproc @{@} @{
3850 ... multiple lines of stuff ...
3852 $_TARGETNAME configure -event FOO someproc
3853 #2 Good - no variables
3854 $_TARGETNAME confgure -event foo "this ; that;"
3855 #3 Good Curly Braces
3856 $_TARGETNAME configure -event FOO @{
3859 #4 DANGER DANGER DANGER
3860 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3863 @item The $_TARGETNAME is an OpenOCD variable convention.
3864 @*@b{$_TARGETNAME} represents the last target created, the value changes
3865 each time a new target is created. Remember the parsing rules. When
3866 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3867 the name of the target which happens to be a TARGET (object)
3869 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3870 @*There are 4 examples:
3872 @item The TCLBODY is a simple string that happens to be a proc name
3873 @item The TCLBODY is several simple commands seperated by semicolons
3874 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3875 @item The TCLBODY is a string with variables that get expanded.
3878 In the end, when the target event FOO occurs the TCLBODY is
3879 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3880 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3882 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3883 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3884 and the text is evaluated. In case #4, they are replaced before the
3885 ``Target Object Command'' is executed. This occurs at the same time
3886 $_TARGETNAME is replaced. In case #4 the date will never
3887 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3888 Jim/OpenOCD does not have a date command@}
3890 @subsection Global Variables
3891 @b{Where:} You might discover this when writing your own procs @* In
3892 simple terms: Inside a PROC, if you need to access a global variable
3893 you must say so. See also ``upvar''. Example:
3895 proc myproc @{ @} @{
3896 set y 0 #Local variable Y
3897 global x #Global variable X
3898 puts [format "X=%d, Y=%d" $x $y]
3901 @section Other Tcl Hacks
3902 @b{Dynamic variable creation}
3904 # Dynamically create a bunch of variables.
3905 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3907 set vn [format "BIT%d" $x]
3911 set $vn [expr (1 << $x)]
3914 @b{Dynamic proc/command creation}
3916 # One "X" function - 5 uart functions.
3917 foreach who @{A B C D E@}
3918 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3922 @node Target Library
3923 @chapter Target Library
3924 @cindex Target Library
3926 OpenOCD comes with a target configuration script library. These scripts can be
3927 used as-is or serve as a starting point.
3929 The target library is published together with the OpenOCD executable and
3930 the path to the target library is in the OpenOCD script search path.
3931 Similarly there are example scripts for configuring the JTAG interface.
3933 The command line below uses the example parport configuration script
3934 that ship with OpenOCD, then configures the str710.cfg target and
3935 finally issues the init and reset commands. The communication speed
3936 is set to 10kHz for reset and 8MHz for post reset.
3939 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3942 To list the target scripts available:
3945 $ ls /usr/local/lib/openocd/target
3947 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3948 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3949 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3950 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3956 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3957 @comment case issue with ``Index.html'' and ``index.html''
3958 @comment Occurs when creating ``--html --no-split'' output
3959 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3960 @unnumbered OpenOCD Index