1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD
55 * Developers:: OpenOCD Developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl Scripting API:: Tcl Scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target Library:: Target Library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main Index
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 based, parallel port based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}.
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Packagers Please Read!
138 You are a @b{PACKAGER} of OpenOCD if you
141 @item @b{Sell dongles} and include pre-built binaries
142 @item @b{Supply tools} i.e.: A complete development solution
143 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
144 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
147 As a @b{PACKAGER} - you are at the top of the food chain. You solve
148 problems for downstream users. What you fix or solve - solves hundreds
149 if not thousands of user questions. If something does not work for you
150 please let us know. That said, would also like you to follow a few
154 @item @b{Always build with printer ports enabled.}
155 @item @b{Try to use LIBFTDI + LIBUSB where possible. You cover more bases.}
159 @item @b{Why YES to LIBFTDI + LIBUSB?}
161 @item @b{LESS} work - libusb perhaps already there
162 @item @b{LESS} work - identical code, multiple platforms
163 @item @b{MORE} dongles are supported
164 @item @b{MORE} platforms are supported
165 @item @b{MORE} complete solution
167 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)?
169 @item @b{LESS} speed - some say it is slower
170 @item @b{LESS} complex to distribute (external dependencies)
174 @section Building From Source
176 You can download the current SVN version with an SVN client of your choice from the
177 following repositories:
179 @uref{svn://svn.berlios.de/openocd/trunk}
183 @uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
185 Using the SVN command line client, you can use the following command to fetch the
186 latest version (make sure there is no (non-svn) directory called "openocd" in the
190 svn checkout svn://svn.berlios.de/openocd/trunk openocd
193 Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
194 For building on Windows,
195 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
196 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
197 paths, resulting in obscure dependency errors (This is an observation I've gathered
198 from the logs of one user - correct me if I'm wrong).
200 You further need the appropriate driver files, if you want to build support for
201 a FTDI FT2232 based interface:
204 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
205 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
206 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
207 homepage (@uref{http://www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
210 libftdi is supported under Windows. Do not use versions earlier than 0.14.
212 In general, the D2XX driver provides superior performance (several times as fast),
213 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
214 a kernel module, only a user space library.
216 To build OpenOCD (on both Linux and Cygwin), use the following commands:
222 Bootstrap generates the configure script, and prepares building on your system.
225 ./configure [options, see below]
228 Configure generates the Makefiles used to build OpenOCD.
235 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
237 The configure script takes several options, specifying which JTAG interfaces
238 should be included (among other things):
242 @option{--enable-parport} - Enable building the PC parallel port driver.
244 @option{--enable-parport_ppdev} - Enable use of ppdev (/dev/parportN) for parport.
246 @option{--enable-parport_giveio} - Enable use of giveio for parport instead of ioperm.
248 @option{--enable-amtjtagaccel} - Enable building the Amontec JTAG-Accelerator driver.
250 @option{--enable-ecosboard} - Enable building support for eCosBoard based JTAG debugger.
252 @option{--enable-ioutil} - Enable ioutil functions - useful for standalone OpenOCD implementations.
254 @option{--enable-httpd} - Enable builtin httpd server - useful for standalone OpenOCD implementations.
256 @option{--enable-ep93xx} - Enable building support for EP93xx based SBCs.
258 @option{--enable-at91rm9200} - Enable building support for AT91RM9200 based SBCs.
260 @option{--enable-gw16012} - Enable building support for the Gateworks GW16012 JTAG programmer.
262 @option{--enable-ft2232_ftd2xx} - Numerous USB type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
264 @option{--enable-ft2232_libftdi} - An open source (free) alternative to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin).
266 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
268 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only. Equivalent of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
270 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
272 @option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
274 @option{--enable-presto_ftd2xx} - Enable building support for ASIX Presto programmer using the FTD2XX driver.
276 @option{--enable-usbprog} - Enable building support for the USBprog JTAG programmer.
278 @option{--enable-oocd_trace} - Enable building support for the OpenOCD+trace ETM capture device.
280 @option{--enable-jlink} - Enable building support for the Segger J-Link JTAG programmer.
282 @option{--enable-vsllink} - Enable building support for the Versaloon-Link JTAG programmer.
284 @option{--enable-rlink} - Enable building support for the Raisonance RLink JTAG programmer.
286 @option{--enable-arm-jtag-ew} - Enable building support for the Olimex ARM-JTAG-EW programmer.
288 @option{--enable-dummy} - Enable building the dummy port driver.
291 @section Parallel Port Dongles
293 If you want to access the parallel port using the PPDEV interface you have to specify
294 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
295 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
296 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
298 The same is true for the @option{--enable-parport_giveio} option, you have to
299 use both the @option{--enable-parport} AND the @option{--enable-parport_giveio} option if you want to use giveio instead of ioperm parallel port access method.
301 @section FT2232C Based USB Dongles
303 There are 2 methods of using the FTD2232, either (1) using the
304 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
305 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
307 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
308 TAR.GZ file. You must unpack them ``some where'' convient. As of this
309 writing (12/26/2008) FTDICHIP does not supply means to install these
310 files ``in an appropriate place'' As a result, there are two
311 ``./configure'' options that help.
313 Below is an example build process:
315 1) Check out the latest version of ``openocd'' from SVN.
317 2) Download & unpack either the Windows or Linux FTD2xx drivers
318 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm}).
321 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
322 /home/duane/libftd2xx0.4.16 => the Linux TAR.GZ file contents.
325 3) Configure with these options:
328 Cygwin FTDICHIP solution:
329 ./configure --prefix=/home/duane/mytools \
330 --enable-ft2232_ftd2xx \
331 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
333 Linux FTDICHIP solution:
334 ./configure --prefix=/home/duane/mytools \
335 --enable-ft2232_ftd2xx \
336 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
338 Cygwin/Linux LIBFTDI solution:
340 1a) For Windows: The Windows port of LIBUSB is in place.
341 1b) For Linux: libusb has been built/installed and is in place.
343 2) And libftdi has been built and installed
344 Note: libftdi - relies upon libusb.
346 ./configure --prefix=/home/duane/mytools \
347 --enable-ft2232_libftdi
351 4) Then just type ``make'', and perhaps ``make install''.
354 @section Miscellaneous Configure Options
358 @option{--disable-option-checking} - Ignore unrecognized @option{--enable} and @option{--with} options.
360 @option{--enable-gccwarnings} - Enable extra gcc warnings during build.
363 @option{--enable-release} - Enable building of an OpenOCD release, generally
364 this is for developers. It simply omits the svn version string when the
365 openocd @option{-v} is executed.
368 @node JTAG Hardware Dongles
369 @chapter JTAG Hardware Dongles
378 Defined: @b{dongle}: A small device that plugins into a computer and serves as
379 an adapter .... [snip]
381 In the OpenOCD case, this generally refers to @b{a small adapater} one
382 attaches to your computer via USB or the Parallel Printer Port. The
383 execption being the Zylin ZY1000 which is a small box you attach via
387 @section Choosing a Dongle
389 There are three things you should keep in mind when choosing a dongle.
392 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
393 @item @b{Connection} Printer Ports - Does your computer have one?
394 @item @b{Connection} Is that long printer bit-bang cable practical?
395 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
398 @section Stand alone Systems
400 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
401 dongle, but a standalone box.
403 @section USB FT2232 Based
405 There are many USB JTAG dongles on the market, many of them are based
406 on a chip from ``Future Technology Devices International'' (FTDI)
407 known as the FTDI FT2232.
409 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
411 As of 28/Nov/2008, the following are supported:
415 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
417 @* See: @url{http://www.amontec.com/jtagkey.shtml}
419 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
421 @* See: @url{http://www.signalyzer.com}
422 @item @b{evb_lm3s811}
423 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
424 @item @b{olimex-jtag}
425 @* See: @url{http://www.olimex.com}
427 @* See: @url{http://www.tincantools.com}
428 @item @b{turtelizer2}
429 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
431 @* Link: @url{http://www.hitex.com/index.php?id=383}
433 @* Link @url{http://www.hitex.com/stm32-stick}
434 @item @b{axm0432_jtag}
435 @* Axiom AXM-0432 Link @url{http://www.axman.com}
438 @section USB JLINK based
439 There are several OEM versions of the Segger @b{JLINK} adapter. It is
440 an example of a micro controller based JTAG adapter, it uses an
441 AT91SAM764 internally.
444 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
445 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
446 @item @b{SEGGER JLINK}
447 @* Link: @url{http://www.segger.com/jlink.html}
449 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
452 @section USB RLINK based
453 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
456 @item @b{Raisonance RLink}
457 @* Link: @url{http://www.raisonance.com/products/RLink.php}
458 @item @b{STM32 Primer}
459 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
460 @item @b{STM32 Primer2}
461 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
467 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
469 @item @b{USB - Presto}
470 @* Link: @url{http://tools.asix.net/prg_presto.htm}
472 @item @b{Versaloon-Link}
473 @* Link: @url{http://www.simonqian.com/en/Versaloon}
475 @item @b{ARM-JTAG-EW}
476 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
479 @section IBM PC Parallel Printer Port Based
481 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
482 and the MacGraigor Wiggler. There are many clones and variations of
487 @item @b{Wiggler} - There are many clones of this.
488 @* Link: @url{http://www.macraigor.com/wiggler.htm}
490 @item @b{DLC5} - From XILINX - There are many clones of this
491 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
492 produced, PDF schematics are easily found and it is easy to make.
494 @item @b{Amontec - JTAG Accelerator}
495 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
498 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
501 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
503 @item @b{Wiggler_ntrst_inverted}
504 @* Yet another variation - See the source code, src/jtag/parport.c
506 @item @b{old_amt_wiggler}
507 @* Unknown - probably not on the market today
510 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
513 @* Link: @url{http://www.amontec.com/chameleon.shtml}
519 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
522 @* From ST Microsystems, link:
523 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
524 Title: FlashLINK JTAG programing cable for PSD and uPSD
532 @* An EP93xx based Linux machine using the GPIO pins directly.
535 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
541 @cindex running OpenOCD
543 @cindex --debug_level
547 The @option{--help} option shows:
551 --help | -h display this help
552 --version | -v display OpenOCD version
553 --file | -f use configuration file <name>
554 --search | -s dir to search for config files and scripts
555 --debug | -d set debug level <0-3>
556 --log_output | -l redirect log output to file <name>
557 --command | -c run <command>
558 --pipe | -p use pipes when talking to gdb
561 By default OpenOCD reads the file configuration file ``openocd.cfg''
562 in the current directory. To specify a different (or multiple)
563 configuration file, you can use the ``-f'' option. For example:
566 openocd -f config1.cfg -f config2.cfg -f config3.cfg
569 Once started, OpenOCD runs as a daemon, waiting for connections from
570 clients (Telnet, GDB, Other).
572 If you are having problems, you can enable internal debug messages via
575 Also it is possible to interleave commands w/config scripts using the
576 @option{-c} command line switch.
578 To enable debug output (when reporting problems or working on OpenOCD
579 itself), use the @option{-d} command line switch. This sets the
580 @option{debug_level} to "3", outputting the most information,
581 including debug messages. The default setting is "2", outputting only
582 informational messages, warnings and errors. You can also change this
583 setting from within a telnet or gdb session using @option{debug_level
584 <n>} @xref{debug_level}.
586 You can redirect all output from the daemon to a file using the
587 @option{-l <logfile>} switch.
589 Search paths for config/script files can be added to OpenOCD by using
590 the @option{-s <search>} switch. The current directory and the OpenOCD
591 target library is in the search path by default.
593 For details on the @option{-p} option. @xref{Connecting to GDB}.
595 Note! OpenOCD will launch the GDB & telnet server even if it can not
596 establish a connection with the target. In general, it is possible for
597 the JTAG controller to be unresponsive until the target is set up
598 correctly via e.g. GDB monitor commands in a GDB init script.
600 @node Simple Configuration Files
601 @chapter Simple Configuration Files
602 @cindex configuration
605 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
608 @item A small openocd.cfg file which ``sources'' other configuration files
609 @item A monolithic openocd.cfg file
610 @item Many -f filename options on the command line
611 @item Your Mixed Solution
614 @section Small configuration file method
616 This is the preferred method. It is simple and works well for many
617 people. The developers of OpenOCD would encourage you to use this
618 method. If you create a new configuration please email new
619 configurations to the development list.
621 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
624 source [find interface/signalyzer.cfg]
626 # Change the default telnet port...
630 # GDB can also flash my flash!
631 gdb_memory_map enable
632 gdb_flash_program enable
634 source [find target/sam7x256.cfg]
637 There are many example configuration scripts you can work with. You
638 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
642 @item @b{board} - eval board level configurations
643 @item @b{interface} - specific dongle configurations
644 @item @b{target} - the target chips
645 @item @b{tcl} - helper scripts
646 @item @b{xscale} - things specific to the xscale.
649 Look first in the ``boards'' area, then the ``targets'' area. Often a board
650 configuration is a good example to work from.
652 @section Many -f filename options
653 Some believe this is a wonderful solution, others find it painful.
655 You can use a series of ``-f filename'' options on the command line,
656 OpenOCD will read each filename in sequence, for example:
659 openocd -f file1.cfg -f file2.cfg -f file2.cfg
662 You can also intermix various commands with the ``-c'' command line
665 @section Monolithic file
666 The ``Monolithic File'' dispenses with all ``source'' statements and
667 puts everything in one self contained (monolithic) file. This is not
670 Please try to ``source'' various files or use the multiple -f
673 @section Advice for you
674 Often, one uses a ``mixed approach''. Where possible, please try to
675 ``source'' common things, and if needed cut/paste parts of the
676 standard distribution configuration files as needed.
678 @b{REMEMBER:} The ``important parts'' of your configuration file are:
681 @item @b{Interface} - Defines the dongle
682 @item @b{Taps} - Defines the JTAG Taps
683 @item @b{GDB Targets} - What GDB talks to
684 @item @b{Flash Programing} - Very Helpful
687 Some key things you should look at and understand are:
690 @item The reset configuration of your debug environment as a whole
691 @item Is there a ``work area'' that OpenOCD can use?
692 @* For ARM - work areas mean up to 10x faster downloads.
693 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
694 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
699 @node Config File Guidelines
700 @chapter Config File Guidelines
702 This section/chapter is aimed at developers and integrators of
703 OpenOCD. These are guidelines for creating new boards and new target
704 configurations as of 28/Nov/2008.
706 However, you, the user of OpenOCD, should be somewhat familiar with
707 this section as it should help explain some of the internals of what
708 you might be looking at.
710 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
714 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
716 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
717 contain initialization items that are specific to a board - for
718 example: The SDRAM initialization sequence for the board, or the type
719 of external flash and what address it is found at. Any initialization
720 sequence to enable that external flash or SDRAM should be found in the
721 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
722 a CPU and an FPGA or CPLD.
724 @* Think chip. The ``target'' directory represents a JTAG tap (or
725 chip) OpenOCD should control, not a board. Two common types of targets
726 are ARM chips and FPGA or CPLD chips.
729 @b{If needed...} The user in their ``openocd.cfg'' file or the board
730 file might override a specific feature in any of the above files by
731 setting a variable or two before sourcing the target file. Or adding
732 various commands specific to their situation.
734 @section Interface Config Files
736 The user should be able to source one of these files via a command like this:
739 source [find interface/FOOBAR.cfg]
741 openocd -f interface/FOOBAR.cfg
744 A preconfigured interface file should exist for every interface in use
745 today, that said, perhaps some interfaces have only been used by the
746 sole developer who created it.
748 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
749 tcl_platform(platform), it should be called jim_platform (because it
750 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
751 ``cygwin'' or ``mingw''
753 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
755 @section Board Config Files
757 @b{Note: BOARD directory NEW as of 28/nov/2008}
759 The user should be able to source one of these files via a command like this:
762 source [find board/FOOBAR.cfg]
764 openocd -f board/FOOBAR.cfg
768 The board file should contain one or more @t{source [find
769 target/FOO.cfg]} statements along with any board specific things.
771 In summary the board files should contain (if present)
774 @item External flash configuration (i.e.: the flash on CS0)
775 @item SDRAM configuration (size, speed, etc.
776 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
777 @item Multiple TARGET source statements
778 @item All things that are not ``inside a chip''
779 @item Things inside a chip go in a 'target' file
782 @section Target Config Files
784 The user should be able to source one of these files via a command like this:
787 source [find target/FOOBAR.cfg]
789 openocd -f target/FOOBAR.cfg
792 In summary the target files should contain
797 @item Reset configuration
799 @item CPU/Chip/CPU-Core specific features
803 @subsection Important variable names
805 By default, the end user should never need to set these
806 variables. However, if the user needs to override a setting they only
807 need to set the variable in a simple way.
811 @* This gives a name to the overall chip, and is used as part of the
812 tap identifier dotted name.
814 @* By default little - unless the chip or board is not normally used that way.
816 @* When OpenOCD examines the JTAG chain, it will attempt to identify
817 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
818 to verify the tap id number verses configuration file and may issue an
819 error or warning like this. The hope is that this will help to pinpoint
820 problems in OpenOCD configurations.
823 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
824 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
825 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
826 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
829 @item @b{_TARGETNAME}
830 @* By convention, this variable is created by the target configuration
831 script. The board configuration file may make use of this variable to
832 configure things like a ``reset init'' script, or other things
833 specific to that board and that target.
835 If the chip has 2 targets, use the names @b{_TARGETNAME0},
836 @b{_TARGETNAME1}, ... etc.
838 @b{Remember:} The ``board file'' may include multiple targets.
840 At no time should the name ``target0'' (the default target name if
841 none was specified) be used. The name ``target0'' is a hard coded name
842 - the next target on the board will be some other number.
844 The user (or board file) should reasonably be able to:
847 source [find target/FOO.cfg]
848 $_TARGETNAME configure ... FOO specific parameters
850 source [find target/BAR.cfg]
851 $_TARGETNAME configure ... BAR specific parameters
856 @subsection Tcl Variables Guide Line
857 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
859 Thus the rule we follow in OpenOCD is this: Variables that begin with
860 a leading underscore are temporary in nature, and can be modified and
861 used at will within a ?TARGET? configuration file.
863 @b{EXAMPLE:} The user should be able to do this:
867 # PXA270 #1 network side, big endian
868 # PXA270 #2 video side, little endian
872 source [find target/pxa270.cfg]
873 # variable: _TARGETNAME = network.cpu
874 # other commands can refer to the "network.cpu" tap.
875 $_TARGETNAME configure .... params for this CPU..
879 source [find target/pxa270.cfg]
880 # variable: _TARGETNAME = video.cpu
881 # other commands can refer to the "video.cpu" tap.
882 $_TARGETNAME configure .... params for this CPU..
886 source [find target/spartan3.cfg]
888 # Since $_TARGETNAME is temporal..
889 # these names still work!
890 network.cpu configure ... params
891 video.cpu configure ... params
895 @subsection Default Value Boiler Plate Code
897 All target configuration files should start with this (or a modified form)
901 if @{ [info exists CHIPNAME] @} @{
902 set _CHIPNAME $CHIPNAME
904 set _CHIPNAME sam7x256
907 if @{ [info exists ENDIAN] @} @{
913 if @{ [info exists CPUTAPID ] @} @{
914 set _CPUTAPID $CPUTAPID
916 set _CPUTAPID 0x3f0f0f0f
921 @subsection Creating Taps
922 After the ``defaults'' are choosen [see above] the taps are created.
924 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
928 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
929 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
934 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
937 @item @b{Unform tap names} - See: Tap Naming Convention
938 @item @b{_TARGETNAME} is created at the end where used.
942 if @{ [info exists FLASHTAPID ] @} @{
943 set _FLASHTAPID $FLASHTAPID
945 set _FLASHTAPID 0x25966041
947 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
949 if @{ [info exists CPUTAPID ] @} @{
950 set _CPUTAPID $CPUTAPID
952 set _CPUTAPID 0x25966041
954 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
957 if @{ [info exists BSTAPID ] @} @{
958 set _BSTAPID $BSTAPID
960 set _BSTAPID 0x1457f041
962 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
964 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
967 @b{Tap Naming Convention}
969 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
977 @item @b{unknownN} - it happens :-(
980 @subsection Reset Configuration
982 Some chips have specific ways the TRST and SRST signals are
983 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
984 @b{BOARD SPECIFIC} they go in the board file.
986 @subsection Work Areas
988 Work areas are small RAM areas used by OpenOCD to speed up downloads,
989 and to download small snippets of code to program flash chips.
991 If the chip includes a form of ``on-chip-ram'' - and many do - define
992 a reasonable work area and use the ``backup'' option.
994 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
995 inaccessible if/when the application code enables or disables the MMU.
997 @subsection ARM Core Specific Hacks
999 If the chip has a DCC, enable it. If the chip is an ARM9 with some
1000 special high speed download features - enable it.
1002 If the chip has an ARM ``vector catch'' feature - by default enable
1003 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
1004 user is really writing a handler for those situations - they can
1005 easily disable it. Experiance has shown the ``vector catch'' is
1006 helpful - for common programing errors.
1008 If present, the MMU, the MPU and the CACHE should be disabled.
1010 @subsection Internal Flash Configuration
1012 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
1014 @b{Never ever} in the ``target configuration file'' define any type of
1015 flash that is external to the chip. (For example the BOOT flash on
1016 Chip Select 0). The BOOT flash information goes in a board file - not
1017 the TARGET (chip) file.
1021 @item at91sam7x256 - has 256K flash YES enable it.
1022 @item str912 - has flash internal YES enable it.
1023 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1024 @item pxa270 - again - CS0 flash - it goes in the board file.
1028 @chapter About JIM-Tcl
1032 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1033 learn more about JIM here: @url{http://jim.berlios.de}
1036 @item @b{JIM vs. Tcl}
1037 @* JIM-TCL is a stripped down version of the well known Tcl language,
1038 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1039 fewer features. JIM-Tcl is a single .C file and a single .H file and
1040 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1041 4.2 MB .zip file containing 1540 files.
1043 @item @b{Missing Features}
1044 @* Our practice has been: Add/clone the real Tcl feature if/when
1045 needed. We welcome JIM Tcl improvements, not bloat.
1048 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1049 command interpreter today (28/nov/2008) is a mixture of (newer)
1050 JIM-Tcl commands, and (older) the orginal command interpreter.
1053 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1054 can type a Tcl for() loop, set variables, etc.
1056 @item @b{Historical Note}
1057 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1059 @item @b{Need a crash course in Tcl?}
1060 @* See: @xref{Tcl Crash Course}.
1064 @node Daemon Configuration
1065 @chapter Daemon Configuration
1066 The commands here are commonly found in the openocd.cfg file and are
1067 used to specify what TCP/IP ports are used, and how GDB should be
1071 This command terminates the configuration stage and
1072 enters the normal command mode. This can be useful to add commands to
1073 the startup scripts and commands such as resetting the target,
1074 programming flash, etc. To reset the CPU upon startup, add "init" and
1075 "reset" at the end of the config script or at the end of the OpenOCD
1076 command line using the @option{-c} command line switch.
1078 If this command does not appear in any startup/configuration file
1079 OpenOCD executes the command for you after processing all
1080 configuration files and/or command line options.
1082 @b{NOTE:} This command normally occurs at or near the end of your
1083 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1084 targets ready. For example: If your openocd.cfg file needs to
1085 read/write memory on your target - the init command must occur before
1086 the memory read/write commands.
1088 @section TCP/IP Ports
1090 @item @b{telnet_port} <@var{number}>
1092 @*Intended for a human. Port on which to listen for incoming telnet connections.
1094 @item @b{tcl_port} <@var{number}>
1096 @*Intended as a machine interface. Port on which to listen for
1097 incoming Tcl syntax. This port is intended as a simplified RPC
1098 connection that can be used by clients to issue commands and get the
1099 output from the Tcl engine.
1101 @item @b{gdb_port} <@var{number}>
1103 @*First port on which to listen for incoming GDB connections. The GDB port for the
1104 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1109 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1110 @cindex gdb_breakpoint_override
1111 @anchor{gdb_breakpoint_override}
1112 @*Force breakpoint type for gdb 'break' commands.
1113 The raison d'etre for this option is to support GDB GUI's without
1114 a hard/soft breakpoint concept where the default OpenOCD and
1115 GDB behaviour is not sufficient. Note that GDB will use hardware
1116 breakpoints if the memory map has been set up for flash regions.
1118 This option replaces older arm7_9 target commands that addressed
1121 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1123 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1124 Default behaviour is <@var{resume}>
1126 @item @b{gdb_memory_map} <@var{enable|disable}>
1127 @cindex gdb_memory_map
1128 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1129 requested. GDB will then know when to set hardware breakpoints, and program flash
1130 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1131 for flash programming to work.
1132 Default behaviour is <@var{enable}>
1133 @xref{gdb_flash_program}.
1135 @item @b{gdb_flash_program} <@var{enable|disable}>
1136 @cindex gdb_flash_program
1137 @anchor{gdb_flash_program}
1138 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1139 vFlash packet is received.
1140 Default behaviour is <@var{enable}>
1141 @comment END GDB Items
1144 @node Interface - Dongle Configuration
1145 @chapter Interface - Dongle Configuration
1146 Interface commands are normally found in an interface configuration
1147 file which is sourced by your openocd.cfg file. These commands tell
1148 OpenOCD what type of JTAG dongle you have and how to talk to it.
1149 @section Simple Complete Interface Examples
1150 @b{A Turtelizer FT2232 Based JTAG Dongle}
1154 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1155 ft2232_layout turtelizer2
1156 ft2232_vid_pid 0x0403 0xbdc8
1163 @b{A Raisonance RLink}
1172 parport_cable wiggler
1177 interface arm-jtag-ew
1179 @section Interface Command
1181 The interface command tells OpenOCD what type of JTAG dongle you are
1182 using. Depending on the type of dongle, you may need to have one or
1183 more additional commands.
1187 @item @b{interface} <@var{name}>
1189 @*Use the interface driver <@var{name}> to connect to the
1190 target. Currently supported interfaces are
1195 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1197 @item @b{amt_jtagaccel}
1198 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1202 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1203 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1204 platform. The libftdi uses libusb, and should be portable to all systems that provide
1208 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1211 @* ASIX PRESTO USB JTAG programmer.
1214 @* usbprog is a freely programmable USB adapter.
1217 @* Gateworks GW16012 JTAG programmer.
1220 @* Segger jlink USB adapter
1223 @* Raisonance RLink USB adapter
1226 @* vsllink is part of Versaloon which is a versatile USB programmer.
1228 @item @b{arm-jtag-ew}
1229 @* Olimex ARM-JTAG-EW USB adapter
1230 @comment - End parameters
1232 @comment - End Interface
1234 @subsection parport options
1237 @item @b{parport_port} <@var{number}>
1238 @cindex parport_port
1239 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1240 the @file{/dev/parport} device
1242 When using PPDEV to access the parallel port, use the number of the parallel port:
1243 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1244 you may encounter a problem.
1245 @item @b{parport_cable} <@var{name}>
1246 @cindex parport_cable
1247 @*The layout of the parallel port cable used to connect to the target.
1248 Currently supported cables are
1252 The original Wiggler layout, also supported by several clones, such
1253 as the Olimex ARM-JTAG
1256 Same as original wiggler except an led is fitted on D5.
1257 @item @b{wiggler_ntrst_inverted}
1258 @cindex wiggler_ntrst_inverted
1259 Same as original wiggler except TRST is inverted.
1260 @item @b{old_amt_wiggler}
1261 @cindex old_amt_wiggler
1262 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1263 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1266 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1267 program the Chameleon itself, not a connected target.
1270 The Xilinx Parallel cable III.
1273 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1274 This is also the layout used by the HollyGates design
1275 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1278 The ST Parallel cable.
1281 Same as original wiggler except SRST and TRST connections reversed and
1282 TRST is also inverted.
1285 Altium Universal JTAG cable.
1287 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1288 @cindex parport_write_on_exit
1289 @*This will configure the parallel driver to write a known value to the parallel
1290 interface on exiting OpenOCD
1293 @subsection amt_jtagaccel options
1295 @item @b{parport_port} <@var{number}>
1296 @cindex parport_port
1297 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1298 @file{/dev/parport} device
1300 @subsection ft2232 options
1303 @item @b{ft2232_device_desc} <@var{description}>
1304 @cindex ft2232_device_desc
1305 @*The USB device description of the FTDI FT2232 device. If not
1306 specified, the FTDI default value is used. This setting is only valid
1307 if compiled with FTD2XX support.
1309 @b{TODO:} Confirm the following: On Windows the name needs to end with
1310 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1311 this be added and when must it not be added? Why can't the code in the
1312 interface or in OpenOCD automatically add this if needed? -- Duane.
1314 @item @b{ft2232_serial} <@var{serial-number}>
1315 @cindex ft2232_serial
1316 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1318 @item @b{ft2232_layout} <@var{name}>
1319 @cindex ft2232_layout
1320 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1321 signals. Valid layouts are
1324 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1326 Amontec JTAGkey and JTAGkey-Tiny
1327 @item @b{signalyzer}
1329 @item @b{olimex-jtag}
1332 American Microsystems M5960
1333 @item @b{evb_lm3s811}
1334 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1335 SRST signals on external connector
1338 @item @b{stm32stick}
1339 Hitex STM32 Performance Stick
1340 @item @b{flyswatter}
1341 Tin Can Tools Flyswatter
1342 @item @b{turtelizer2}
1343 egnite Software turtelizer2
1346 @item @b{axm0432_jtag}
1350 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1351 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1352 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1354 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1356 @item @b{ft2232_latency} <@var{ms}>
1357 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1358 ft2232_read() fails to return the expected number of bytes. This can be caused by
1359 USB communication delays and has proved hard to reproduce and debug. Setting the
1360 FT2232 latency timer to a larger value increases delays for short USB packets but it
1361 also reduces the risk of timeouts before receiving the expected number of bytes.
1362 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1365 @subsection ep93xx options
1366 @cindex ep93xx options
1367 Currently, there are no options available for the ep93xx interface.
1371 @item @b{jtag_khz} <@var{reset speed kHz}>
1374 It is debatable if this command belongs here - or in a board
1375 configuration file. In fact, in some situations the JTAG speed is
1376 changed during the target initialisation process (i.e.: (1) slow at
1377 reset, (2) program the CPU clocks, (3) run fast)
1379 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1381 Not all interfaces support ``rtck''. If the interface device can not
1382 support the rate asked for, or can not translate from kHz to
1383 jtag_speed, then an error is returned.
1385 Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
1386 especially true for synthesized cores (-S). Also see RTCK.
1388 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1389 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1390 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1391 the specified frequency.
1394 # Fall back to 3mhz if RCLK is not supported
1398 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1400 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1401 speed. The actual effect of this option depends on the JTAG interface used.
1403 The speed used during reset can be adjusted using setting jtag_speed during
1404 pre_reset and post_reset events.
1407 @item wiggler: maximum speed / @var{number}
1408 @item ft2232: 6MHz / (@var{number}+1)
1409 @item amt jtagaccel: 8 / 2**@var{number}
1410 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1411 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1412 @comment end speed list.
1415 @comment END command list
1418 @node Reset Configuration
1419 @chapter Reset Configuration
1420 @cindex Reset Configuration
1422 Every system configuration may require a different reset
1423 configuration. This can also be quite confusing. Please see the
1424 various board files for example.
1426 @section jtag_nsrst_delay <@var{ms}>
1427 @cindex jtag_nsrst_delay
1428 @*How long (in milliseconds) OpenOCD should wait after deasserting
1429 nSRST before starting new JTAG operations.
1431 @section jtag_ntrst_delay <@var{ms}>
1432 @cindex jtag_ntrst_delay
1433 @*Same @b{jtag_nsrst_delay}, but for nTRST
1435 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1436 big resistor/capacitor, reset supervisor, or on-chip features). This
1437 keeps the signal asserted for some time after the external reset got
1440 @section reset_config
1442 @b{Note:} To maintainers and integrators: Where exactly the
1443 ``reset configuration'' goes is a good question. It touches several
1444 things at once. In the end, if you have a board file - the board file
1445 should define it and assume 100% that the DONGLE supports
1446 anything. However, that does not mean the target should not also make
1447 not of something the silicon vendor has done inside the
1448 chip. @i{Grr.... nothing is every pretty.}
1452 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1453 @item Every board is also slightly different; some boards tie TRST and SRST together.
1454 @item Every chip is slightly different; some chips internally tie the two signals together.
1455 @item Some may not implement all of the signals the same way.
1456 @item Some signals might be push-pull, others open-drain/collector.
1458 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1459 reset the TAP via TRST and send commands through the JTAG tap to halt
1460 the CPU at the reset vector before the 1st instruction is executed,
1461 and finally release the SRST signal.
1462 @*Depending on your board vendor, chip vendor, etc., these
1463 signals may have slightly different names.
1465 OpenOCD defines these signals in these terms:
1467 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1468 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1474 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1475 @cindex reset_config
1476 @* The @t{reset_config} command tells OpenOCD the reset configuration
1477 of your combination of Dongle, Board, and Chips.
1478 If the JTAG interface provides SRST, but the target doesn't connect
1479 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1480 be @option{none}, @option{trst_only}, @option{srst_only} or
1481 @option{trst_and_srst}.
1483 [@var{combination}] is an optional value specifying broken reset
1484 signal implementations. @option{srst_pulls_trst} states that the
1485 test logic is reset together with the reset of the system (e.g. Philips
1486 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1487 the system is reset together with the test logic (only hypothetical, I
1488 haven't seen hardware with such a bug, and can be worked around).
1489 @option{combined} implies both @option{srst_pulls_trst} and
1490 @option{trst_pulls_srst}. The default behaviour if no option given is
1493 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1494 driver type of the reset lines to be specified. Possible values are
1495 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1496 test reset signal, and @option{srst_open_drain} (default) and
1497 @option{srst_push_pull} for the system reset. These values only affect
1498 JTAG interfaces with support for different drivers, like the Amontec
1499 JTAGkey and JTAGAccelerator.
1501 @comment - end command
1507 @chapter Tap Creation
1508 @cindex tap creation
1509 @cindex tap configuration
1511 In order for OpenOCD to control a target, a JTAG tap must be
1514 Commands to create taps are normally found in a configuration file and
1515 are not normally typed by a human.
1517 When a tap is created a @b{dotted.name} is created for the tap. Other
1518 commands use that dotted.name to manipulate or refer to the tap.
1522 @item @b{Debug Target} A tap can be used by a GDB debug target
1523 @item @b{Flash Programing} Some chips program the flash via JTAG
1524 @item @b{Boundry Scan} Some chips support boundary scan.
1528 @section jtag newtap
1529 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1534 @cindex tap geometry
1536 @comment START options
1539 @* is a symbolic name of the chip.
1541 @* is a symbol name of a tap present on the chip.
1542 @item @b{Required configparams}
1543 @* Every tap has 3 required configparams, and several ``optional
1544 parameters'', the required parameters are:
1545 @comment START REQUIRED
1547 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1548 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1549 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1550 some devices, there are bits in the IR that aren't used. This lets you mask
1551 them off when doing comparisons. In general, this should just be all ones for
1553 @comment END REQUIRED
1555 An example of a FOOBAR Tap
1557 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1559 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1560 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1561 [6,4,2,0] are checked.
1563 @item @b{Optional configparams}
1564 @comment START Optional
1566 @item @b{-expected-id NUMBER}
1567 @* By default it is zero. If non-zero represents the
1568 expected tap ID used when the JTAG chain is examined. See below.
1571 @* By default not specified the tap is enabled. Some chips have a
1572 JTAG route controller (JRC) that is used to enable and/or disable
1573 specific JTAG taps. You can later enable or disable any JTAG tap via
1574 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1576 @comment END Optional
1579 @comment END OPTIONS
1582 @comment START NOTES
1584 @item @b{Technically}
1585 @* newtap is a sub command of the ``jtag'' command
1586 @item @b{Big Picture Background}
1587 @*GDB Talks to OpenOCD using the GDB protocol via
1588 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1589 control the JTAG chain on your board. Your board has one or more chips
1590 in a @i{daisy chain configuration}. Each chip may have one or more
1591 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1592 @item @b{NAME Rules}
1593 @*Names follow ``C'' symbol name rules (start with alpha ...)
1594 @item @b{TAPNAME - Conventions}
1596 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1597 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1598 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1599 @item @b{bs} - for boundary scan if this is a seperate tap.
1600 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1601 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1602 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1603 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1605 @item @b{DOTTED.NAME}
1606 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1607 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1608 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1609 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1610 numerous other places to refer to various taps.
1612 @* The order this command appears via the config files is
1614 @item @b{Multi Tap Example}
1615 @* This example is based on the ST Microsystems STR912. See the ST
1616 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1617 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1619 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1620 @*@b{checked: 28/nov/2008}
1622 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1623 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1624 tap which then connects to the TDI pin.
1628 # create tap: 'str912.flash'
1629 jtag newtap str912 flash ... params ...
1630 # create tap: 'str912.cpu'
1631 jtag newtap str912 cpu ... params ...
1632 # create tap: 'str912.bs'
1633 jtag newtap str912 bs ... params ...
1636 @item @b{Note: Deprecated} - Index Numbers
1637 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1638 feature is still present, however its use is highly discouraged and
1639 should not be counted upon.
1640 @item @b{Multiple chips}
1641 @* If your board has multiple chips, you should be
1642 able to @b{source} two configuration files, in the proper order, and
1643 have the taps created in the proper order.
1646 @comment at command level
1647 @comment DOCUMENT old command
1648 @section jtag_device - REMOVED
1650 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1654 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1655 by the ``jtag newtap'' command. The documentation remains here so that
1656 one can easily convert the old syntax to the new syntax. About the old
1657 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1658 ``irmask''. The new syntax requires named prefixes, and supports
1659 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1660 @b{jtag newtap} command for details.
1662 OLD: jtag_device 8 0x01 0xe3 0xfe
1663 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1666 @section Enable/Disable Taps
1667 @b{Note:} These commands are intended to be used as a machine/script
1668 interface. Humans might find the ``scan_chain'' command more helpful
1669 when querying the state of the JTAG taps.
1671 @b{By default, all taps are enabled}
1674 @item @b{jtag tapenable} @var{DOTTED.NAME}
1675 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1676 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1681 @cindex route controller
1683 These commands are used when your target has a JTAG route controller
1684 that effectively adds or removes a tap from the JTAG chain in a
1687 The ``standard way'' to remove a tap would be to place the tap in
1688 bypass mode. But with the advent of modern chips, this is not always a
1689 good solution. Some taps operate slowly, others operate fast, and
1690 there are other JTAG clock synchronisation problems one must face. To
1691 solve that problem, the JTAG route controller was introduced. Rather
1692 than ``bypass'' the tap, the tap is completely removed from the
1693 circuit and skipped.
1696 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1699 @item @b{Enabled - Not In ByPass} and has a variable bit length
1700 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1701 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1704 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1705 @b{Historical note:} this feature was added 28/nov/2008
1707 @b{jtag tapisenabled DOTTED.NAME}
1709 This command returns 1 if the named tap is currently enabled, 0 if not.
1710 This command exists so that scripts that manipulate a JRC (like the
1711 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1712 enabled or disabled.
1715 @node Target Configuration
1716 @chapter Target Configuration
1718 This chapter discusses how to create a GDB debug target. Before
1719 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1721 @section targets [NAME]
1722 @b{Note:} This command name is PLURAL - not singular.
1724 With NO parameter, this plural @b{targets} command lists all known
1725 targets in a human friendly form.
1727 With a parameter, this plural @b{targets} command sets the current
1728 target to the given name. (i.e.: If there are multiple debug targets)
1733 CmdName Type Endian ChainPos State
1734 -- ---------- ---------- ---------- -------- ----------
1735 0: target0 arm7tdmi little 0 halted
1738 @section target COMMANDS
1739 @b{Note:} This command name is SINGULAR - not plural. It is used to
1740 manipulate specific targets, to create targets and other things.
1742 Once a target is created, a TARGETNAME (object) command is created;
1743 see below for details.
1745 The TARGET command accepts these sub-commands:
1747 @item @b{create} .. parameters ..
1748 @* creates a new target, see below for details.
1750 @* Lists all supported target types (perhaps some are not yet in this document).
1752 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1754 foreach t [target names] {
1755 puts [format "Target: %s\n" $t]
1759 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1760 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1761 @item @b{number} @b{NUMBER}
1762 @* Internally OpenOCD maintains a list of targets - in numerical index
1763 (0..N-1) this command returns the name of the target at index N.
1766 set thename [target number $x]
1767 puts [format "Target %d is: %s\n" $x $thename]
1770 @* Returns the number of targets known to OpenOCD (see number above)
1773 set c [target count]
1774 for { set x 0 } { $x < $c } { incr x } {
1775 # Assuming you have created this function
1776 print_target_details $x
1782 @section TARGETNAME (object) commands
1783 @b{Use:} Once a target is created, an ``object name'' that represents the
1784 target is created. By convention, the target name is identical to the
1785 tap name. In a multiple target system, one can preceed many common
1786 commands with a specific target name and effect only that target.
1788 str912.cpu mww 0x1234 0x42
1789 omap3530.cpu mww 0x5555 123
1792 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1793 good example is a on screen button, once a button is created a button
1794 has a name (a path in Tk terms) and that name is useable as a 1st
1795 class command. For example in Tk, one can create a button and later
1796 configure it like this:
1800 button .foobar -background red -command @{ foo @}
1802 .foobar configure -foreground blue
1804 set x [.foobar cget -background]
1806 puts [format "The button is %s" $x]
1809 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1810 button. Commands available as a ``target object'' are:
1812 @comment START targetobj commands.
1814 @item @b{configure} - configure the target; see Target Config/Cget Options below
1815 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1816 @item @b{curstate} - current target state (running, halt, etc.
1818 @* Intended for a human to see/read the currently configure target events.
1819 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1820 @comment start memory
1830 @item @b{Memory To Array, Array To Memory}
1831 @* These are aimed at a machine interface to memory
1833 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1834 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1836 @* @b{ARRAYNAME} is the name of an array variable
1837 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1838 @* @b{ADDRESS} is the target memory address
1839 @* @b{COUNT} is the number of elements to process
1841 @item @b{Used during ``reset''}
1842 @* These commands are used internally by the OpenOCD scripts to deal
1843 with odd reset situations and are not documented here.
1845 @item @b{arp_examine}
1849 @item @b{arp_waitstate}
1851 @item @b{invoke-event} @b{EVENT-NAME}
1852 @* Invokes the specific event manually for the target
1855 @section Target Events
1856 At various times, certain things can happen, or you want them to happen.
1860 @item What should happen when GDB connects? Should your target reset?
1861 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1862 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1865 All of the above items are handled by target events.
1867 To specify an event action, either during target creation, or later
1868 via ``$_TARGETNAME configure'' see this example.
1870 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1871 target event name, and BODY is a Tcl procedure or string of commands
1874 The programmers model is the ``-command'' option used in Tcl/Tk
1875 buttons and events. Below are two identical examples, the first
1876 creates and invokes small procedure. The second inlines the procedure.
1879 proc my_attach_proc @{ @} @{
1883 mychip.cpu configure -event gdb-attach my_attach_proc
1884 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1887 @section Current Events
1888 The following events are available:
1890 @item @b{debug-halted}
1891 @* The target has halted for debug reasons (i.e.: breakpoint)
1892 @item @b{debug-resumed}
1893 @* The target has resumed (i.e.: gdb said run)
1894 @item @b{early-halted}
1895 @* Occurs early in the halt process
1896 @item @b{examine-end}
1897 @* Currently not used (goal: when JTAG examine completes)
1898 @item @b{examine-start}
1899 @* Currently not used (goal: when JTAG examine starts)
1900 @item @b{gdb-attach}
1901 @* When GDB connects
1902 @item @b{gdb-detach}
1903 @* When GDB disconnects
1905 @* When the taret has halted and GDB is not doing anything (see early halt)
1906 @item @b{gdb-flash-erase-start}
1907 @* Before the GDB flash process tries to erase the flash
1908 @item @b{gdb-flash-erase-end}
1909 @* After the GDB flash process has finished erasing the flash
1910 @item @b{gdb-flash-write-start}
1911 @* Before GDB writes to the flash
1912 @item @b{gdb-flash-write-end}
1913 @* After GDB writes to the flash
1915 @* Before the taret steps, gdb is trying to start/resume the target
1917 @* The target has halted
1918 @item @b{old-gdb_program_config}
1919 @* DO NOT USE THIS: Used internally
1920 @item @b{old-pre_resume}
1921 @* DO NOT USE THIS: Used internally
1922 @item @b{reset-assert-pre}
1923 @* Before reset is asserted on the tap.
1924 @item @b{reset-assert-post}
1925 @* Reset is now asserted on the tap.
1926 @item @b{reset-deassert-pre}
1927 @* Reset is about to be released on the tap
1928 @item @b{reset-deassert-post}
1929 @* Reset has been released on the tap
1931 @* Currently not used.
1932 @item @b{reset-halt-post}
1933 @* Currently not usd
1934 @item @b{reset-halt-pre}
1935 @* Currently not used
1936 @item @b{reset-init}
1937 @* Currently not used
1938 @item @b{reset-start}
1939 @* Currently not used
1940 @item @b{reset-wait-pos}
1941 @* Currently not used
1942 @item @b{reset-wait-pre}
1943 @* Currently not used
1944 @item @b{resume-start}
1945 @* Before any target is resumed
1946 @item @b{resume-end}
1947 @* After all targets have resumed
1951 @* Target has resumed
1952 @item @b{tap-enable}
1953 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1955 jtag configure DOTTED.NAME -event tap-enable @{
1960 @item @b{tap-disable}
1961 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1963 jtag configure DOTTED.NAME -event tap-disable @{
1964 puts "Disabling CPU"
1970 @section target create
1972 @cindex target creation
1975 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1977 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1978 @comment START params
1981 @* Is the name of the debug target. By convention it should be the tap
1982 DOTTED.NAME, this name is also used to create the target object
1985 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
1986 @comment START types
2003 @*PARAMs are various target configuration parameters. The following ones are mandatory:
2004 @comment START mandatory
2006 @item @b{-endian big|little}
2007 @item @b{-chain-position DOTTED.NAME}
2008 @comment end MANDATORY
2013 @section Target Config/Cget Options
2014 These options can be specified when the target is created, or later
2015 via the configure option or to query the target via cget.
2017 @item @b{-type} - returns the target type
2018 @item @b{-event NAME BODY} see Target events
2019 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
2020 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
2021 @item @b{-work-area-size [ADDRESS]} specify/set the work area
2022 @item @b{-work-area-backup [0|1]} does the work area get backed up
2023 @item @b{-endian [big|little]}
2024 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2025 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2029 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2030 set name [target number $x]
2031 set y [$name cget -endian]
2032 set z [$name cget -type]
2033 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2037 @section Target Variants
2040 @* Unknown (please write me)
2042 @* Unknown (please write me) (similar to arm7tdmi)
2044 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2045 This enables the hardware single-stepping support found on these
2050 @* None (this is also used as the ARM946)
2052 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2053 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2054 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2055 be detected and the normal reset behaviour used.
2057 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2059 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2061 @* Use variant @option{ejtag_srst} when debugging targets that do not
2062 provide a functional SRST line on the EJTAG connector. This causes
2063 OpenOCD to instead use an EJTAG software reset command to reset the
2064 processor. You still need to enable @option{srst} on the reset
2065 configuration command to enable OpenOCD hardware reset functionality.
2066 @comment END variants
2068 @section working_area - Command Removed
2069 @cindex working_area
2070 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2071 @* This documentation remains because there are existing scripts that
2072 still use this that need to be converted.
2074 working_area target# address size backup| [virtualaddress]
2076 @* The target# is a the 0 based target numerical index.
2078 This command specifies a working area for the debugger to use. This
2079 may be used to speed-up downloads to target memory and flash
2080 operations, or to perform otherwise unavailable operations (some
2081 coprocessor operations on ARM7/9 systems, for example). The last
2082 parameter decides whether the memory should be preserved
2083 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2084 possible, use a working_area that doesn't need to be backed up, as
2085 performing a backup slows down operation.
2087 @node Flash Configuration
2088 @chapter Flash programming
2089 @cindex Flash Configuration
2091 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2092 flash that a micro may boot from. Perhaps you, the reader, would like to
2093 contribute support for this.
2097 @item Configure via the command @b{flash bank}
2098 @* Normally this is done in a configuration file.
2099 @item Operate on the flash via @b{flash SOMECOMMAND}
2100 @* Often commands to manipulate the flash are typed by a human, or run
2101 via a script in some automated way. For example: To program the boot
2102 flash on your board.
2104 @* Flashing via GDB requires the flash be configured via ``flash
2105 bank'', and the GDB flash features be enabled. See the daemon
2106 configuration section for more details.
2109 @section Flash commands
2110 @cindex Flash commands
2111 @subsection flash banks
2114 @*List configured flash banks
2115 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2116 @subsection flash info
2117 @b{flash info} <@var{num}>
2119 @*Print info about flash bank <@option{num}>
2120 @subsection flash probe
2121 @b{flash probe} <@var{num}>
2123 @*Identify the flash, or validate the parameters of the configured flash. Operation
2124 depends on the flash type.
2125 @subsection flash erase_check
2126 @b{flash erase_check} <@var{num}>
2127 @cindex flash erase_check
2128 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2129 updates the erase state information displayed by @option{flash info}. That means you have
2130 to issue an @option{erase_check} command after erasing or programming the device to get
2131 updated information.
2132 @subsection flash protect_check
2133 @b{flash protect_check} <@var{num}>
2134 @cindex flash protect_check
2135 @*Check protection state of sectors in flash bank <num>.
2136 @option{flash erase_sector} using the same syntax.
2137 @subsection flash erase_sector
2138 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2139 @cindex flash erase_sector
2140 @anchor{flash erase_sector}
2141 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2142 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2143 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2145 @subsection flash erase_address
2146 @b{flash erase_address} <@var{address}> <@var{length}>
2147 @cindex flash erase_address
2148 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2149 @subsection flash write_bank
2150 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2151 @cindex flash write_bank
2152 @anchor{flash write_bank}
2153 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2154 <@option{offset}> bytes from the beginning of the bank.
2155 @subsection flash write_image
2156 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2157 @cindex flash write_image
2158 @anchor{flash write_image}
2159 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2160 [@var{offset}] can be specified and the file [@var{type}] can be specified
2161 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2162 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2163 if the @option{erase} parameter is given.
2164 @subsection flash protect
2165 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2166 @cindex flash protect
2167 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2168 <@var{last}> of @option{flash bank} <@var{num}>.
2170 @subsection mFlash commands
2171 @cindex mFlash commands
2173 @item @b{mflash probe}
2174 @cindex mflash probe
2176 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2177 @cindex mflash write
2178 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2179 <@var{offset}> bytes from the beginning of the bank.
2180 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2182 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2186 @section flash bank command
2187 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2190 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2191 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2194 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2195 and <@var{bus_width}> bytes using the selected flash <driver>.
2197 @subsection External Flash - cfi options
2199 CFI flashes are external flash chips - often they are connected to a
2200 specific chip select on the CPU. By default, at hard reset, most
2201 CPUs have the ablity to ``boot'' from some flash chip - typically
2202 attached to the CPU's CS0 pin.
2204 For other chip selects: OpenOCD does not know how to configure, or
2205 access a specific chip select. Instead you, the human, might need to
2206 configure additional chip selects via other commands (like: mww) , or
2207 perhaps configure a GPIO pin that controls the ``write protect'' pin
2210 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2211 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2212 @*CFI flashes require the number of the target they're connected to as an additional
2213 argument. The CFI driver makes use of a working area (specified for the target)
2214 to significantly speed up operation.
2216 @var{chip_width} and @var{bus_width} are specified in bytes.
2218 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2222 @subsection Internal Flash (Microcontrollers)
2223 @subsubsection lpc2000 options
2224 @cindex lpc2000 options
2226 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2227 <@var{clock}> [@var{calc_checksum}]
2228 @*LPC flashes don't require the chip and bus width to be specified. Additional
2229 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2230 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2231 of the target this flash belongs to (first is 0), the frequency at which the core
2232 is currently running (in kHz - must be an integral number), and the optional keyword
2233 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2237 @subsubsection at91sam7 options
2238 @cindex at91sam7 options
2240 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2241 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2242 reading the chip-id and type.
2244 @subsubsection str7 options
2245 @cindex str7 options
2247 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2248 @*variant can be either STR71x, STR73x or STR75x.
2250 @subsubsection str9 options
2251 @cindex str9 options
2253 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2254 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2256 str9x flash_config 0 4 2 0 0x80000
2258 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2260 @subsubsection str9 options (str9xpec driver)
2262 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2263 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2264 @option{enable_turbo} <@var{num>.}
2266 Only use this driver for locking/unlocking the device or configuring the option bytes.
2267 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2269 @subsubsection Stellaris (LM3Sxxx) options
2270 @cindex Stellaris (LM3Sxxx) options
2272 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2273 @*Stellaris flash plugin only require the @var{target#}.
2275 @subsubsection stm32x options
2276 @cindex stm32x options
2278 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2279 @*stm32x flash plugin only require the @var{target#}.
2281 @subsubsection aduc702x options
2282 @cindex aduc702x options
2284 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2285 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2287 @subsection mFlash Configuration
2288 @cindex mFlash Configuration
2289 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2290 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2292 @*Configures a mflash for <@var{soc}> host bank at
2293 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2294 order. Pin number format is dependent on host GPIO calling convention.
2295 If WP or DPD pin was not used, write -1. Currently, mflash bank
2296 support s3c2440 and pxa270.
2298 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2300 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2302 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2304 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2307 @section Microcontroller specific Flash Commands
2309 @subsection AT91SAM7 specific commands
2310 @cindex AT91SAM7 specific commands
2311 The flash configuration is deduced from the chip identification register. The flash
2312 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2313 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2314 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2315 that can be erased separatly. Only an EraseAll command is supported by the controller
2316 for each flash plane and this is called with
2318 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2319 @*bulk erase flash planes first_plane to last_plane.
2320 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2321 @cindex at91sam7 gpnvm
2322 @*set or clear a gpnvm bit for the processor
2325 @subsection STR9 specific commands
2326 @cindex STR9 specific commands
2327 @anchor{STR9 specific commands}
2328 These are flash specific commands when using the str9xpec driver.
2330 @item @b{str9xpec enable_turbo} <@var{num}>
2331 @cindex str9xpec enable_turbo
2332 @*enable turbo mode, will simply remove the str9 from the chain and talk
2333 directly to the embedded flash controller.
2334 @item @b{str9xpec disable_turbo} <@var{num}>
2335 @cindex str9xpec disable_turbo
2336 @*restore the str9 into JTAG chain.
2337 @item @b{str9xpec lock} <@var{num}>
2338 @cindex str9xpec lock
2339 @*lock str9 device. The str9 will only respond to an unlock command that will
2341 @item @b{str9xpec unlock} <@var{num}>
2342 @cindex str9xpec unlock
2343 @*unlock str9 device.
2344 @item @b{str9xpec options_read} <@var{num}>
2345 @cindex str9xpec options_read
2346 @*read str9 option bytes.
2347 @item @b{str9xpec options_write} <@var{num}>
2348 @cindex str9xpec options_write
2349 @*write str9 option bytes.
2352 Note: Before using the str9xpec driver here is some background info to help
2353 you better understand how the drivers works. OpenOCD has two flash drivers for
2357 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2358 flash programming as it is faster than the @option{str9xpec} driver.
2360 Direct programming @option{str9xpec} using the flash controller. This is an
2361 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2362 core does not need to be running to program using this flash driver. Typical use
2363 for this driver is locking/unlocking the target and programming the option bytes.
2366 Before we run any commands using the @option{str9xpec} driver we must first disable
2367 the str9 core. This example assumes the @option{str9xpec} driver has been
2368 configured for flash bank 0.
2370 # assert srst, we do not want core running
2371 # while accessing str9xpec flash driver
2373 # turn off target polling
2376 str9xpec enable_turbo 0
2378 str9xpec options_read 0
2379 # re-enable str9 core
2380 str9xpec disable_turbo 0
2384 The above example will read the str9 option bytes.
2385 When performing a unlock remember that you will not be able to halt the str9 - it
2386 has been locked. Halting the core is not required for the @option{str9xpec} driver
2387 as mentioned above, just issue the commands above manually or from a telnet prompt.
2389 @subsection STR9 configuration
2390 @cindex STR9 configuration
2392 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2393 <@var{BBADR}> <@var{NBBADR}>
2394 @cindex str9x flash_config
2395 @*Configure str9 flash controller.
2397 e.g. str9x flash_config 0 4 2 0 0x80000
2399 BBSR - Boot Bank Size register
2400 NBBSR - Non Boot Bank Size register
2401 BBADR - Boot Bank Start Address register
2402 NBBADR - Boot Bank Start Address register
2406 @subsection STR9 option byte configuration
2407 @cindex STR9 option byte configuration
2409 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2410 @cindex str9xpec options_cmap
2411 @*configure str9 boot bank.
2412 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2413 @cindex str9xpec options_lvdthd
2414 @*configure str9 lvd threshold.
2415 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2416 @cindex str9xpec options_lvdsel
2417 @*configure str9 lvd source.
2418 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2419 @cindex str9xpec options_lvdwarn
2420 @*configure str9 lvd reset warning source.
2423 @subsection STM32x specific commands
2424 @cindex STM32x specific commands
2426 These are flash specific commands when using the stm32x driver.
2428 @item @b{stm32x lock} <@var{num}>
2430 @*lock stm32 device.
2431 @item @b{stm32x unlock} <@var{num}>
2432 @cindex stm32x unlock
2433 @*unlock stm32 device.
2434 @item @b{stm32x options_read} <@var{num}>
2435 @cindex stm32x options_read
2436 @*read stm32 option bytes.
2437 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2438 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2439 @cindex stm32x options_write
2440 @*write stm32 option bytes.
2441 @item @b{stm32x mass_erase} <@var{num}>
2442 @cindex stm32x mass_erase
2443 @*mass erase flash memory.
2446 @subsection Stellaris specific commands
2447 @cindex Stellaris specific commands
2449 These are flash specific commands when using the Stellaris driver.
2451 @item @b{stellaris mass_erase} <@var{num}>
2452 @cindex stellaris mass_erase
2453 @*mass erase flash memory.
2456 @node General Commands
2457 @chapter General Commands
2460 The commands documented in this chapter here are common commands that
2461 you, as a human, may want to type and see the output of. Configuration type
2462 commands are documented elsewhere.
2466 @item @b{Source Of Commands}
2467 @* OpenOCD commands can occur in a configuration script (discussed
2468 elsewhere) or typed manually by a human or supplied programatically,
2469 or via one of several TCP/IP Ports.
2471 @item @b{From the human}
2472 @* A human should interact with the telnet interface (default port: 4444,
2473 or via GDB, default port 3333)
2475 To issue commands from within a GDB session, use the @option{monitor}
2476 command, e.g. use @option{monitor poll} to issue the @option{poll}
2477 command. All output is relayed through the GDB session.
2479 @item @b{Machine Interface}
2480 The Tcl interface's intent is to be a machine interface. The default Tcl
2485 @section Daemon Commands
2487 @subsection sleep [@var{msec}]
2489 @*Wait for n milliseconds before resuming. Useful in connection with script files
2490 (@var{script} command and @var{target_script} configuration).
2492 @subsection shutdown
2494 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2496 @subsection debug_level [@var{n}]
2498 @anchor{debug_level}
2499 @*Display or adjust debug level to n<0-3>
2501 @subsection fast [@var{enable|disable}]
2503 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2504 downloads and fast memory access will work if the JTAG interface isn't too fast and
2505 the core doesn't run at a too low frequency. Note that this option only changes the default
2506 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2509 The target specific "dangerous" optimisation tweaking options may come and go
2510 as more robust and user friendly ways are found to ensure maximum throughput
2511 and robustness with a minimum of configuration.
2513 Typically the "fast enable" is specified first on the command line:
2516 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2519 @subsection log_output <@var{file}>
2521 @*Redirect logging to <file> (default: stderr)
2523 @subsection script <@var{file}>
2525 @*Execute commands from <file>
2526 See also: ``source [find FILENAME]''
2528 @section Target state handling
2529 @subsection power <@var{on}|@var{off}>
2531 @*Turn power switch to target on/off.
2532 No arguments: print status.
2533 Not all interfaces support this.
2535 @subsection reg [@option{#}|@option{name}] [value]
2537 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2538 No arguments: list all available registers for the current target.
2539 Number or name argument: display a register.
2540 Number or name and value arguments: set register value.
2542 @subsection poll [@option{on}|@option{off}]
2544 @*Poll the target for its current state. If the target is in debug mode, architecture
2545 specific information about the current state is printed. An optional parameter
2546 allows continuous polling to be enabled and disabled.
2548 @subsection halt [@option{ms}]
2550 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2551 Default [@option{ms}] is 5 seconds if no arg given.
2552 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2553 will stop OpenOCD from waiting.
2555 @subsection wait_halt [@option{ms}]
2557 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2558 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2561 @subsection resume [@var{address}]
2563 @*Resume the target at its current code position, or at an optional address.
2564 OpenOCD will wait 5 seconds for the target to resume.
2566 @subsection step [@var{address}]
2568 @*Single-step the target at its current code position, or at an optional address.
2570 @subsection reset [@option{run}|@option{halt}|@option{init}]
2572 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2574 With no arguments a "reset run" is executed
2578 @*Let the target run.
2581 @*Immediately halt the target (works only with certain configurations).
2584 @*Immediately halt the target, and execute the reset script (works only with certain
2588 @subsection soft_reset_halt
2590 @*Requesting target halt and executing a soft reset. This is often used
2591 when a target cannot be reset and halted. The target, after reset is
2592 released begins to execute code. OpenOCD attempts to stop the CPU and
2593 then sets the program counter back to the reset vector. Unfortunately
2594 the code that was executed may have left the hardware in an unknown
2598 @section Memory access commands
2600 display available RAM memory.
2601 @subsection Memory peek/poke type commands
2602 These commands allow accesses of a specific size to the memory
2603 system. Often these are used to configure the current target in some
2604 special way. For example - one may need to write certian values to the
2605 SDRAM controller to enable SDRAM.
2608 @item To change the current target see the ``targets'' (plural) command
2609 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2613 @item @b{mdw} <@var{addr}> [@var{count}]
2615 @*display memory words (32bit)
2616 @item @b{mdh} <@var{addr}> [@var{count}]
2618 @*display memory half-words (16bit)
2619 @item @b{mdb} <@var{addr}> [@var{count}]
2621 @*display memory bytes (8bit)
2622 @item @b{mww} <@var{addr}> <@var{value}>
2624 @*write memory word (32bit)
2625 @item @b{mwh} <@var{addr}> <@var{value}>
2627 @*write memory half-word (16bit)
2628 @item @b{mwb} <@var{addr}> <@var{value}>
2630 @*write memory byte (8bit)
2633 @section Image loading commands
2634 @subsection load_image
2635 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2638 @*Load image <@var{file}> to target memory at <@var{address}>
2639 @subsection fast_load_image
2640 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2641 @cindex fast_load_image
2642 @anchor{fast_load_image}
2643 @*Normally you should be using @b{load_image} or GDB load. However, for
2644 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2645 host), storing the image in memory and uploading the image to the target
2646 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2647 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2648 memory, i.e. does not affect target. This approach is also useful when profiling
2649 target programming performance as I/O and target programming can easily be profiled
2651 @subsection fast_load
2655 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2656 @subsection dump_image
2657 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2660 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2661 (binary) <@var{file}>.
2662 @subsection verify_image
2663 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2664 @cindex verify_image
2665 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2666 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2669 @section Breakpoint commands
2670 @cindex Breakpoint commands
2672 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2674 @*set breakpoint <address> <length> [hw]
2675 @item @b{rbp} <@var{addr}>
2677 @*remove breakpoint <adress>
2678 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2680 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2681 @item @b{rwp} <@var{addr}>
2683 @*remove watchpoint <adress>
2686 @section Misc Commands
2687 @cindex Other Target Commands
2689 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2691 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2695 @section Target Specific Commands
2696 @cindex Target Specific Commands
2700 @section Architecture Specific Commands
2701 @cindex Architecture Specific Commands
2703 @subsection ARMV4/5 specific commands
2704 @cindex ARMV4/5 specific commands
2706 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2707 or Intel XScale (XScale isn't supported yet).
2709 @item @b{armv4_5 reg}
2711 @*Display a list of all banked core registers, fetching the current value from every
2712 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2714 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2715 @cindex armv4_5 core_mode
2716 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2717 The target is resumed in the currently set @option{core_mode}.
2720 @subsection ARM7/9 specific commands
2721 @cindex ARM7/9 specific commands
2723 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2724 ARM920T or ARM926EJ-S.
2726 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2727 @cindex arm7_9 dbgrq
2728 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2729 safe for all but ARM7TDMI--S cores (like Philips LPC).
2730 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2731 @cindex arm7_9 fast_memory_access
2732 @anchor{arm7_9 fast_memory_access}
2733 @*Allow OpenOCD to read and write memory without checking completion of
2734 the operation. This provides a huge speed increase, especially with USB JTAG
2735 cables (FT2232), but might be unsafe if used with targets running at very low
2736 speeds, like the 32kHz startup clock of an AT91RM9200.
2737 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2738 @cindex arm7_9 dcc_downloads
2739 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2740 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2741 unsafe, especially with targets running at very low speeds. This command was introduced
2742 with OpenOCD rev. 60.
2745 @subsection ARM720T specific commands
2746 @cindex ARM720T specific commands
2749 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2750 @cindex arm720t cp15
2751 @*display/modify cp15 register <@option{num}> [@option{value}].
2752 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2753 @cindex arm720t md<bhw>_phys
2754 @*Display memory at physical address addr.
2755 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2756 @cindex arm720t mw<bhw>_phys
2757 @*Write memory at physical address addr.
2758 @item @b{arm720t virt2phys} <@var{va}>
2759 @cindex arm720t virt2phys
2760 @*Translate a virtual address to a physical address.
2763 @subsection ARM9TDMI specific commands
2764 @cindex ARM9TDMI specific commands
2767 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2768 @cindex arm9tdmi vector_catch
2769 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2770 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2771 @option{irq} @option{fiq}.
2773 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2776 @subsection ARM966E specific commands
2777 @cindex ARM966E specific commands
2780 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2781 @cindex arm966e cp15
2782 @*display/modify cp15 register <@option{num}> [@option{value}].
2785 @subsection ARM920T specific commands
2786 @cindex ARM920T specific commands
2789 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2790 @cindex arm920t cp15
2791 @*display/modify cp15 register <@option{num}> [@option{value}].
2792 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2793 @cindex arm920t cp15i
2794 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2795 @item @b{arm920t cache_info}
2796 @cindex arm920t cache_info
2797 @*Print information about the caches found. This allows to see whether your target
2798 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2799 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2800 @cindex arm920t md<bhw>_phys
2801 @*Display memory at physical address addr.
2802 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2803 @cindex arm920t mw<bhw>_phys
2804 @*Write memory at physical address addr.
2805 @item @b{arm920t read_cache} <@var{filename}>
2806 @cindex arm920t read_cache
2807 @*Dump the content of ICache and DCache to a file.
2808 @item @b{arm920t read_mmu} <@var{filename}>
2809 @cindex arm920t read_mmu
2810 @*Dump the content of the ITLB and DTLB to a file.
2811 @item @b{arm920t virt2phys} <@var{va}>
2812 @cindex arm920t virt2phys
2813 @*Translate a virtual address to a physical address.
2816 @subsection ARM926EJ-S specific commands
2817 @cindex ARM926EJ-S specific commands
2820 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2821 @cindex arm926ejs cp15
2822 @*display/modify cp15 register <@option{num}> [@option{value}].
2823 @item @b{arm926ejs cache_info}
2824 @cindex arm926ejs cache_info
2825 @*Print information about the caches found.
2826 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2827 @cindex arm926ejs md<bhw>_phys
2828 @*Display memory at physical address addr.
2829 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2830 @cindex arm926ejs mw<bhw>_phys
2831 @*Write memory at physical address addr.
2832 @item @b{arm926ejs virt2phys} <@var{va}>
2833 @cindex arm926ejs virt2phys
2834 @*Translate a virtual address to a physical address.
2837 @subsection CORTEX_M3 specific commands
2838 @cindex CORTEX_M3 specific commands
2841 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2842 @cindex cortex_m3 maskisr
2843 @*Enable masking (disabling) interrupts during target step/resume.
2847 @section Debug commands
2848 @cindex Debug commands
2849 The following commands give direct access to the core, and are most likely
2850 only useful while debugging OpenOCD.
2852 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2853 @cindex arm7_9 write_xpsr
2854 @*Immediately write either the current program status register (CPSR) or the saved
2855 program status register (SPSR), without changing the register cache (as displayed
2856 by the @option{reg} and @option{armv4_5 reg} commands).
2857 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2858 <@var{0=cpsr},@var{1=spsr}>
2859 @cindex arm7_9 write_xpsr_im8
2860 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2861 operation (similar to @option{write_xpsr}).
2862 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2863 @cindex arm7_9 write_core_reg
2864 @*Write a core register, without changing the register cache (as displayed by the
2865 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2866 encoding of the [M4:M0] bits of the PSR.
2869 @section Target Requests
2870 @cindex Target Requests
2871 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2872 See libdcc in the contrib dir for more details.
2874 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2875 @cindex target_request debugmsgs
2876 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2880 @chapter JTAG Commands
2881 @cindex JTAG Commands
2882 Generally most people will not use the bulk of these commands. They
2883 are mostly used by the OpenOCD developers or those who need to
2884 directly manipulate the JTAG taps.
2886 In general these commands control JTAG taps at a very low level. For
2887 example if you need to control a JTAG Route Controller (i.e.: the
2888 OMAP3530 on the Beagle Board has one) you might use these commands in
2889 a script or an event procedure.
2893 @item @b{scan_chain}
2895 @*Print current scan chain configuration.
2896 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2898 @*Toggle reset lines.
2899 @item @b{endstate} <@var{tap_state}>
2901 @*Finish JTAG operations in <@var{tap_state}>.
2902 @item @b{runtest} <@var{num_cycles}>
2904 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2905 @item @b{statemove} [@var{tap_state}]
2907 @*Move to current endstate or [@var{tap_state}]
2908 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2910 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2911 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2913 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2914 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2915 @cindex verify_ircapture
2916 @*Verify value captured during Capture-IR. Default is enabled.
2917 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2919 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2920 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2922 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2927 Available tap_states are:
2967 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
2968 be used to access files on PCs (either the developer's PC or some other PC).
2970 The way this works on the ZY1000 is to prefix a filename by
2971 "/tftp/ip/" and append the TFTP path on the TFTP
2972 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2973 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2974 if the file was hosted on the embedded host.
2976 In order to achieve decent performance, you must choose a TFTP server
2977 that supports a packet size bigger than the default packet size (512 bytes). There
2978 are numerous TFTP servers out there (free and commercial) and you will have to do
2979 a bit of googling to find something that fits your requirements.
2981 @node Sample Scripts
2982 @chapter Sample Scripts
2985 This page shows how to use the Target Library.
2987 The configuration script can be divided into the following sections:
2989 @item Daemon configuration
2991 @item JTAG scan chain
2992 @item Target configuration
2993 @item Flash configuration
2996 Detailed information about each section can be found at OpenOCD configuration.
2998 @section AT91R40008 example
2999 @cindex AT91R40008 example
3000 To start OpenOCD with a target script for the AT91R40008 CPU and reset
3001 the CPU upon startup of the OpenOCD daemon.
3003 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
3007 @node GDB and OpenOCD
3008 @chapter GDB and OpenOCD
3009 @cindex GDB and OpenOCD
3010 OpenOCD complies with the remote gdbserver protocol, and as such can be used
3011 to debug remote targets.
3013 @section Connecting to GDB
3014 @cindex Connecting to GDB
3015 @anchor{Connecting to GDB}
3016 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
3017 instance GDB 6.3 has a known bug that produces bogus memory access
3018 errors, which has since been fixed: look up 1836 in
3019 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
3021 @*OpenOCD can communicate with GDB in two ways:
3024 A socket (TCP/IP) connection is typically started as follows:
3026 target remote localhost:3333
3028 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3030 A pipe connection is typically started as follows:
3032 target remote | openocd --pipe
3034 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3035 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3039 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3042 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3043 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3044 packet size and the device's memory map.
3046 Previous versions of OpenOCD required the following GDB options to increase
3047 the packet size and speed up GDB communication:
3049 set remote memory-write-packet-size 1024
3050 set remote memory-write-packet-size fixed
3051 set remote memory-read-packet-size 1024
3052 set remote memory-read-packet-size fixed
3054 This is now handled in the @option{qSupported} PacketSize and should not be required.
3056 @section Programming using GDB
3057 @cindex Programming using GDB
3059 By default the target memory map is sent to GDB. This can be disabled by
3060 the following OpenOCD configuration option:
3062 gdb_memory_map disable
3064 For this to function correctly a valid flash configuration must also be set
3065 in OpenOCD. For faster performance you should also configure a valid
3068 Informing GDB of the memory map of the target will enable GDB to protect any
3069 flash areas of the target and use hardware breakpoints by default. This means
3070 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3071 using a memory map. @xref{gdb_breakpoint_override}.
3073 To view the configured memory map in GDB, use the GDB command @option{info mem}
3074 All other unassigned addresses within GDB are treated as RAM.
3076 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3077 This can be changed to the old behaviour by using the following GDB command
3079 set mem inaccessible-by-default off
3082 If @option{gdb_flash_program enable} is also used, GDB will be able to
3083 program any flash memory using the vFlash interface.
3085 GDB will look at the target memory map when a load command is given, if any
3086 areas to be programmed lie within the target flash area the vFlash packets
3089 If the target needs configuring before GDB programming, an event
3090 script can be executed:
3092 $_TARGETNAME configure -event EVENTNAME BODY
3095 To verify any flash programming the GDB command @option{compare-sections}
3098 @node Tcl Scripting API
3099 @chapter Tcl Scripting API
3100 @cindex Tcl Scripting API
3104 The commands are stateless. E.g. the telnet command line has a concept
3105 of currently active target, the Tcl API proc's take this sort of state
3106 information as an argument to each proc.
3108 There are three main types of return values: single value, name value
3109 pair list and lists.
3111 Name value pair. The proc 'foo' below returns a name/value pair
3117 > set foo(you) Oyvind
3118 > set foo(mouse) Micky
3119 > set foo(duck) Donald
3127 me Duane you Oyvind mouse Micky duck Donald
3129 Thus, to get the names of the associative array is easy:
3131 foreach { name value } [set foo] {
3132 puts "Name: $name, Value: $value"
3136 Lists returned must be relatively small. Otherwise a range
3137 should be passed in to the proc in question.
3139 @section Internal low-level Commands
3141 By low-level, the intent is a human would not directly use these commands.
3143 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3144 is the low level API upon which "flash banks" is implemented.
3147 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3149 Read memory and return as a Tcl array for script processing
3150 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3152 Convert a Tcl array to memory locations and write the values
3153 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3155 Return information about the flash banks
3158 OpenOCD commands can consist of two words, e.g. "flash banks". The
3159 startup.tcl "unknown" proc will translate this into a Tcl proc
3160 called "flash_banks".
3162 @section OpenOCD specific Global Variables
3166 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3167 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3168 holds one of the following values:
3171 @item @b{winxx} Built using Microsoft Visual Studio
3172 @item @b{linux} Linux is the underlying operating sytem
3173 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3174 @item @b{cygwin} Running under Cygwin
3175 @item @b{mingw32} Running under MingW32
3176 @item @b{other} Unknown, none of the above.
3179 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3182 @chapter Deprecated/Removed Commands
3183 @cindex Deprecated/Removed Commands
3184 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3187 @item @b{arm7_9 fast_writes}
3188 @cindex arm7_9 fast_writes
3189 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3190 @item @b{arm7_9 force_hw_bkpts}
3191 @cindex arm7_9 force_hw_bkpts
3192 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3193 for flash if the GDB memory map has been set up(default when flash is declared in
3194 target configuration). @xref{gdb_breakpoint_override}.
3195 @item @b{arm7_9 sw_bkpts}
3196 @cindex arm7_9 sw_bkpts
3197 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3198 @item @b{daemon_startup}
3199 @cindex daemon_startup
3200 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3201 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3202 and @option{target cortex_m3 little reset_halt 0}.
3203 @item @b{dump_binary}
3205 @*use @option{dump_image} command with same args. @xref{dump_image}.
3206 @item @b{flash erase}
3208 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3209 @item @b{flash write}
3211 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3212 @item @b{flash write_binary}
3213 @cindex flash write_binary
3214 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3215 @item @b{flash auto_erase}
3216 @cindex flash auto_erase
3217 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3218 @item @b{load_binary}
3220 @*use @option{load_image} command with same args. @xref{load_image}.
3221 @item @b{run_and_halt_time}
3222 @cindex run_and_halt_time
3223 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3230 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3232 @*use the create subcommand of @option{target}.
3233 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3234 @cindex target_script
3235 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3236 @item @b{working_area}
3237 @cindex working_area
3238 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3245 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3247 @cindex adaptive clocking
3250 In digital circuit design it is often refered to as ``clock
3251 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3252 operating at some speed, your target is operating at another. The two
3253 clocks are not synchronised, they are ``asynchronous''
3255 In order for the two to work together they must be synchronised. Otherwise
3256 the two systems will get out of sync with each other and nothing will
3257 work. There are 2 basic options:
3260 Use a special circuit.
3262 One clock must be some multiple slower than the other.
3265 @b{Does this really matter?} For some chips and some situations, this
3266 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3267 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3268 program/enable the oscillators and eventually the main clock. It is in
3269 those critical times you must slow the JTAG clock to sometimes 1 to
3272 Imagine debugging a 500MHz ARM926 hand held battery powered device
3273 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3276 @b{Solution #1 - A special circuit}
3278 In order to make use of this, your JTAG dongle must support the RTCK
3279 feature. Not all dongles support this - keep reading!
3281 The RTCK signal often found in some ARM chips is used to help with
3282 this problem. ARM has a good description of the problem described at
3283 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3284 28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
3285 work? / how does adaptive clocking work?''.
3287 The nice thing about adaptive clocking is that ``battery powered hand
3288 held device example'' - the adaptiveness works perfectly all the
3289 time. One can set a break point or halt the system in the deep power
3290 down code, slow step out until the system speeds up.
3292 @b{Solution #2 - Always works - but may be slower}
3294 Often this is a perfectly acceptable solution.
3296 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3297 the target clock speed. But what that ``magic division'' is varies
3298 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3299 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3300 1/12 the clock speed.
3302 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3304 You can still debug the 'low power' situations - you just need to
3305 manually adjust the clock speed at every step. While painful and
3306 tedious, it is not always practical.
3308 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3309 have a special debug mode in your application that does a ``high power
3310 sleep''. If you are careful - 98% of your problems can be debugged
3313 To set the JTAG frequency use the command:
3321 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3323 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3324 around Windows filenames.
3337 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3339 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3340 claims to come with all the necessary DLLs. When using Cygwin, try launching
3341 OpenOCD from the Cygwin shell.
3343 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3344 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3345 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3347 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3348 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3349 software breakpoints consume one of the two available hardware breakpoints.
3351 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3353 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3354 clock at the time you're programming the flash. If you've specified the crystal's
3355 frequency, make sure the PLL is disabled. If you've specified the full core speed
3356 (e.g. 60MHz), make sure the PLL is enabled.
3358 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3359 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3360 out while waiting for end of scan, rtck was disabled".
3362 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3363 settings in your PC BIOS (ECP, EPP, and different versions of those).
3365 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3366 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3367 memory read caused data abort".
3369 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3370 beyond the last valid frame. It might be possible to prevent this by setting up
3371 a proper "initial" stack frame, if you happen to know what exactly has to
3372 be done, feel free to add this here.
3374 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3375 stack before calling main(). What GDB is doing is ``climbing'' the run
3376 time stack by reading various values on the stack using the standard
3377 call frame for the target. GDB keeps going - until one of 2 things
3378 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3379 stackframes have been processed. By pushing zeros on the stack, GDB
3382 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3383 your C code, do the same - artifically push some zeros onto the stack,
3384 remember to pop them off when the ISR is done.
3386 @b{Also note:} If you have a multi-threaded operating system, they
3387 often do not @b{in the intrest of saving memory} waste these few
3391 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3392 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3394 This warning doesn't indicate any serious problem, as long as you don't want to
3395 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3396 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3397 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3398 independently. With this setup, it's not possible to halt the core right out of
3399 reset, everything else should work fine.
3401 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3402 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3403 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3404 quit with an error message. Is there a stability issue with OpenOCD?
3406 No, this is not a stability issue concerning OpenOCD. Most users have solved
3407 this issue by simply using a self-powered USB hub, which they connect their
3408 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3409 supply stable enough for the Amontec JTAGkey to be operated.
3411 @b{Laptops running on battery have this problem too...}
3413 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3414 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3415 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3416 What does that mean and what might be the reason for this?
3418 First of all, the reason might be the USB power supply. Try using a self-powered
3419 hub instead of a direct connection to your computer. Secondly, the error code 4
3420 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3421 chip ran into some sort of error - this points us to a USB problem.
3423 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3424 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3425 What does that mean and what might be the reason for this?
3427 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3428 has closed the connection to OpenOCD. This might be a GDB issue.
3430 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3431 are described, there is a parameter for specifying the clock frequency
3432 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3433 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3434 specified in kilohertz. However, I do have a quartz crystal of a
3435 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3436 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3439 No. The clock frequency specified here must be given as an integral number.
3440 However, this clock frequency is used by the In-Application-Programming (IAP)
3441 routines of the LPC2000 family only, which seems to be very tolerant concerning
3442 the given clock frequency, so a slight difference between the specified clock
3443 frequency and the actual clock frequency will not cause any trouble.
3445 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3447 Well, yes and no. Commands can be given in arbitrary order, yet the
3448 devices listed for the JTAG scan chain must be given in the right
3449 order (jtag newdevice), with the device closest to the TDO-Pin being
3450 listed first. In general, whenever objects of the same type exist
3451 which require an index number, then these objects must be given in the
3452 right order (jtag newtap, targets and flash banks - a target
3453 references a jtag newtap and a flash bank references a target).
3455 You can use the ``scan_chain'' command to verify and display the tap order.
3457 @item @b{JTAG Tap Order} JTAG tap order - command order
3459 Many newer devices have multiple JTAG taps. For example: ST
3460 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3461 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3462 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3463 connected to the boundary scan tap, which then connects to the
3464 Cortex-M3 tap, which then connects to the TDO pin.
3466 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3467 (2) The boundary scan tap. If your board includes an additional JTAG
3468 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3469 place it before or after the STM32 chip in the chain. For example:
3472 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3473 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3474 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3475 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3476 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3479 The ``jtag device'' commands would thus be in the order shown below. Note:
3482 @item jtag newtap Xilinx tap -irlen ...
3483 @item jtag newtap stm32 cpu -irlen ...
3484 @item jtag newtap stm32 bs -irlen ...
3485 @item # Create the debug target and say where it is
3486 @item target create stm32.cpu -chain-position stm32.cpu ...
3490 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3491 log file, I can see these error messages: Error: arm7_9_common.c:561
3492 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3498 @node Tcl Crash Course
3499 @chapter Tcl Crash Course
3502 Not everyone knows Tcl - this is not intended to be a replacement for
3503 learning Tcl, the intent of this chapter is to give you some idea of
3504 how the Tcl scripts work.
3506 This chapter is written with two audiences in mind. (1) OpenOCD users
3507 who need to understand a bit more of how JIM-Tcl works so they can do
3508 something useful, and (2) those that want to add a new command to
3511 @section Tcl Rule #1
3512 There is a famous joke, it goes like this:
3514 @item Rule #1: The wife is always correct
3515 @item Rule #2: If you think otherwise, See Rule #1
3518 The Tcl equal is this:
3521 @item Rule #1: Everything is a string
3522 @item Rule #2: If you think otherwise, See Rule #1
3525 As in the famous joke, the consequences of Rule #1 are profound. Once
3526 you understand Rule #1, you will understand Tcl.
3528 @section Tcl Rule #1b
3529 There is a second pair of rules.
3531 @item Rule #1: Control flow does not exist. Only commands
3532 @* For example: the classic FOR loop or IF statement is not a control
3533 flow item, they are commands, there is no such thing as control flow
3535 @item Rule #2: If you think otherwise, See Rule #1
3536 @* Actually what happens is this: There are commands that by
3537 convention, act like control flow key words in other languages. One of
3538 those commands is the word ``for'', another command is ``if''.
3541 @section Per Rule #1 - All Results are strings
3542 Every Tcl command results in a string. The word ``result'' is used
3543 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3544 Everything is a string}
3546 @section Tcl Quoting Operators
3547 In life of a Tcl script, there are two important periods of time, the
3548 difference is subtle.
3551 @item Evaluation Time
3554 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3555 three primary quoting constructs, the [square-brackets] the
3556 @{curly-braces@} and ``double-quotes''
3558 By now you should know $VARIABLES always start with a $DOLLAR
3559 sign. BTW: To set a variable, you actually use the command ``set'', as
3560 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3561 = 1'' statement, but without the equal sign.
3564 @item @b{[square-brackets]}
3565 @* @b{[square-brackets]} are command substitutions. It operates much
3566 like Unix Shell `back-ticks`. The result of a [square-bracket]
3567 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3568 string}. These two statements are roughly identical:
3572 echo "The Date is: $X"
3575 puts "The Date is: $X"
3577 @item @b{``double-quoted-things''}
3578 @* @b{``double-quoted-things''} are just simply quoted
3579 text. $VARIABLES and [square-brackets] are expanded in place - the
3580 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3584 puts "It is now \"[date]\", $x is in 1 hour"
3586 @item @b{@{Curly-Braces@}}
3587 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3588 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3589 'single-quote' operators in BASH shell scripts, with the added
3590 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3591 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3592 28/nov/2008, Jim/OpenOCD does not have a date command.
3595 @section Consequences of Rule 1/2/3/4
3597 The consequences of Rule 1 are profound.
3599 @subsection Tokenisation & Execution.
3601 Of course, whitespace, blank lines and #comment lines are handled in
3604 As a script is parsed, each (multi) line in the script file is
3605 tokenised and according to the quoting rules. After tokenisation, that
3606 line is immedatly executed.
3608 Multi line statements end with one or more ``still-open''
3609 @{curly-braces@} which - eventually - closes a few lines later.
3611 @subsection Command Execution
3613 Remember earlier: There are no ``control flow''
3614 statements in Tcl. Instead there are COMMANDS that simply act like
3615 control flow operators.
3617 Commands are executed like this:
3620 @item Parse the next line into (argc) and (argv[]).
3621 @item Look up (argv[0]) in a table and call its function.
3622 @item Repeat until End Of File.
3625 It sort of works like this:
3628 ReadAndParse( &argc, &argv );
3630 cmdPtr = LookupCommand( argv[0] );
3632 (*cmdPtr->Execute)( argc, argv );
3636 When the command ``proc'' is parsed (which creates a procedure
3637 function) it gets 3 parameters on the command line. @b{1} the name of
3638 the proc (function), @b{2} the list of parameters, and @b{3} the body
3639 of the function. Not the choice of words: LIST and BODY. The PROC
3640 command stores these items in a table somewhere so it can be found by
3643 @subsection The FOR command
3645 The most interesting command to look at is the FOR command. In Tcl,
3646 the FOR command is normally implemented in C. Remember, FOR is a
3647 command just like any other command.
3649 When the ascii text containing the FOR command is parsed, the parser
3650 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3654 @item The ascii text 'for'
3655 @item The start text
3656 @item The test expression
3661 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3662 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3663 Often many of those parameters are in @{curly-braces@} - thus the
3664 variables inside are not expanded or replaced until later.
3666 Remember that every Tcl command looks like the classic ``main( argc,
3667 argv )'' function in C. In JimTCL - they actually look like this:
3671 MyCommand( Jim_Interp *interp,
3673 Jim_Obj * const *argvs );
3676 Real Tcl is nearly identical. Although the newer versions have
3677 introduced a byte-code parser and intepreter, but at the core, it
3678 still operates in the same basic way.
3680 @subsection FOR command implementation
3682 To understand Tcl it is perhaps most helpful to see the FOR
3683 command. Remember, it is a COMMAND not a control flow structure.
3685 In Tcl there are two underlying C helper functions.
3687 Remember Rule #1 - You are a string.
3689 The @b{first} helper parses and executes commands found in an ascii
3690 string. Commands can be seperated by semicolons, or newlines. While
3691 parsing, variables are expanded via the quoting rules.
3693 The @b{second} helper evaluates an ascii string as a numerical
3694 expression and returns a value.
3696 Here is an example of how the @b{FOR} command could be
3697 implemented. The pseudo code below does not show error handling.
3699 void Execute_AsciiString( void *interp, const char *string );
3701 int Evaluate_AsciiExpression( void *interp, const char *string );
3704 MyForCommand( void *interp,
3709 SetResult( interp, "WRONG number of parameters");
3713 // argv[0] = the ascii string just like C
3715 // Execute the start statement.
3716 Execute_AsciiString( interp, argv[1] );
3720 i = Evaluate_AsciiExpression(interp, argv[2]);
3725 Execute_AsciiString( interp, argv[3] );
3727 // Execute the LOOP part
3728 Execute_AsciiString( interp, argv[4] );
3732 SetResult( interp, "" );
3737 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3738 in the same basic way.
3740 @section OpenOCD Tcl Usage
3742 @subsection source and find commands
3743 @b{Where:} In many configuration files
3744 @* Example: @b{ source [find FILENAME] }
3745 @*Remember the parsing rules
3747 @item The FIND command is in square brackets.
3748 @* The FIND command is executed with the parameter FILENAME. It should
3749 find the full path to the named file. The RESULT is a string, which is
3750 substituted on the orginal command line.
3751 @item The command source is executed with the resulting filename.
3752 @* SOURCE reads a file and executes as a script.
3754 @subsection format command
3755 @b{Where:} Generally occurs in numerous places.
3756 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3762 puts [format "The answer: %d" [expr $x * $y]]
3765 @item The SET command creates 2 variables, X and Y.
3766 @item The double [nested] EXPR command performs math
3767 @* The EXPR command produces numerical result as a string.
3769 @item The format command is executed, producing a single string
3770 @* Refer to Rule #1.
3771 @item The PUTS command outputs the text.
3773 @subsection Body or Inlined Text
3774 @b{Where:} Various TARGET scripts.
3777 proc someproc @{@} @{
3778 ... multiple lines of stuff ...
3780 $_TARGETNAME configure -event FOO someproc
3781 #2 Good - no variables
3782 $_TARGETNAME confgure -event foo "this ; that;"
3783 #3 Good Curly Braces
3784 $_TARGETNAME configure -event FOO @{
3787 #4 DANGER DANGER DANGER
3788 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3791 @item The $_TARGETNAME is an OpenOCD variable convention.
3792 @*@b{$_TARGETNAME} represents the last target created, the value changes
3793 each time a new target is created. Remember the parsing rules. When
3794 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3795 the name of the target which happens to be a TARGET (object)
3797 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3798 @*There are 4 examples:
3800 @item The TCLBODY is a simple string that happens to be a proc name
3801 @item The TCLBODY is several simple commands seperated by semicolons
3802 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3803 @item The TCLBODY is a string with variables that get expanded.
3806 In the end, when the target event FOO occurs the TCLBODY is
3807 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3808 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3810 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3811 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3812 and the text is evaluated. In case #4, they are replaced before the
3813 ``Target Object Command'' is executed. This occurs at the same time
3814 $_TARGETNAME is replaced. In case #4 the date will never
3815 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3816 Jim/OpenOCD does not have a date command@}
3818 @subsection Global Variables
3819 @b{Where:} You might discover this when writing your own procs @* In
3820 simple terms: Inside a PROC, if you need to access a global variable
3821 you must say so. See also ``upvar''. Example:
3823 proc myproc @{ @} @{
3824 set y 0 #Local variable Y
3825 global x #Global variable X
3826 puts [format "X=%d, Y=%d" $x $y]
3829 @section Other Tcl Hacks
3830 @b{Dynamic variable creation}
3832 # Dynamically create a bunch of variables.
3833 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3835 set vn [format "BIT%d" $x]
3839 set $vn [expr (1 << $x)]
3842 @b{Dynamic proc/command creation}
3844 # One "X" function - 5 uart functions.
3845 foreach who @{A B C D E@}
3846 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3850 @node Target Library
3851 @chapter Target Library
3852 @cindex Target Library
3854 OpenOCD comes with a target configuration script library. These scripts can be
3855 used as-is or serve as a starting point.
3857 The target library is published together with the OpenOCD executable and
3858 the path to the target library is in the OpenOCD script search path.
3859 Similarly there are example scripts for configuring the JTAG interface.
3861 The command line below uses the example parport configuration script
3862 that ship with OpenOCD, then configures the str710.cfg target and
3863 finally issues the init and reset commands. The communication speed
3864 is set to 10kHz for reset and 8MHz for post reset.
3867 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3870 To list the target scripts available:
3873 $ ls /usr/local/lib/openocd/target
3875 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3876 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3877 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3878 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3884 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3885 @comment case issue with ``Index.html'' and ``index.html''
3886 @comment Occurs when creating ``--html --no-split'' output
3887 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3888 @unnumbered OpenOCD Index