1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD
55 * Developers:: OpenOCD Developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl Scripting API:: Tcl Scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target Library:: Target Library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main Index
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 based, parallel port based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}.
126 @section Coding Style
129 The following rules try to describe formatting and naming conventions that should be
130 followed to make the whole OpenOCD code look more consistent. The ultimate goal of
131 coding style should be readability, and these rules may be ignored for a particular
132 (small) piece of code if that makes it more readable.
134 @subsection Formatting rules:
136 @item remove any trailing white space
137 @item use TAB characters for indentation, not spaces
138 @item displayed TAB width is 4 characters
139 @item make sure NOT to use DOS '\r\n' line feeds
140 @item do not add more than 2 empty lines to source files
141 @item do not add trailing empty lines to source files
142 @item do not use C++ style comments (//)
143 @item lines may be reasonably wide - there's no anachronistic 80 characters limit
146 @subsection Naming rules:
148 @item identifiers use lower-case letters only
149 @item identifiers consisting of multiple words use underline characters between consecutive words
150 @item macros use upper-case letters only
151 @item structure names shall be appended with '_s'
152 @item typedefs shall be appended with '_t'
155 @subsection Function calls:
157 @item function calls have no space between the functions name and the parameter
158 list: my_func(param1, param2, ...)
163 @cindex building OpenOCD
165 @section Pre-Built Tools
166 If you are interested in getting actual work done rather than building
167 OpenOCD, then check if your interface supplier provides binaries for
168 you. Chances are that that binary is from some SVN version that is more
169 stable than SVN trunk where bleeding edge development takes place.
171 @section Packagers Please Read!
173 You are a @b{PACKAGER} of OpenOCD if you
176 @item @b{Sell dongles} and include pre-built binaries
177 @item @b{Supply tools} i.e.: A complete development solution
178 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
179 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
182 As a @b{PACKAGER} - you are at the top of the food chain. You solve
183 problems for downstream users. What you fix or solve - solves hundreds
184 if not thousands of user questions. If something does not work for you
185 please let us know. That said, would also like you to follow a few
189 @item @b{Always build with printer ports enabled.}
190 @item @b{Try to use LIBFTDI + LIBUSB where possible. You cover more bases.}
194 @item @b{Why YES to LIBFTDI + LIBUSB?}
196 @item @b{LESS} work - libusb perhaps already there
197 @item @b{LESS} work - identical code, multiple platforms
198 @item @b{MORE} dongles are supported
199 @item @b{MORE} platforms are supported
200 @item @b{MORE} complete solution
202 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)?
204 @item @b{LESS} speed - some say it is slower
205 @item @b{LESS} complex to distribute (external dependencies)
209 @section Building From Source
211 You can download the current SVN version with an SVN client of your choice from the
212 following repositories:
214 @uref{svn://svn.berlios.de/openocd/trunk}
218 @uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
220 Using the SVN command line client, you can use the following command to fetch the
221 latest version (make sure there is no (non-svn) directory called "openocd" in the
225 svn checkout svn://svn.berlios.de/openocd/trunk openocd
228 Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
229 For building on Windows,
230 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
231 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
232 paths, resulting in obscure dependency errors (This is an observation I've gathered
233 from the logs of one user - correct me if I'm wrong).
235 You further need the appropriate driver files, if you want to build support for
236 a FTDI FT2232 based interface:
239 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
240 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
241 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
242 homepage (@uref{http://www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
245 libftdi is supported under Windows. Do not use versions earlier than 0.14.
247 In general, the D2XX driver provides superior performance (several times as fast),
248 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
249 a kernel module, only a user space library.
251 To build OpenOCD (on both Linux and Cygwin), use the following commands:
257 Bootstrap generates the configure script, and prepares building on your system.
260 ./configure [options, see below]
263 Configure generates the Makefiles used to build OpenOCD.
270 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
272 The configure script takes several options, specifying which JTAG interfaces
273 should be included (among other things):
277 @option{--enable-parport} - Enable building the PC parallel port driver.
279 @option{--enable-parport_ppdev} - Enable use of ppdev (/dev/parportN) for parport.
281 @option{--enable-parport_giveio} - Enable use of giveio for parport instead of ioperm.
283 @option{--enable-amtjtagaccel} - Enable building the Amontec JTAG-Accelerator driver.
285 @option{--enable-ecosboard} - Enable building support for eCosBoard based JTAG debugger.
287 @option{--enable-ioutil} - Enable ioutil functions - useful for standalone OpenOCD implementations.
289 @option{--enable-httpd} - Enable builtin httpd server - useful for standalone OpenOCD implementations.
291 @option{--enable-ep93xx} - Enable building support for EP93xx based SBCs.
293 @option{--enable-at91rm9200} - Enable building support for AT91RM9200 based SBCs.
295 @option{--enable-gw16012} - Enable building support for the Gateworks GW16012 JTAG programmer.
297 @option{--enable-ft2232_ftd2xx} - Numerous USB type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
299 @option{--enable-ft2232_libftdi} - An open source (free) alternative to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin).
301 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
303 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only. Equivalent of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
305 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
307 @option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
309 @option{--enable-presto_ftd2xx} - Enable building support for ASIX Presto programmer using the FTD2XX driver.
311 @option{--enable-usbprog} - Enable building support for the USBprog JTAG programmer.
313 @option{--enable-oocd_trace} - Enable building support for the OpenOCD+trace ETM capture device.
315 @option{--enable-jlink} - Enable building support for the Segger J-Link JTAG programmer.
317 @option{--enable-vsllink} - Enable building support for the Versaloon-Link JTAG programmer.
319 @option{--enable-rlink} - Enable building support for the Raisonance RLink JTAG programmer.
321 @option{--enable-arm-jtag-ew} - Enable building support for the Olimex ARM-JTAG-EW programmer.
323 @option{--enable-dummy} - Enable building the dummy port driver.
326 @section Parallel Port Dongles
328 If you want to access the parallel port using the PPDEV interface you have to specify
329 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
330 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
331 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
333 The same is true for the @option{--enable-parport_giveio} option, you have to
334 use both the @option{--enable-parport} AND the @option{--enable-parport_giveio} option if you want to use giveio instead of ioperm parallel port access method.
336 @section FT2232C Based USB Dongles
338 There are 2 methods of using the FTD2232, either (1) using the
339 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
340 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
342 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
343 TAR.GZ file. You must unpack them ``some where'' convient. As of this
344 writing (12/26/2008) FTDICHIP does not supply means to install these
345 files ``in an appropriate place'' As a result, there are two
346 ``./configure'' options that help.
348 Below is an example build process:
350 1) Check out the latest version of ``openocd'' from SVN.
352 2) Download & unpack either the Windows or Linux FTD2xx drivers
353 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm}).
356 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
357 /home/duane/libftd2xx0.4.16 => the Linux TAR.GZ file contents.
360 3) Configure with these options:
363 Cygwin FTDICHIP solution:
364 ./configure --prefix=/home/duane/mytools \
365 --enable-ft2232_ftd2xx \
366 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
368 Linux FTDICHIP solution:
369 ./configure --prefix=/home/duane/mytools \
370 --enable-ft2232_ftd2xx \
371 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
373 Cygwin/Linux LIBFTDI solution:
375 1a) For Windows: The Windows port of LIBUSB is in place.
376 1b) For Linux: libusb has been built/installed and is in place.
378 2) And libftdi has been built and installed
379 Note: libftdi - relies upon libusb.
381 ./configure --prefix=/home/duane/mytools \
382 --enable-ft2232_libftdi
386 4) Then just type ``make'', and perhaps ``make install''.
389 @section Miscellaneous Configure Options
393 @option{--disable-option-checking} - Ignore unrecognized @option{--enable} and @option{--with} options.
395 @option{--enable-gccwarnings} - Enable extra gcc warnings during build.
398 @option{--enable-release} - Enable building of an OpenOCD release, generally
399 this is for developers. It simply omits the svn version string when the
400 openocd @option{-v} is executed.
403 @node JTAG Hardware Dongles
404 @chapter JTAG Hardware Dongles
413 Defined: @b{dongle}: A small device that plugins into a computer and serves as
414 an adapter .... [snip]
416 In the OpenOCD case, this generally refers to @b{a small adapater} one
417 attaches to your computer via USB or the Parallel Printer Port. The
418 execption being the Zylin ZY1000 which is a small box you attach via
419 an ethernet cable. The Zylin ZY1000 has the advantage that it does not
420 require any drivers to be installed on the developer PC. It also has
421 a built in web interface. It supports RTCK/RCLK or adaptive clocking
422 and has a built in relay to power cycle targets remotely.
425 @section Choosing a Dongle
427 There are three things you should keep in mind when choosing a dongle.
430 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
431 @item @b{Connection} Printer Ports - Does your computer have one?
432 @item @b{Connection} Is that long printer bit-bang cable practical?
433 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
436 @section Stand alone Systems
438 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
439 dongle, but a standalone box. The ZY1000 has the advantage that it does
440 not require any drivers installed on the developer PC. It also has
441 a built in web interface. It supports RTCK/RCLK or adaptive clocking
442 and has a built in relay to power cycle targets remotely.
444 @section USB FT2232 Based
446 There are many USB JTAG dongles on the market, many of them are based
447 on a chip from ``Future Technology Devices International'' (FTDI)
448 known as the FTDI FT2232.
450 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
452 As of 28/Nov/2008, the following are supported:
456 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
458 @* See: @url{http://www.amontec.com/jtagkey.shtml}
460 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
462 @* See: @url{http://www.signalyzer.com}
463 @item @b{evb_lm3s811}
464 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
465 @item @b{olimex-jtag}
466 @* See: @url{http://www.olimex.com}
468 @* See: @url{http://www.tincantools.com}
469 @item @b{turtelizer2}
470 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
472 @* Link: @url{http://www.hitex.com/index.php?id=383}
474 @* Link @url{http://www.hitex.com/stm32-stick}
475 @item @b{axm0432_jtag}
476 @* Axiom AXM-0432 Link @url{http://www.axman.com}
479 @section USB JLINK based
480 There are several OEM versions of the Segger @b{JLINK} adapter. It is
481 an example of a micro controller based JTAG adapter, it uses an
482 AT91SAM764 internally.
485 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
486 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
487 @item @b{SEGGER JLINK}
488 @* Link: @url{http://www.segger.com/jlink.html}
490 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
493 @section USB RLINK based
494 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
497 @item @b{Raisonance RLink}
498 @* Link: @url{http://www.raisonance.com/products/RLink.php}
499 @item @b{STM32 Primer}
500 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
501 @item @b{STM32 Primer2}
502 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
508 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
510 @item @b{USB - Presto}
511 @* Link: @url{http://tools.asix.net/prg_presto.htm}
513 @item @b{Versaloon-Link}
514 @* Link: @url{http://www.simonqian.com/en/Versaloon}
516 @item @b{ARM-JTAG-EW}
517 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
520 @section IBM PC Parallel Printer Port Based
522 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
523 and the MacGraigor Wiggler. There are many clones and variations of
528 @item @b{Wiggler} - There are many clones of this.
529 @* Link: @url{http://www.macraigor.com/wiggler.htm}
531 @item @b{DLC5} - From XILINX - There are many clones of this
532 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
533 produced, PDF schematics are easily found and it is easy to make.
535 @item @b{Amontec - JTAG Accelerator}
536 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
539 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
542 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
544 @item @b{Wiggler_ntrst_inverted}
545 @* Yet another variation - See the source code, src/jtag/parport.c
547 @item @b{old_amt_wiggler}
548 @* Unknown - probably not on the market today
551 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
554 @* Link: @url{http://www.amontec.com/chameleon.shtml}
560 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
563 @* From ST Microsystems, link:
564 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
565 Title: FlashLINK JTAG programing cable for PSD and uPSD
573 @* An EP93xx based Linux machine using the GPIO pins directly.
576 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
582 @cindex running OpenOCD
584 @cindex --debug_level
588 The @option{--help} option shows:
592 --help | -h display this help
593 --version | -v display OpenOCD version
594 --file | -f use configuration file <name>
595 --search | -s dir to search for config files and scripts
596 --debug | -d set debug level <0-3>
597 --log_output | -l redirect log output to file <name>
598 --command | -c run <command>
599 --pipe | -p use pipes when talking to gdb
602 By default OpenOCD reads the file configuration file ``openocd.cfg''
603 in the current directory. To specify a different (or multiple)
604 configuration file, you can use the ``-f'' option. For example:
607 openocd -f config1.cfg -f config2.cfg -f config3.cfg
610 Once started, OpenOCD runs as a daemon, waiting for connections from
611 clients (Telnet, GDB, Other).
613 If you are having problems, you can enable internal debug messages via
616 Also it is possible to interleave commands w/config scripts using the
617 @option{-c} command line switch.
619 To enable debug output (when reporting problems or working on OpenOCD
620 itself), use the @option{-d} command line switch. This sets the
621 @option{debug_level} to "3", outputting the most information,
622 including debug messages. The default setting is "2", outputting only
623 informational messages, warnings and errors. You can also change this
624 setting from within a telnet or gdb session using @option{debug_level
625 <n>} @xref{debug_level}.
627 You can redirect all output from the daemon to a file using the
628 @option{-l <logfile>} switch.
630 Search paths for config/script files can be added to OpenOCD by using
631 the @option{-s <search>} switch. The current directory and the OpenOCD
632 target library is in the search path by default.
634 For details on the @option{-p} option. @xref{Connecting to GDB}.
636 Note! OpenOCD will launch the GDB & telnet server even if it can not
637 establish a connection with the target. In general, it is possible for
638 the JTAG controller to be unresponsive until the target is set up
639 correctly via e.g. GDB monitor commands in a GDB init script.
641 @node Simple Configuration Files
642 @chapter Simple Configuration Files
643 @cindex configuration
646 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
649 @item A small openocd.cfg file which ``sources'' other configuration files
650 @item A monolithic openocd.cfg file
651 @item Many -f filename options on the command line
652 @item Your Mixed Solution
655 @section Small configuration file method
657 This is the preferred method. It is simple and works well for many
658 people. The developers of OpenOCD would encourage you to use this
659 method. If you create a new configuration please email new
660 configurations to the development list.
662 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
665 source [find interface/signalyzer.cfg]
667 # Change the default telnet port...
671 # GDB can also flash my flash!
672 gdb_memory_map enable
673 gdb_flash_program enable
675 source [find target/sam7x256.cfg]
678 There are many example configuration scripts you can work with. You
679 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
683 @item @b{board} - eval board level configurations
684 @item @b{interface} - specific dongle configurations
685 @item @b{target} - the target chips
686 @item @b{tcl} - helper scripts
687 @item @b{xscale} - things specific to the xscale.
690 Look first in the ``boards'' area, then the ``targets'' area. Often a board
691 configuration is a good example to work from.
693 @section Many -f filename options
694 Some believe this is a wonderful solution, others find it painful.
696 You can use a series of ``-f filename'' options on the command line,
697 OpenOCD will read each filename in sequence, for example:
700 openocd -f file1.cfg -f file2.cfg -f file2.cfg
703 You can also intermix various commands with the ``-c'' command line
706 @section Monolithic file
707 The ``Monolithic File'' dispenses with all ``source'' statements and
708 puts everything in one self contained (monolithic) file. This is not
711 Please try to ``source'' various files or use the multiple -f
714 @section Advice for you
715 Often, one uses a ``mixed approach''. Where possible, please try to
716 ``source'' common things, and if needed cut/paste parts of the
717 standard distribution configuration files as needed.
719 @b{REMEMBER:} The ``important parts'' of your configuration file are:
722 @item @b{Interface} - Defines the dongle
723 @item @b{Taps} - Defines the JTAG Taps
724 @item @b{GDB Targets} - What GDB talks to
725 @item @b{Flash Programing} - Very Helpful
728 Some key things you should look at and understand are:
731 @item The reset configuration of your debug environment as a whole
732 @item Is there a ``work area'' that OpenOCD can use?
733 @* For ARM - work areas mean up to 10x faster downloads.
734 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
735 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
740 @node Config File Guidelines
741 @chapter Config File Guidelines
743 This section/chapter is aimed at developers and integrators of
744 OpenOCD. These are guidelines for creating new boards and new target
745 configurations as of 28/Nov/2008.
747 However, you, the user of OpenOCD, should be somewhat familiar with
748 this section as it should help explain some of the internals of what
749 you might be looking at.
751 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
755 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
757 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
758 contain initialization items that are specific to a board - for
759 example: The SDRAM initialization sequence for the board, or the type
760 of external flash and what address it is found at. Any initialization
761 sequence to enable that external flash or SDRAM should be found in the
762 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
763 a CPU and an FPGA or CPLD.
765 @* Think chip. The ``target'' directory represents a JTAG tap (or
766 chip) OpenOCD should control, not a board. Two common types of targets
767 are ARM chips and FPGA or CPLD chips.
770 @b{If needed...} The user in their ``openocd.cfg'' file or the board
771 file might override a specific feature in any of the above files by
772 setting a variable or two before sourcing the target file. Or adding
773 various commands specific to their situation.
775 @section Interface Config Files
777 The user should be able to source one of these files via a command like this:
780 source [find interface/FOOBAR.cfg]
782 openocd -f interface/FOOBAR.cfg
785 A preconfigured interface file should exist for every interface in use
786 today, that said, perhaps some interfaces have only been used by the
787 sole developer who created it.
789 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
790 tcl_platform(platform), it should be called jim_platform (because it
791 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
792 ``cygwin'' or ``mingw''
794 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
796 @section Board Config Files
798 @b{Note: BOARD directory NEW as of 28/nov/2008}
800 The user should be able to source one of these files via a command like this:
803 source [find board/FOOBAR.cfg]
805 openocd -f board/FOOBAR.cfg
809 The board file should contain one or more @t{source [find
810 target/FOO.cfg]} statements along with any board specific things.
812 In summary the board files should contain (if present)
815 @item External flash configuration (i.e.: the flash on CS0)
816 @item SDRAM configuration (size, speed, etc.
817 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
818 @item Multiple TARGET source statements
819 @item All things that are not ``inside a chip''
820 @item Things inside a chip go in a 'target' file
823 @section Target Config Files
825 The user should be able to source one of these files via a command like this:
828 source [find target/FOOBAR.cfg]
830 openocd -f target/FOOBAR.cfg
833 In summary the target files should contain
838 @item Reset configuration
840 @item CPU/Chip/CPU-Core specific features
844 @subsection Important variable names
846 By default, the end user should never need to set these
847 variables. However, if the user needs to override a setting they only
848 need to set the variable in a simple way.
852 @* This gives a name to the overall chip, and is used as part of the
853 tap identifier dotted name.
855 @* By default little - unless the chip or board is not normally used that way.
857 @* When OpenOCD examines the JTAG chain, it will attempt to identify
858 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
859 to verify the tap id number verses configuration file and may issue an
860 error or warning like this. The hope is that this will help to pinpoint
861 problems in OpenOCD configurations.
864 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
865 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
866 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
867 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
870 @item @b{_TARGETNAME}
871 @* By convention, this variable is created by the target configuration
872 script. The board configuration file may make use of this variable to
873 configure things like a ``reset init'' script, or other things
874 specific to that board and that target.
876 If the chip has 2 targets, use the names @b{_TARGETNAME0},
877 @b{_TARGETNAME1}, ... etc.
879 @b{Remember:} The ``board file'' may include multiple targets.
881 At no time should the name ``target0'' (the default target name if
882 none was specified) be used. The name ``target0'' is a hard coded name
883 - the next target on the board will be some other number.
885 The user (or board file) should reasonably be able to:
888 source [find target/FOO.cfg]
889 $_TARGETNAME configure ... FOO specific parameters
891 source [find target/BAR.cfg]
892 $_TARGETNAME configure ... BAR specific parameters
897 @subsection Tcl Variables Guide Line
898 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
900 Thus the rule we follow in OpenOCD is this: Variables that begin with
901 a leading underscore are temporary in nature, and can be modified and
902 used at will within a ?TARGET? configuration file.
904 @b{EXAMPLE:} The user should be able to do this:
908 # PXA270 #1 network side, big endian
909 # PXA270 #2 video side, little endian
913 source [find target/pxa270.cfg]
914 # variable: _TARGETNAME = network.cpu
915 # other commands can refer to the "network.cpu" tap.
916 $_TARGETNAME configure .... params for this CPU..
920 source [find target/pxa270.cfg]
921 # variable: _TARGETNAME = video.cpu
922 # other commands can refer to the "video.cpu" tap.
923 $_TARGETNAME configure .... params for this CPU..
927 source [find target/spartan3.cfg]
929 # Since $_TARGETNAME is temporal..
930 # these names still work!
931 network.cpu configure ... params
932 video.cpu configure ... params
936 @subsection Default Value Boiler Plate Code
938 All target configuration files should start with this (or a modified form)
942 if @{ [info exists CHIPNAME] @} @{
943 set _CHIPNAME $CHIPNAME
945 set _CHIPNAME sam7x256
948 if @{ [info exists ENDIAN] @} @{
954 if @{ [info exists CPUTAPID ] @} @{
955 set _CPUTAPID $CPUTAPID
957 set _CPUTAPID 0x3f0f0f0f
962 @subsection Creating Taps
963 After the ``defaults'' are choosen [see above] the taps are created.
965 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
969 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
970 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
975 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
978 @item @b{Unform tap names} - See: Tap Naming Convention
979 @item @b{_TARGETNAME} is created at the end where used.
983 if @{ [info exists FLASHTAPID ] @} @{
984 set _FLASHTAPID $FLASHTAPID
986 set _FLASHTAPID 0x25966041
988 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
990 if @{ [info exists CPUTAPID ] @} @{
991 set _CPUTAPID $CPUTAPID
993 set _CPUTAPID 0x25966041
995 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
998 if @{ [info exists BSTAPID ] @} @{
999 set _BSTAPID $BSTAPID
1001 set _BSTAPID 0x1457f041
1003 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
1005 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
1008 @b{Tap Naming Convention}
1010 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
1019 @item @b{unknownN} - it happens :-(
1022 @subsection Reset Configuration
1024 Some chips have specific ways the TRST and SRST signals are
1025 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
1026 @b{BOARD SPECIFIC} they go in the board file.
1028 @subsection Work Areas
1030 Work areas are small RAM areas used by OpenOCD to speed up downloads,
1031 and to download small snippets of code to program flash chips.
1033 If the chip includes a form of ``on-chip-ram'' - and many do - define
1034 a reasonable work area and use the ``backup'' option.
1036 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
1037 inaccessible if/when the application code enables or disables the MMU.
1039 @subsection ARM Core Specific Hacks
1041 If the chip has a DCC, enable it. If the chip is an ARM9 with some
1042 special high speed download features - enable it.
1044 If the chip has an ARM ``vector catch'' feature - by default enable
1045 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
1046 user is really writing a handler for those situations - they can
1047 easily disable it. Experiance has shown the ``vector catch'' is
1048 helpful - for common programing errors.
1050 If present, the MMU, the MPU and the CACHE should be disabled.
1052 Some ARM cores are equipped with trace support, which permits
1053 examination of the instruction and data bus activity. Trace
1054 activity is controlled through an ``Embedded Trace Module'' (ETM)
1055 on one of the core's scan chains. The ETM emits voluminous data
1056 through a ``trace port''. The trace port is accessed in one
1057 of two ways. When its signals are pinned out from the chip,
1058 boards may provide a special high speed debugging connector;
1059 software support for this is not configured by default, use
1060 the ``--enable-oocd_trace'' option. Alternatively, trace data
1061 may be stored an on-chip SRAM which is packaged as an ``Embedded
1062 Trace Buffer'' (ETB). An ETB has its own TAP, usually right after
1063 its associated ARM core. OpenOCD supports the ETM, and your
1064 target configuration should set it up with the relevant trace
1065 port: ``etb'' for chips which use that, else the board-specific
1066 option will be either ``oocd_trace'' or ``dummy''.
1069 etm config $_TARGETNAME 16 normal full etb
1070 etb config $_TARGETNAME $_CHIPNAME.etb
1073 @subsection Internal Flash Configuration
1075 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
1077 @b{Never ever} in the ``target configuration file'' define any type of
1078 flash that is external to the chip. (For example the BOOT flash on
1079 Chip Select 0). The BOOT flash information goes in a board file - not
1080 the TARGET (chip) file.
1084 @item at91sam7x256 - has 256K flash YES enable it.
1085 @item str912 - has flash internal YES enable it.
1086 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1087 @item pxa270 - again - CS0 flash - it goes in the board file.
1091 @chapter About JIM-Tcl
1095 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1096 learn more about JIM here: @url{http://jim.berlios.de}
1099 @item @b{JIM vs. Tcl}
1100 @* JIM-TCL is a stripped down version of the well known Tcl language,
1101 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1102 fewer features. JIM-Tcl is a single .C file and a single .H file and
1103 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1104 4.2 MB .zip file containing 1540 files.
1106 @item @b{Missing Features}
1107 @* Our practice has been: Add/clone the real Tcl feature if/when
1108 needed. We welcome JIM Tcl improvements, not bloat.
1111 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1112 command interpreter today (28/nov/2008) is a mixture of (newer)
1113 JIM-Tcl commands, and (older) the orginal command interpreter.
1116 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1117 can type a Tcl for() loop, set variables, etc.
1119 @item @b{Historical Note}
1120 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1122 @item @b{Need a crash course in Tcl?}
1123 @* See: @xref{Tcl Crash Course}.
1127 @node Daemon Configuration
1128 @chapter Daemon Configuration
1129 The commands here are commonly found in the openocd.cfg file and are
1130 used to specify what TCP/IP ports are used, and how GDB should be
1134 This command terminates the configuration stage and
1135 enters the normal command mode. This can be useful to add commands to
1136 the startup scripts and commands such as resetting the target,
1137 programming flash, etc. To reset the CPU upon startup, add "init" and
1138 "reset" at the end of the config script or at the end of the OpenOCD
1139 command line using the @option{-c} command line switch.
1141 If this command does not appear in any startup/configuration file
1142 OpenOCD executes the command for you after processing all
1143 configuration files and/or command line options.
1145 @b{NOTE:} This command normally occurs at or near the end of your
1146 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1147 targets ready. For example: If your openocd.cfg file needs to
1148 read/write memory on your target - the init command must occur before
1149 the memory read/write commands.
1151 @section TCP/IP Ports
1153 @item @b{telnet_port} <@var{number}>
1155 @*Intended for a human. Port on which to listen for incoming telnet connections.
1157 @item @b{tcl_port} <@var{number}>
1159 @*Intended as a machine interface. Port on which to listen for
1160 incoming Tcl syntax. This port is intended as a simplified RPC
1161 connection that can be used by clients to issue commands and get the
1162 output from the Tcl engine.
1164 @item @b{gdb_port} <@var{number}>
1166 @*First port on which to listen for incoming GDB connections. The GDB port for the
1167 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1172 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1173 @cindex gdb_breakpoint_override
1174 @anchor{gdb_breakpoint_override}
1175 @*Force breakpoint type for gdb 'break' commands.
1176 The raison d'etre for this option is to support GDB GUI's without
1177 a hard/soft breakpoint concept where the default OpenOCD and
1178 GDB behaviour is not sufficient. Note that GDB will use hardware
1179 breakpoints if the memory map has been set up for flash regions.
1181 This option replaces older arm7_9 target commands that addressed
1184 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1186 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1187 Default behaviour is <@var{resume}>
1189 @item @b{gdb_memory_map} <@var{enable|disable}>
1190 @cindex gdb_memory_map
1191 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1192 requested. GDB will then know when to set hardware breakpoints, and program flash
1193 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1194 for flash programming to work.
1195 Default behaviour is <@var{enable}>
1196 @xref{gdb_flash_program}.
1198 @item @b{gdb_flash_program} <@var{enable|disable}>
1199 @cindex gdb_flash_program
1200 @anchor{gdb_flash_program}
1201 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1202 vFlash packet is received.
1203 Default behaviour is <@var{enable}>
1204 @comment END GDB Items
1207 @node Interface - Dongle Configuration
1208 @chapter Interface - Dongle Configuration
1209 Interface commands are normally found in an interface configuration
1210 file which is sourced by your openocd.cfg file. These commands tell
1211 OpenOCD what type of JTAG dongle you have and how to talk to it.
1212 @section Simple Complete Interface Examples
1213 @b{A Turtelizer FT2232 Based JTAG Dongle}
1217 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1218 ft2232_layout turtelizer2
1219 ft2232_vid_pid 0x0403 0xbdc8
1226 @b{A Raisonance RLink}
1235 parport_cable wiggler
1240 interface arm-jtag-ew
1242 @section Interface Command
1244 The interface command tells OpenOCD what type of JTAG dongle you are
1245 using. Depending on the type of dongle, you may need to have one or
1246 more additional commands.
1250 @item @b{interface} <@var{name}>
1252 @*Use the interface driver <@var{name}> to connect to the
1253 target. Currently supported interfaces are
1258 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1260 @item @b{amt_jtagaccel}
1261 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1265 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1266 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1267 platform. The libftdi uses libusb, and should be portable to all systems that provide
1271 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1274 @* ASIX PRESTO USB JTAG programmer.
1277 @* usbprog is a freely programmable USB adapter.
1280 @* Gateworks GW16012 JTAG programmer.
1283 @* Segger jlink USB adapter
1286 @* Raisonance RLink USB adapter
1289 @* vsllink is part of Versaloon which is a versatile USB programmer.
1291 @item @b{arm-jtag-ew}
1292 @* Olimex ARM-JTAG-EW USB adapter
1293 @comment - End parameters
1295 @comment - End Interface
1297 @subsection parport options
1300 @item @b{parport_port} <@var{number}>
1301 @cindex parport_port
1302 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1303 the @file{/dev/parport} device
1305 When using PPDEV to access the parallel port, use the number of the parallel port:
1306 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1307 you may encounter a problem.
1308 @item @b{parport_cable} <@var{name}>
1309 @cindex parport_cable
1310 @*The layout of the parallel port cable used to connect to the target.
1311 Currently supported cables are
1315 The original Wiggler layout, also supported by several clones, such
1316 as the Olimex ARM-JTAG
1319 Same as original wiggler except an led is fitted on D5.
1320 @item @b{wiggler_ntrst_inverted}
1321 @cindex wiggler_ntrst_inverted
1322 Same as original wiggler except TRST is inverted.
1323 @item @b{old_amt_wiggler}
1324 @cindex old_amt_wiggler
1325 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1326 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1329 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1330 program the Chameleon itself, not a connected target.
1333 The Xilinx Parallel cable III.
1336 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1337 This is also the layout used by the HollyGates design
1338 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1341 The ST Parallel cable.
1344 Same as original wiggler except SRST and TRST connections reversed and
1345 TRST is also inverted.
1348 Altium Universal JTAG cable.
1350 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1351 @cindex parport_write_on_exit
1352 @*This will configure the parallel driver to write a known value to the parallel
1353 interface on exiting OpenOCD
1356 @subsection amt_jtagaccel options
1358 @item @b{parport_port} <@var{number}>
1359 @cindex parport_port
1360 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1361 @file{/dev/parport} device
1363 @subsection ft2232 options
1366 @item @b{ft2232_device_desc} <@var{description}>
1367 @cindex ft2232_device_desc
1368 @*The USB device description of the FTDI FT2232 device. If not
1369 specified, the FTDI default value is used. This setting is only valid
1370 if compiled with FTD2XX support.
1372 @b{TODO:} Confirm the following: On Windows the name needs to end with
1373 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1374 this be added and when must it not be added? Why can't the code in the
1375 interface or in OpenOCD automatically add this if needed? -- Duane.
1377 @item @b{ft2232_serial} <@var{serial-number}>
1378 @cindex ft2232_serial
1379 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1381 @item @b{ft2232_layout} <@var{name}>
1382 @cindex ft2232_layout
1383 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1384 signals. Valid layouts are
1387 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1389 Amontec JTAGkey and JTAGkey-Tiny
1390 @item @b{signalyzer}
1392 @item @b{olimex-jtag}
1395 American Microsystems M5960
1396 @item @b{evb_lm3s811}
1397 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1398 SRST signals on external connector
1401 @item @b{stm32stick}
1402 Hitex STM32 Performance Stick
1403 @item @b{flyswatter}
1404 Tin Can Tools Flyswatter
1405 @item @b{turtelizer2}
1406 egnite Software turtelizer2
1409 @item @b{axm0432_jtag}
1413 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1414 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1415 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1417 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1419 @item @b{ft2232_latency} <@var{ms}>
1420 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1421 ft2232_read() fails to return the expected number of bytes. This can be caused by
1422 USB communication delays and has proved hard to reproduce and debug. Setting the
1423 FT2232 latency timer to a larger value increases delays for short USB packets but it
1424 also reduces the risk of timeouts before receiving the expected number of bytes.
1425 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1428 @subsection ep93xx options
1429 @cindex ep93xx options
1430 Currently, there are no options available for the ep93xx interface.
1434 @item @b{jtag_khz} <@var{reset speed kHz}>
1437 It is debatable if this command belongs here - or in a board
1438 configuration file. In fact, in some situations the JTAG speed is
1439 changed during the target initialisation process (i.e.: (1) slow at
1440 reset, (2) program the CPU clocks, (3) run fast)
1442 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1444 Not all interfaces support ``rtck''. If the interface device can not
1445 support the rate asked for, or can not translate from kHz to
1446 jtag_speed, then an error is returned.
1448 Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
1449 especially true for synthesized cores (-S). Also see RTCK.
1451 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1452 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1453 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1454 the specified frequency.
1457 # Fall back to 3mhz if RCLK is not supported
1461 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1463 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1464 speed. The actual effect of this option depends on the JTAG interface used.
1466 The speed used during reset can be adjusted using setting jtag_speed during
1467 pre_reset and post_reset events.
1470 @item wiggler: maximum speed / @var{number}
1471 @item ft2232: 6MHz / (@var{number}+1)
1472 @item amt jtagaccel: 8 / 2**@var{number}
1473 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1474 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1475 @comment end speed list.
1478 @comment END command list
1481 @node Reset Configuration
1482 @chapter Reset Configuration
1483 @cindex Reset Configuration
1485 Every system configuration may require a different reset
1486 configuration. This can also be quite confusing. Please see the
1487 various board files for example.
1489 @section jtag_nsrst_delay <@var{ms}>
1490 @cindex jtag_nsrst_delay
1491 @*How long (in milliseconds) OpenOCD should wait after deasserting
1492 nSRST before starting new JTAG operations.
1494 @section jtag_ntrst_delay <@var{ms}>
1495 @cindex jtag_ntrst_delay
1496 @*Same @b{jtag_nsrst_delay}, but for nTRST
1498 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1499 big resistor/capacitor, reset supervisor, or on-chip features). This
1500 keeps the signal asserted for some time after the external reset got
1503 @section reset_config
1505 @b{Note:} To maintainers and integrators: Where exactly the
1506 ``reset configuration'' goes is a good question. It touches several
1507 things at once. In the end, if you have a board file - the board file
1508 should define it and assume 100% that the DONGLE supports
1509 anything. However, that does not mean the target should not also make
1510 not of something the silicon vendor has done inside the
1511 chip. @i{Grr.... nothing is every pretty.}
1515 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1516 @item Every board is also slightly different; some boards tie TRST and SRST together.
1517 @item Every chip is slightly different; some chips internally tie the two signals together.
1518 @item Some may not implement all of the signals the same way.
1519 @item Some signals might be push-pull, others open-drain/collector.
1521 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1522 reset the TAP via TRST and send commands through the JTAG tap to halt
1523 the CPU at the reset vector before the 1st instruction is executed,
1524 and finally release the SRST signal.
1525 @*Depending on your board vendor, chip vendor, etc., these
1526 signals may have slightly different names.
1528 OpenOCD defines these signals in these terms:
1530 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1531 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1537 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1538 @cindex reset_config
1539 @* The @t{reset_config} command tells OpenOCD the reset configuration
1540 of your combination of Dongle, Board, and Chips.
1541 If the JTAG interface provides SRST, but the target doesn't connect
1542 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1543 be @option{none}, @option{trst_only}, @option{srst_only} or
1544 @option{trst_and_srst}.
1546 [@var{combination}] is an optional value specifying broken reset
1547 signal implementations. @option{srst_pulls_trst} states that the
1548 test logic is reset together with the reset of the system (e.g. Philips
1549 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1550 the system is reset together with the test logic (only hypothetical, I
1551 haven't seen hardware with such a bug, and can be worked around).
1552 @option{combined} implies both @option{srst_pulls_trst} and
1553 @option{trst_pulls_srst}. The default behaviour if no option given is
1556 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1557 driver type of the reset lines to be specified. Possible values are
1558 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1559 test reset signal, and @option{srst_open_drain} (default) and
1560 @option{srst_push_pull} for the system reset. These values only affect
1561 JTAG interfaces with support for different drivers, like the Amontec
1562 JTAGkey and JTAGAccelerator.
1564 @comment - end command
1570 @chapter Tap Creation
1571 @cindex tap creation
1572 @cindex tap configuration
1574 In order for OpenOCD to control a target, a JTAG tap must be
1577 Commands to create taps are normally found in a configuration file and
1578 are not normally typed by a human.
1580 When a tap is created a @b{dotted.name} is created for the tap. Other
1581 commands use that dotted.name to manipulate or refer to the tap.
1585 @item @b{Debug Target} A tap can be used by a GDB debug target
1586 @item @b{Flash Programing} Some chips program the flash via JTAG
1587 @item @b{Boundry Scan} Some chips support boundary scan.
1591 @section jtag newtap
1592 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1597 @cindex tap geometry
1599 @comment START options
1602 @* is a symbolic name of the chip.
1604 @* is a symbol name of a tap present on the chip.
1605 @item @b{Required configparams}
1606 @* Every tap has 3 required configparams, and several ``optional
1607 parameters'', the required parameters are:
1608 @comment START REQUIRED
1610 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1611 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1612 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1613 some devices, there are bits in the IR that aren't used. This lets you mask
1614 them off when doing comparisons. In general, this should just be all ones for
1616 @comment END REQUIRED
1618 An example of a FOOBAR Tap
1620 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1622 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1623 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1624 [6,4,2,0] are checked.
1626 @item @b{Optional configparams}
1627 @comment START Optional
1629 @item @b{-expected-id NUMBER}
1630 @* By default it is zero. If non-zero represents the
1631 expected tap ID used when the JTAG chain is examined. Repeat
1632 the option as many times as required if multiple id's can be
1633 expected. See below.
1636 @* By default not specified the tap is enabled. Some chips have a
1637 JTAG route controller (JRC) that is used to enable and/or disable
1638 specific JTAG taps. You can later enable or disable any JTAG tap via
1639 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1641 @comment END Optional
1644 @comment END OPTIONS
1647 @comment START NOTES
1649 @item @b{Technically}
1650 @* newtap is a sub command of the ``jtag'' command
1651 @item @b{Big Picture Background}
1652 @*GDB Talks to OpenOCD using the GDB protocol via
1653 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1654 control the JTAG chain on your board. Your board has one or more chips
1655 in a @i{daisy chain configuration}. Each chip may have one or more
1656 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1657 @item @b{NAME Rules}
1658 @*Names follow ``C'' symbol name rules (start with alpha ...)
1659 @item @b{TAPNAME - Conventions}
1661 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1662 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1663 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1664 @item @b{bs} - for boundary scan if this is a seperate tap.
1665 @item @b{etb} - for an embedded trace buffer (example: an ARM ETB11)
1666 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1667 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1668 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1669 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1671 @item @b{DOTTED.NAME}
1672 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1673 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1674 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1675 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1676 numerous other places to refer to various taps.
1678 @* The order this command appears via the config files is
1680 @item @b{Multi Tap Example}
1681 @* This example is based on the ST Microsystems STR912. See the ST
1682 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1683 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1685 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1686 @*@b{checked: 28/nov/2008}
1688 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1689 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1690 tap which then connects to the TDI pin.
1694 # create tap: 'str912.flash'
1695 jtag newtap str912 flash ... params ...
1696 # create tap: 'str912.cpu'
1697 jtag newtap str912 cpu ... params ...
1698 # create tap: 'str912.bs'
1699 jtag newtap str912 bs ... params ...
1702 @item @b{Note: Deprecated} - Index Numbers
1703 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1704 feature is still present, however its use is highly discouraged and
1705 should not be counted upon.
1706 @item @b{Multiple chips}
1707 @* If your board has multiple chips, you should be
1708 able to @b{source} two configuration files, in the proper order, and
1709 have the taps created in the proper order.
1712 @comment at command level
1713 @comment DOCUMENT old command
1714 @section jtag_device - REMOVED
1716 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1720 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1721 by the ``jtag newtap'' command. The documentation remains here so that
1722 one can easily convert the old syntax to the new syntax. About the old
1723 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1724 ``irmask''. The new syntax requires named prefixes, and supports
1725 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1726 @b{jtag newtap} command for details.
1728 OLD: jtag_device 8 0x01 0xe3 0xfe
1729 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1732 @section Enable/Disable Taps
1733 @b{Note:} These commands are intended to be used as a machine/script
1734 interface. Humans might find the ``scan_chain'' command more helpful
1735 when querying the state of the JTAG taps.
1737 @b{By default, all taps are enabled}
1740 @item @b{jtag tapenable} @var{DOTTED.NAME}
1741 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1742 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1747 @cindex route controller
1749 These commands are used when your target has a JTAG route controller
1750 that effectively adds or removes a tap from the JTAG chain in a
1753 The ``standard way'' to remove a tap would be to place the tap in
1754 bypass mode. But with the advent of modern chips, this is not always a
1755 good solution. Some taps operate slowly, others operate fast, and
1756 there are other JTAG clock synchronisation problems one must face. To
1757 solve that problem, the JTAG route controller was introduced. Rather
1758 than ``bypass'' the tap, the tap is completely removed from the
1759 circuit and skipped.
1762 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1765 @item @b{Enabled - Not In ByPass} and has a variable bit length
1766 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1767 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1770 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1771 @b{Historical note:} this feature was added 28/nov/2008
1773 @b{jtag tapisenabled DOTTED.NAME}
1775 This command returns 1 if the named tap is currently enabled, 0 if not.
1776 This command exists so that scripts that manipulate a JRC (like the
1777 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1778 enabled or disabled.
1781 @node Target Configuration
1782 @chapter Target Configuration
1784 This chapter discusses how to create a GDB debug target. Before
1785 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1787 @section targets [NAME]
1788 @b{Note:} This command name is PLURAL - not singular.
1790 With NO parameter, this plural @b{targets} command lists all known
1791 targets in a human friendly form.
1793 With a parameter, this plural @b{targets} command sets the current
1794 target to the given name. (i.e.: If there are multiple debug targets)
1799 CmdName Type Endian ChainPos State
1800 -- ---------- ---------- ---------- -------- ----------
1801 0: target0 arm7tdmi little 0 halted
1804 @section target COMMANDS
1805 @b{Note:} This command name is SINGULAR - not plural. It is used to
1806 manipulate specific targets, to create targets and other things.
1808 Once a target is created, a TARGETNAME (object) command is created;
1809 see below for details.
1811 The TARGET command accepts these sub-commands:
1813 @item @b{create} .. parameters ..
1814 @* creates a new target, see below for details.
1816 @* Lists all supported target types (perhaps some are not yet in this document).
1818 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1820 foreach t [target names] {
1821 puts [format "Target: %s\n" $t]
1825 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1826 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1827 @item @b{number} @b{NUMBER}
1828 @* Internally OpenOCD maintains a list of targets - in numerical index
1829 (0..N-1) this command returns the name of the target at index N.
1832 set thename [target number $x]
1833 puts [format "Target %d is: %s\n" $x $thename]
1836 @* Returns the number of targets known to OpenOCD (see number above)
1839 set c [target count]
1840 for { set x 0 } { $x < $c } { incr x } {
1841 # Assuming you have created this function
1842 print_target_details $x
1848 @section TARGETNAME (object) commands
1849 @b{Use:} Once a target is created, an ``object name'' that represents the
1850 target is created. By convention, the target name is identical to the
1851 tap name. In a multiple target system, one can preceed many common
1852 commands with a specific target name and effect only that target.
1854 str912.cpu mww 0x1234 0x42
1855 omap3530.cpu mww 0x5555 123
1858 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1859 good example is a on screen button, once a button is created a button
1860 has a name (a path in Tk terms) and that name is useable as a 1st
1861 class command. For example in Tk, one can create a button and later
1862 configure it like this:
1866 button .foobar -background red -command @{ foo @}
1868 .foobar configure -foreground blue
1870 set x [.foobar cget -background]
1872 puts [format "The button is %s" $x]
1875 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1876 button. Commands available as a ``target object'' are:
1878 @comment START targetobj commands.
1880 @item @b{configure} - configure the target; see Target Config/Cget Options below
1881 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1882 @item @b{curstate} - current target state (running, halt, etc.
1884 @* Intended for a human to see/read the currently configure target events.
1885 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1886 @comment start memory
1896 @item @b{Memory To Array, Array To Memory}
1897 @* These are aimed at a machine interface to memory
1899 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1900 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1902 @* @b{ARRAYNAME} is the name of an array variable
1903 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1904 @* @b{ADDRESS} is the target memory address
1905 @* @b{COUNT} is the number of elements to process
1907 @item @b{Used during ``reset''}
1908 @* These commands are used internally by the OpenOCD scripts to deal
1909 with odd reset situations and are not documented here.
1911 @item @b{arp_examine}
1915 @item @b{arp_waitstate}
1917 @item @b{invoke-event} @b{EVENT-NAME}
1918 @* Invokes the specific event manually for the target
1921 @section Target Events
1922 At various times, certain things can happen, or you want them to happen.
1926 @item What should happen when GDB connects? Should your target reset?
1927 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1928 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1931 All of the above items are handled by target events.
1933 To specify an event action, either during target creation, or later
1934 via ``$_TARGETNAME configure'' see this example.
1936 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1937 target event name, and BODY is a Tcl procedure or string of commands
1940 The programmers model is the ``-command'' option used in Tcl/Tk
1941 buttons and events. Below are two identical examples, the first
1942 creates and invokes small procedure. The second inlines the procedure.
1945 proc my_attach_proc @{ @} @{
1949 mychip.cpu configure -event gdb-attach my_attach_proc
1950 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1953 @section Current Events
1954 The following events are available:
1956 @item @b{debug-halted}
1957 @* The target has halted for debug reasons (i.e.: breakpoint)
1958 @item @b{debug-resumed}
1959 @* The target has resumed (i.e.: gdb said run)
1960 @item @b{early-halted}
1961 @* Occurs early in the halt process
1962 @item @b{examine-end}
1963 @* Currently not used (goal: when JTAG examine completes)
1964 @item @b{examine-start}
1965 @* Currently not used (goal: when JTAG examine starts)
1966 @item @b{gdb-attach}
1967 @* When GDB connects
1968 @item @b{gdb-detach}
1969 @* When GDB disconnects
1971 @* When the taret has halted and GDB is not doing anything (see early halt)
1972 @item @b{gdb-flash-erase-start}
1973 @* Before the GDB flash process tries to erase the flash
1974 @item @b{gdb-flash-erase-end}
1975 @* After the GDB flash process has finished erasing the flash
1976 @item @b{gdb-flash-write-start}
1977 @* Before GDB writes to the flash
1978 @item @b{gdb-flash-write-end}
1979 @* After GDB writes to the flash
1981 @* Before the taret steps, gdb is trying to start/resume the target
1983 @* The target has halted
1984 @item @b{old-gdb_program_config}
1985 @* DO NOT USE THIS: Used internally
1986 @item @b{old-pre_resume}
1987 @* DO NOT USE THIS: Used internally
1988 @item @b{reset-assert-pre}
1989 @* Before reset is asserted on the tap.
1990 @item @b{reset-assert-post}
1991 @* Reset is now asserted on the tap.
1992 @item @b{reset-deassert-pre}
1993 @* Reset is about to be released on the tap
1994 @item @b{reset-deassert-post}
1995 @* Reset has been released on the tap
1997 @* Currently not used.
1998 @item @b{reset-halt-post}
1999 @* Currently not usd
2000 @item @b{reset-halt-pre}
2001 @* Currently not used
2002 @item @b{reset-init}
2003 @* Currently not used
2004 @item @b{reset-start}
2005 @* Currently not used
2006 @item @b{reset-wait-pos}
2007 @* Currently not used
2008 @item @b{reset-wait-pre}
2009 @* Currently not used
2010 @item @b{resume-start}
2011 @* Before any target is resumed
2012 @item @b{resume-end}
2013 @* After all targets have resumed
2017 @* Target has resumed
2018 @item @b{tap-enable}
2019 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
2021 jtag configure DOTTED.NAME -event tap-enable @{
2026 @item @b{tap-disable}
2027 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
2029 jtag configure DOTTED.NAME -event tap-disable @{
2030 puts "Disabling CPU"
2036 @section target create
2038 @cindex target creation
2041 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
2043 @*This command creates a GDB debug target that refers to a specific JTAG tap.
2044 @comment START params
2047 @* Is the name of the debug target. By convention it should be the tap
2048 DOTTED.NAME, this name is also used to create the target object
2051 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
2052 @comment START types
2069 @*PARAMs are various target configuration parameters. The following ones are mandatory:
2070 @comment START mandatory
2072 @item @b{-endian big|little}
2073 @item @b{-chain-position DOTTED.NAME}
2074 @comment end MANDATORY
2079 @section Target Config/Cget Options
2080 These options can be specified when the target is created, or later
2081 via the configure option or to query the target via cget.
2083 @item @b{-type} - returns the target type
2084 @item @b{-event NAME BODY} see Target events
2085 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
2086 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
2087 @item @b{-work-area-size [ADDRESS]} specify/set the work area
2088 @item @b{-work-area-backup [0|1]} does the work area get backed up
2089 @item @b{-endian [big|little]}
2090 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2091 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2095 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2096 set name [target number $x]
2097 set y [$name cget -endian]
2098 set z [$name cget -type]
2099 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2103 @section Target Variants
2106 @* Unknown (please write me)
2108 @* Unknown (please write me) (similar to arm7tdmi)
2110 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2111 This enables the hardware single-stepping support found on these
2116 @* None (this is also used as the ARM946)
2118 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2119 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2120 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2121 be detected and the normal reset behaviour used.
2123 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2125 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2127 @* Use variant @option{ejtag_srst} when debugging targets that do not
2128 provide a functional SRST line on the EJTAG connector. This causes
2129 OpenOCD to instead use an EJTAG software reset command to reset the
2130 processor. You still need to enable @option{srst} on the reset
2131 configuration command to enable OpenOCD hardware reset functionality.
2132 @comment END variants
2134 @section working_area - Command Removed
2135 @cindex working_area
2136 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2137 @* This documentation remains because there are existing scripts that
2138 still use this that need to be converted.
2140 working_area target# address size backup| [virtualaddress]
2142 @* The target# is a the 0 based target numerical index.
2144 This command specifies a working area for the debugger to use. This
2145 may be used to speed-up downloads to target memory and flash
2146 operations, or to perform otherwise unavailable operations (some
2147 coprocessor operations on ARM7/9 systems, for example). The last
2148 parameter decides whether the memory should be preserved
2149 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2150 possible, use a working_area that doesn't need to be backed up, as
2151 performing a backup slows down operation.
2153 @node Flash Configuration
2154 @chapter Flash programming
2155 @cindex Flash Configuration
2157 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2158 flash that a micro may boot from. Perhaps you, the reader, would like to
2159 contribute support for this.
2163 @item Configure via the command @b{flash bank}
2164 @* Normally this is done in a configuration file.
2165 @item Operate on the flash via @b{flash SOMECOMMAND}
2166 @* Often commands to manipulate the flash are typed by a human, or run
2167 via a script in some automated way. For example: To program the boot
2168 flash on your board.
2170 @* Flashing via GDB requires the flash be configured via ``flash
2171 bank'', and the GDB flash features be enabled. See the daemon
2172 configuration section for more details.
2175 @section Flash commands
2176 @cindex Flash commands
2177 @subsection flash banks
2180 @*List configured flash banks
2181 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2182 @subsection flash info
2183 @b{flash info} <@var{num}>
2185 @*Print info about flash bank <@option{num}>
2186 @subsection flash probe
2187 @b{flash probe} <@var{num}>
2189 @*Identify the flash, or validate the parameters of the configured flash. Operation
2190 depends on the flash type.
2191 @subsection flash erase_check
2192 @b{flash erase_check} <@var{num}>
2193 @cindex flash erase_check
2194 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2195 updates the erase state information displayed by @option{flash info}. That means you have
2196 to issue an @option{erase_check} command after erasing or programming the device to get
2197 updated information.
2198 @subsection flash protect_check
2199 @b{flash protect_check} <@var{num}>
2200 @cindex flash protect_check
2201 @*Check protection state of sectors in flash bank <num>.
2202 @option{flash erase_sector} using the same syntax.
2203 @subsection flash erase_sector
2204 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2205 @cindex flash erase_sector
2206 @anchor{flash erase_sector}
2207 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2208 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2209 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2211 @subsection flash erase_address
2212 @b{flash erase_address} <@var{address}> <@var{length}>
2213 @cindex flash erase_address
2214 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2215 @subsection flash write_bank
2216 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2217 @cindex flash write_bank
2218 @anchor{flash write_bank}
2219 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2220 <@option{offset}> bytes from the beginning of the bank.
2221 @subsection flash write_image
2222 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2223 @cindex flash write_image
2224 @anchor{flash write_image}
2225 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2226 [@var{offset}] can be specified and the file [@var{type}] can be specified
2227 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2228 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2229 if the @option{erase} parameter is given.
2230 @subsection flash protect
2231 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2232 @cindex flash protect
2233 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2234 <@var{last}> of @option{flash bank} <@var{num}>.
2236 @subsection mFlash commands
2237 @cindex mFlash commands
2239 @item @b{mflash probe}
2240 @cindex mflash probe
2242 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2243 @cindex mflash write
2244 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2245 <@var{offset}> bytes from the beginning of the bank.
2246 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2248 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2252 @section flash bank command
2253 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2256 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2257 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2260 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2261 and <@var{bus_width}> bytes using the selected flash <driver>.
2263 @subsection External Flash - cfi options
2265 CFI flashes are external flash chips - often they are connected to a
2266 specific chip select on the CPU. By default, at hard reset, most
2267 CPUs have the ablity to ``boot'' from some flash chip - typically
2268 attached to the CPU's CS0 pin.
2270 For other chip selects: OpenOCD does not know how to configure, or
2271 access a specific chip select. Instead you, the human, might need to
2272 configure additional chip selects via other commands (like: mww) , or
2273 perhaps configure a GPIO pin that controls the ``write protect'' pin
2276 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2277 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2278 @*CFI flashes require the number of the target they're connected to as an additional
2279 argument. The CFI driver makes use of a working area (specified for the target)
2280 to significantly speed up operation.
2282 @var{chip_width} and @var{bus_width} are specified in bytes.
2284 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2288 @subsection Internal Flash (Microcontrollers)
2289 @subsubsection lpc2000 options
2290 @cindex lpc2000 options
2292 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2293 <@var{clock}> [@var{calc_checksum}]
2294 @*LPC flashes don't require the chip and bus width to be specified. Additional
2295 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2296 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2297 of the target this flash belongs to (first is 0), the frequency at which the core
2298 is currently running (in kHz - must be an integral number), and the optional keyword
2299 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2303 @subsubsection at91sam7 options
2304 @cindex at91sam7 options
2306 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2307 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2308 reading the chip-id and type.
2310 @subsubsection str7 options
2311 @cindex str7 options
2313 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2314 @*variant can be either STR71x, STR73x or STR75x.
2316 @subsubsection str9 options
2317 @cindex str9 options
2319 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2320 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2322 str9x flash_config 0 4 2 0 0x80000
2324 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2326 @subsubsection str9 options (str9xpec driver)
2328 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2329 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2330 @option{enable_turbo} <@var{num>.}
2332 Only use this driver for locking/unlocking the device or configuring the option bytes.
2333 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2335 @subsubsection Stellaris (LM3Sxxx) options
2336 @cindex Stellaris (LM3Sxxx) options
2338 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2339 @*Stellaris flash plugin only require the @var{target#}.
2341 @subsubsection stm32x options
2342 @cindex stm32x options
2344 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2345 @*stm32x flash plugin only require the @var{target#}.
2347 @subsubsection aduc702x options
2348 @cindex aduc702x options
2350 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2351 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2353 @subsection mFlash Configuration
2354 @cindex mFlash Configuration
2355 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2356 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2358 @*Configures a mflash for <@var{soc}> host bank at
2359 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2360 order. Pin number format is dependent on host GPIO calling convention.
2361 If WP or DPD pin was not used, write -1. Currently, mflash bank
2362 support s3c2440 and pxa270.
2364 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2366 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2368 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2370 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2373 @section Microcontroller specific Flash Commands
2375 @subsection AT91SAM7 specific commands
2376 @cindex AT91SAM7 specific commands
2377 The flash configuration is deduced from the chip identification register. The flash
2378 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2379 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2380 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2381 that can be erased separatly. Only an EraseAll command is supported by the controller
2382 for each flash plane and this is called with
2384 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2385 @*bulk erase flash planes first_plane to last_plane.
2386 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2387 @cindex at91sam7 gpnvm
2388 @*set or clear a gpnvm bit for the processor
2391 @subsection STR9 specific commands
2392 @cindex STR9 specific commands
2393 @anchor{STR9 specific commands}
2394 These are flash specific commands when using the str9xpec driver.
2396 @item @b{str9xpec enable_turbo} <@var{num}>
2397 @cindex str9xpec enable_turbo
2398 @*enable turbo mode, will simply remove the str9 from the chain and talk
2399 directly to the embedded flash controller.
2400 @item @b{str9xpec disable_turbo} <@var{num}>
2401 @cindex str9xpec disable_turbo
2402 @*restore the str9 into JTAG chain.
2403 @item @b{str9xpec lock} <@var{num}>
2404 @cindex str9xpec lock
2405 @*lock str9 device. The str9 will only respond to an unlock command that will
2407 @item @b{str9xpec unlock} <@var{num}>
2408 @cindex str9xpec unlock
2409 @*unlock str9 device.
2410 @item @b{str9xpec options_read} <@var{num}>
2411 @cindex str9xpec options_read
2412 @*read str9 option bytes.
2413 @item @b{str9xpec options_write} <@var{num}>
2414 @cindex str9xpec options_write
2415 @*write str9 option bytes.
2418 Note: Before using the str9xpec driver here is some background info to help
2419 you better understand how the drivers works. OpenOCD has two flash drivers for
2423 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2424 flash programming as it is faster than the @option{str9xpec} driver.
2426 Direct programming @option{str9xpec} using the flash controller. This is an
2427 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2428 core does not need to be running to program using this flash driver. Typical use
2429 for this driver is locking/unlocking the target and programming the option bytes.
2432 Before we run any commands using the @option{str9xpec} driver we must first disable
2433 the str9 core. This example assumes the @option{str9xpec} driver has been
2434 configured for flash bank 0.
2436 # assert srst, we do not want core running
2437 # while accessing str9xpec flash driver
2439 # turn off target polling
2442 str9xpec enable_turbo 0
2444 str9xpec options_read 0
2445 # re-enable str9 core
2446 str9xpec disable_turbo 0
2450 The above example will read the str9 option bytes.
2451 When performing a unlock remember that you will not be able to halt the str9 - it
2452 has been locked. Halting the core is not required for the @option{str9xpec} driver
2453 as mentioned above, just issue the commands above manually or from a telnet prompt.
2455 @subsection STR9 configuration
2456 @cindex STR9 configuration
2458 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2459 <@var{BBADR}> <@var{NBBADR}>
2460 @cindex str9x flash_config
2461 @*Configure str9 flash controller.
2463 e.g. str9x flash_config 0 4 2 0 0x80000
2465 BBSR - Boot Bank Size register
2466 NBBSR - Non Boot Bank Size register
2467 BBADR - Boot Bank Start Address register
2468 NBBADR - Boot Bank Start Address register
2472 @subsection STR9 option byte configuration
2473 @cindex STR9 option byte configuration
2475 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2476 @cindex str9xpec options_cmap
2477 @*configure str9 boot bank.
2478 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2479 @cindex str9xpec options_lvdthd
2480 @*configure str9 lvd threshold.
2481 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2482 @cindex str9xpec options_lvdsel
2483 @*configure str9 lvd source.
2484 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2485 @cindex str9xpec options_lvdwarn
2486 @*configure str9 lvd reset warning source.
2489 @subsection STM32x specific commands
2490 @cindex STM32x specific commands
2492 These are flash specific commands when using the stm32x driver.
2494 @item @b{stm32x lock} <@var{num}>
2496 @*lock stm32 device.
2497 @item @b{stm32x unlock} <@var{num}>
2498 @cindex stm32x unlock
2499 @*unlock stm32 device.
2500 @item @b{stm32x options_read} <@var{num}>
2501 @cindex stm32x options_read
2502 @*read stm32 option bytes.
2503 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2504 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2505 @cindex stm32x options_write
2506 @*write stm32 option bytes.
2507 @item @b{stm32x mass_erase} <@var{num}>
2508 @cindex stm32x mass_erase
2509 @*mass erase flash memory.
2512 @subsection Stellaris specific commands
2513 @cindex Stellaris specific commands
2515 These are flash specific commands when using the Stellaris driver.
2517 @item @b{stellaris mass_erase} <@var{num}>
2518 @cindex stellaris mass_erase
2519 @*mass erase flash memory.
2522 @node General Commands
2523 @chapter General Commands
2526 The commands documented in this chapter here are common commands that
2527 you, as a human, may want to type and see the output of. Configuration type
2528 commands are documented elsewhere.
2532 @item @b{Source Of Commands}
2533 @* OpenOCD commands can occur in a configuration script (discussed
2534 elsewhere) or typed manually by a human or supplied programatically,
2535 or via one of several TCP/IP Ports.
2537 @item @b{From the human}
2538 @* A human should interact with the telnet interface (default port: 4444,
2539 or via GDB, default port 3333)
2541 To issue commands from within a GDB session, use the @option{monitor}
2542 command, e.g. use @option{monitor poll} to issue the @option{poll}
2543 command. All output is relayed through the GDB session.
2545 @item @b{Machine Interface}
2546 The Tcl interface's intent is to be a machine interface. The default Tcl
2551 @section Daemon Commands
2553 @subsection sleep [@var{msec}]
2555 @*Wait for n milliseconds before resuming. Useful in connection with script files
2556 (@var{script} command and @var{target_script} configuration).
2558 @subsection shutdown
2560 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2562 @subsection debug_level [@var{n}]
2564 @anchor{debug_level}
2565 @*Display or adjust debug level to n<0-3>
2567 @subsection fast [@var{enable|disable}]
2569 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2570 downloads and fast memory access will work if the JTAG interface isn't too fast and
2571 the core doesn't run at a too low frequency. Note that this option only changes the default
2572 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2575 The target specific "dangerous" optimisation tweaking options may come and go
2576 as more robust and user friendly ways are found to ensure maximum throughput
2577 and robustness with a minimum of configuration.
2579 Typically the "fast enable" is specified first on the command line:
2582 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2585 @subsection log_output <@var{file}>
2587 @*Redirect logging to <file> (default: stderr)
2589 @subsection script <@var{file}>
2591 @*Execute commands from <file>
2592 See also: ``source [find FILENAME]''
2594 @section Target state handling
2595 @subsection power <@var{on}|@var{off}>
2597 @*Turn power switch to target on/off.
2598 No arguments: print status.
2599 Not all interfaces support this.
2601 @subsection reg [@option{#}|@option{name}] [value]
2603 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2604 No arguments: list all available registers for the current target.
2605 Number or name argument: display a register.
2606 Number or name and value arguments: set register value.
2608 @subsection poll [@option{on}|@option{off}]
2610 @*Poll the target for its current state. If the target is in debug mode, architecture
2611 specific information about the current state is printed. An optional parameter
2612 allows continuous polling to be enabled and disabled.
2614 @subsection halt [@option{ms}]
2616 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2617 Default [@option{ms}] is 5 seconds if no arg given.
2618 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2619 will stop OpenOCD from waiting.
2621 @subsection wait_halt [@option{ms}]
2623 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2624 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2627 @subsection resume [@var{address}]
2629 @*Resume the target at its current code position, or at an optional address.
2630 OpenOCD will wait 5 seconds for the target to resume.
2632 @subsection step [@var{address}]
2634 @*Single-step the target at its current code position, or at an optional address.
2636 @subsection reset [@option{run}|@option{halt}|@option{init}]
2638 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2640 With no arguments a "reset run" is executed
2644 @*Let the target run.
2647 @*Immediately halt the target (works only with certain configurations).
2650 @*Immediately halt the target, and execute the reset script (works only with certain
2654 @subsection soft_reset_halt
2656 @*Requesting target halt and executing a soft reset. This is often used
2657 when a target cannot be reset and halted. The target, after reset is
2658 released begins to execute code. OpenOCD attempts to stop the CPU and
2659 then sets the program counter back to the reset vector. Unfortunately
2660 the code that was executed may have left the hardware in an unknown
2664 @section Memory access commands
2666 display available RAM memory.
2667 @subsection Memory peek/poke type commands
2668 These commands allow accesses of a specific size to the memory
2669 system. Often these are used to configure the current target in some
2670 special way. For example - one may need to write certian values to the
2671 SDRAM controller to enable SDRAM.
2674 @item To change the current target see the ``targets'' (plural) command
2675 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2679 @item @b{mdw} <@var{addr}> [@var{count}]
2681 @*display memory words (32bit)
2682 @item @b{mdh} <@var{addr}> [@var{count}]
2684 @*display memory half-words (16bit)
2685 @item @b{mdb} <@var{addr}> [@var{count}]
2687 @*display memory bytes (8bit)
2688 @item @b{mww} <@var{addr}> <@var{value}>
2690 @*write memory word (32bit)
2691 @item @b{mwh} <@var{addr}> <@var{value}>
2693 @*write memory half-word (16bit)
2694 @item @b{mwb} <@var{addr}> <@var{value}>
2696 @*write memory byte (8bit)
2699 @section Image loading commands
2700 @subsection load_image
2701 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2704 @*Load image <@var{file}> to target memory at <@var{address}>
2705 @subsection fast_load_image
2706 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2707 @cindex fast_load_image
2708 @anchor{fast_load_image}
2709 @*Normally you should be using @b{load_image} or GDB load. However, for
2710 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2711 host), storing the image in memory and uploading the image to the target
2712 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2713 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2714 memory, i.e. does not affect target. This approach is also useful when profiling
2715 target programming performance as I/O and target programming can easily be profiled
2717 @subsection fast_load
2721 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2722 @subsection dump_image
2723 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2726 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2727 (binary) <@var{file}>.
2728 @subsection verify_image
2729 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2730 @cindex verify_image
2731 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2732 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2735 @section Breakpoint commands
2736 @cindex Breakpoint commands
2738 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2740 @*set breakpoint <address> <length> [hw]
2741 @item @b{rbp} <@var{addr}>
2743 @*remove breakpoint <adress>
2744 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2746 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2747 @item @b{rwp} <@var{addr}>
2749 @*remove watchpoint <adress>
2752 @section Misc Commands
2753 @cindex Other Target Commands
2755 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2757 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2761 @section Target Specific Commands
2762 @cindex Target Specific Commands
2766 @section Architecture Specific Commands
2767 @cindex Architecture Specific Commands
2769 @subsection ARMV4/5 specific commands
2770 @cindex ARMV4/5 specific commands
2772 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2773 or Intel XScale (XScale isn't supported yet).
2775 @item @b{armv4_5 reg}
2777 @*Display a list of all banked core registers, fetching the current value from every
2778 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2780 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2781 @cindex armv4_5 core_mode
2782 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2783 The target is resumed in the currently set @option{core_mode}.
2786 @subsection ARM7/9 specific commands
2787 @cindex ARM7/9 specific commands
2789 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2790 ARM920T or ARM926EJ-S.
2792 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2793 @cindex arm7_9 dbgrq
2794 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2795 safe for all but ARM7TDMI--S cores (like Philips LPC).
2796 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2797 @cindex arm7_9 fast_memory_access
2798 @anchor{arm7_9 fast_memory_access}
2799 @*Allow OpenOCD to read and write memory without checking completion of
2800 the operation. This provides a huge speed increase, especially with USB JTAG
2801 cables (FT2232), but might be unsafe if used with targets running at very low
2802 speeds, like the 32kHz startup clock of an AT91RM9200.
2803 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2804 @cindex arm7_9 dcc_downloads
2805 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2806 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2807 unsafe, especially with targets running at very low speeds. This command was introduced
2808 with OpenOCD rev. 60.
2811 @subsection ARM720T specific commands
2812 @cindex ARM720T specific commands
2815 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2816 @cindex arm720t cp15
2817 @*display/modify cp15 register <@option{num}> [@option{value}].
2818 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2819 @cindex arm720t md<bhw>_phys
2820 @*Display memory at physical address addr.
2821 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2822 @cindex arm720t mw<bhw>_phys
2823 @*Write memory at physical address addr.
2824 @item @b{arm720t virt2phys} <@var{va}>
2825 @cindex arm720t virt2phys
2826 @*Translate a virtual address to a physical address.
2829 @subsection ARM9TDMI specific commands
2830 @cindex ARM9TDMI specific commands
2833 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2834 @cindex arm9tdmi vector_catch
2835 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2836 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2837 @option{irq} @option{fiq}.
2839 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2842 @subsection ARM966E specific commands
2843 @cindex ARM966E specific commands
2846 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2847 @cindex arm966e cp15
2848 @*display/modify cp15 register <@option{num}> [@option{value}].
2851 @subsection ARM920T specific commands
2852 @cindex ARM920T specific commands
2855 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2856 @cindex arm920t cp15
2857 @*display/modify cp15 register <@option{num}> [@option{value}].
2858 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2859 @cindex arm920t cp15i
2860 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2861 @item @b{arm920t cache_info}
2862 @cindex arm920t cache_info
2863 @*Print information about the caches found. This allows to see whether your target
2864 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2865 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2866 @cindex arm920t md<bhw>_phys
2867 @*Display memory at physical address addr.
2868 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2869 @cindex arm920t mw<bhw>_phys
2870 @*Write memory at physical address addr.
2871 @item @b{arm920t read_cache} <@var{filename}>
2872 @cindex arm920t read_cache
2873 @*Dump the content of ICache and DCache to a file.
2874 @item @b{arm920t read_mmu} <@var{filename}>
2875 @cindex arm920t read_mmu
2876 @*Dump the content of the ITLB and DTLB to a file.
2877 @item @b{arm920t virt2phys} <@var{va}>
2878 @cindex arm920t virt2phys
2879 @*Translate a virtual address to a physical address.
2882 @subsection ARM926EJ-S specific commands
2883 @cindex ARM926EJ-S specific commands
2886 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2887 @cindex arm926ejs cp15
2888 @*display/modify cp15 register <@option{num}> [@option{value}].
2889 @item @b{arm926ejs cache_info}
2890 @cindex arm926ejs cache_info
2891 @*Print information about the caches found.
2892 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2893 @cindex arm926ejs md<bhw>_phys
2894 @*Display memory at physical address addr.
2895 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2896 @cindex arm926ejs mw<bhw>_phys
2897 @*Write memory at physical address addr.
2898 @item @b{arm926ejs virt2phys} <@var{va}>
2899 @cindex arm926ejs virt2phys
2900 @*Translate a virtual address to a physical address.
2903 @subsection CORTEX_M3 specific commands
2904 @cindex CORTEX_M3 specific commands
2907 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2908 @cindex cortex_m3 maskisr
2909 @*Enable masking (disabling) interrupts during target step/resume.
2913 @section Debug commands
2914 @cindex Debug commands
2915 The following commands give direct access to the core, and are most likely
2916 only useful while debugging OpenOCD.
2918 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2919 @cindex arm7_9 write_xpsr
2920 @*Immediately write either the current program status register (CPSR) or the saved
2921 program status register (SPSR), without changing the register cache (as displayed
2922 by the @option{reg} and @option{armv4_5 reg} commands).
2923 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2924 <@var{0=cpsr},@var{1=spsr}>
2925 @cindex arm7_9 write_xpsr_im8
2926 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2927 operation (similar to @option{write_xpsr}).
2928 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2929 @cindex arm7_9 write_core_reg
2930 @*Write a core register, without changing the register cache (as displayed by the
2931 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2932 encoding of the [M4:M0] bits of the PSR.
2935 @section Target Requests
2936 @cindex Target Requests
2937 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2938 See libdcc in the contrib dir for more details.
2940 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}|@var{charmsg}>
2941 @cindex target_request debugmsgs
2942 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running. @var{charmsg} receives messages if Linux kernel ``Kernel low-level debugging via EmbeddedICE DCC channel'' option is enabled.
2946 @chapter JTAG Commands
2947 @cindex JTAG Commands
2948 Generally most people will not use the bulk of these commands. They
2949 are mostly used by the OpenOCD developers or those who need to
2950 directly manipulate the JTAG taps.
2952 In general these commands control JTAG taps at a very low level. For
2953 example if you need to control a JTAG Route Controller (i.e.: the
2954 OMAP3530 on the Beagle Board has one) you might use these commands in
2955 a script or an event procedure.
2959 @item @b{scan_chain}
2961 @*Print current scan chain configuration.
2962 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2964 @*Toggle reset lines.
2965 @item @b{endstate} <@var{tap_state}>
2967 @*Finish JTAG operations in <@var{tap_state}>.
2968 @item @b{runtest} <@var{num_cycles}>
2970 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2971 @item @b{statemove} [@var{tap_state}]
2973 @*Move to current endstate or [@var{tap_state}]
2974 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2976 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2977 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2979 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2980 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2981 @cindex verify_ircapture
2982 @*Verify value captured during Capture-IR. Default is enabled.
2983 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2985 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2986 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2988 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2993 Available tap_states are:
3033 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
3034 be used to access files on PCs (either the developer's PC or some other PC).
3036 The way this works on the ZY1000 is to prefix a filename by
3037 "/tftp/ip/" and append the TFTP path on the TFTP
3038 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
3039 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
3040 if the file was hosted on the embedded host.
3042 In order to achieve decent performance, you must choose a TFTP server
3043 that supports a packet size bigger than the default packet size (512 bytes). There
3044 are numerous TFTP servers out there (free and commercial) and you will have to do
3045 a bit of googling to find something that fits your requirements.
3047 @node Sample Scripts
3048 @chapter Sample Scripts
3051 This page shows how to use the Target Library.
3053 The configuration script can be divided into the following sections:
3055 @item Daemon configuration
3057 @item JTAG scan chain
3058 @item Target configuration
3059 @item Flash configuration
3062 Detailed information about each section can be found at OpenOCD configuration.
3064 @section AT91R40008 example
3065 @cindex AT91R40008 example
3066 To start OpenOCD with a target script for the AT91R40008 CPU and reset
3067 the CPU upon startup of the OpenOCD daemon.
3069 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
3073 @node GDB and OpenOCD
3074 @chapter GDB and OpenOCD
3075 @cindex GDB and OpenOCD
3076 OpenOCD complies with the remote gdbserver protocol, and as such can be used
3077 to debug remote targets.
3079 @section Connecting to GDB
3080 @cindex Connecting to GDB
3081 @anchor{Connecting to GDB}
3082 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
3083 instance GDB 6.3 has a known bug that produces bogus memory access
3084 errors, which has since been fixed: look up 1836 in
3085 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
3087 @*OpenOCD can communicate with GDB in two ways:
3090 A socket (TCP/IP) connection is typically started as follows:
3092 target remote localhost:3333
3094 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3096 A pipe connection is typically started as follows:
3098 target remote | openocd --pipe
3100 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3101 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3105 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3108 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3109 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3110 packet size and the device's memory map.
3112 Previous versions of OpenOCD required the following GDB options to increase
3113 the packet size and speed up GDB communication:
3115 set remote memory-write-packet-size 1024
3116 set remote memory-write-packet-size fixed
3117 set remote memory-read-packet-size 1024
3118 set remote memory-read-packet-size fixed
3120 This is now handled in the @option{qSupported} PacketSize and should not be required.
3122 @section Programming using GDB
3123 @cindex Programming using GDB
3125 By default the target memory map is sent to GDB. This can be disabled by
3126 the following OpenOCD configuration option:
3128 gdb_memory_map disable
3130 For this to function correctly a valid flash configuration must also be set
3131 in OpenOCD. For faster performance you should also configure a valid
3134 Informing GDB of the memory map of the target will enable GDB to protect any
3135 flash areas of the target and use hardware breakpoints by default. This means
3136 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3137 using a memory map. @xref{gdb_breakpoint_override}.
3139 To view the configured memory map in GDB, use the GDB command @option{info mem}
3140 All other unassigned addresses within GDB are treated as RAM.
3142 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3143 This can be changed to the old behaviour by using the following GDB command
3145 set mem inaccessible-by-default off
3148 If @option{gdb_flash_program enable} is also used, GDB will be able to
3149 program any flash memory using the vFlash interface.
3151 GDB will look at the target memory map when a load command is given, if any
3152 areas to be programmed lie within the target flash area the vFlash packets
3155 If the target needs configuring before GDB programming, an event
3156 script can be executed:
3158 $_TARGETNAME configure -event EVENTNAME BODY
3161 To verify any flash programming the GDB command @option{compare-sections}
3164 @node Tcl Scripting API
3165 @chapter Tcl Scripting API
3166 @cindex Tcl Scripting API
3170 The commands are stateless. E.g. the telnet command line has a concept
3171 of currently active target, the Tcl API proc's take this sort of state
3172 information as an argument to each proc.
3174 There are three main types of return values: single value, name value
3175 pair list and lists.
3177 Name value pair. The proc 'foo' below returns a name/value pair
3183 > set foo(you) Oyvind
3184 > set foo(mouse) Micky
3185 > set foo(duck) Donald
3193 me Duane you Oyvind mouse Micky duck Donald
3195 Thus, to get the names of the associative array is easy:
3197 foreach { name value } [set foo] {
3198 puts "Name: $name, Value: $value"
3202 Lists returned must be relatively small. Otherwise a range
3203 should be passed in to the proc in question.
3205 @section Internal low-level Commands
3207 By low-level, the intent is a human would not directly use these commands.
3209 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3210 is the low level API upon which "flash banks" is implemented.
3213 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3215 Read memory and return as a Tcl array for script processing
3216 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3218 Convert a Tcl array to memory locations and write the values
3219 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3221 Return information about the flash banks
3224 OpenOCD commands can consist of two words, e.g. "flash banks". The
3225 startup.tcl "unknown" proc will translate this into a Tcl proc
3226 called "flash_banks".
3228 @section OpenOCD specific Global Variables
3232 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3233 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3234 holds one of the following values:
3237 @item @b{winxx} Built using Microsoft Visual Studio
3238 @item @b{linux} Linux is the underlying operating sytem
3239 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3240 @item @b{cygwin} Running under Cygwin
3241 @item @b{mingw32} Running under MingW32
3242 @item @b{other} Unknown, none of the above.
3245 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3248 @chapter Deprecated/Removed Commands
3249 @cindex Deprecated/Removed Commands
3250 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3253 @item @b{arm7_9 fast_writes}
3254 @cindex arm7_9 fast_writes
3255 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3256 @item @b{arm7_9 force_hw_bkpts}
3257 @cindex arm7_9 force_hw_bkpts
3258 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3259 for flash if the GDB memory map has been set up(default when flash is declared in
3260 target configuration). @xref{gdb_breakpoint_override}.
3261 @item @b{arm7_9 sw_bkpts}
3262 @cindex arm7_9 sw_bkpts
3263 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3264 @item @b{daemon_startup}
3265 @cindex daemon_startup
3266 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3267 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3268 and @option{target cortex_m3 little reset_halt 0}.
3269 @item @b{dump_binary}
3271 @*use @option{dump_image} command with same args. @xref{dump_image}.
3272 @item @b{flash erase}
3274 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3275 @item @b{flash write}
3277 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3278 @item @b{flash write_binary}
3279 @cindex flash write_binary
3280 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3281 @item @b{flash auto_erase}
3282 @cindex flash auto_erase
3283 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3284 @item @b{load_binary}
3286 @*use @option{load_image} command with same args. @xref{load_image}.
3287 @item @b{run_and_halt_time}
3288 @cindex run_and_halt_time
3289 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3296 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3298 @*use the create subcommand of @option{target}.
3299 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3300 @cindex target_script
3301 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3302 @item @b{working_area}
3303 @cindex working_area
3304 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3311 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3313 @cindex adaptive clocking
3316 In digital circuit design it is often refered to as ``clock
3317 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3318 operating at some speed, your target is operating at another. The two
3319 clocks are not synchronised, they are ``asynchronous''
3321 In order for the two to work together they must be synchronised. Otherwise
3322 the two systems will get out of sync with each other and nothing will
3323 work. There are 2 basic options:
3326 Use a special circuit.
3328 One clock must be some multiple slower than the other.
3331 @b{Does this really matter?} For some chips and some situations, this
3332 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3333 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3334 program/enable the oscillators and eventually the main clock. It is in
3335 those critical times you must slow the JTAG clock to sometimes 1 to
3338 Imagine debugging a 500MHz ARM926 hand held battery powered device
3339 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3342 @b{Solution #1 - A special circuit}
3344 In order to make use of this, your JTAG dongle must support the RTCK
3345 feature. Not all dongles support this - keep reading!
3347 The RTCK signal often found in some ARM chips is used to help with
3348 this problem. ARM has a good description of the problem described at
3349 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3350 28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
3351 work? / how does adaptive clocking work?''.
3353 The nice thing about adaptive clocking is that ``battery powered hand
3354 held device example'' - the adaptiveness works perfectly all the
3355 time. One can set a break point or halt the system in the deep power
3356 down code, slow step out until the system speeds up.
3358 @b{Solution #2 - Always works - but may be slower}
3360 Often this is a perfectly acceptable solution.
3362 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3363 the target clock speed. But what that ``magic division'' is varies
3364 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3365 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3366 1/12 the clock speed.
3368 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3370 You can still debug the 'low power' situations - you just need to
3371 manually adjust the clock speed at every step. While painful and
3372 tedious, it is not always practical.
3374 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3375 have a special debug mode in your application that does a ``high power
3376 sleep''. If you are careful - 98% of your problems can be debugged
3379 To set the JTAG frequency use the command:
3387 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3389 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3390 around Windows filenames.
3403 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3405 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3406 claims to come with all the necessary DLLs. When using Cygwin, try launching
3407 OpenOCD from the Cygwin shell.
3409 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3410 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3411 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3413 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3414 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3415 software breakpoints consume one of the two available hardware breakpoints.
3417 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3419 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3420 clock at the time you're programming the flash. If you've specified the crystal's
3421 frequency, make sure the PLL is disabled. If you've specified the full core speed
3422 (e.g. 60MHz), make sure the PLL is enabled.
3424 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3425 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3426 out while waiting for end of scan, rtck was disabled".
3428 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3429 settings in your PC BIOS (ECP, EPP, and different versions of those).
3431 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3432 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3433 memory read caused data abort".
3435 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3436 beyond the last valid frame. It might be possible to prevent this by setting up
3437 a proper "initial" stack frame, if you happen to know what exactly has to
3438 be done, feel free to add this here.
3440 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3441 stack before calling main(). What GDB is doing is ``climbing'' the run
3442 time stack by reading various values on the stack using the standard
3443 call frame for the target. GDB keeps going - until one of 2 things
3444 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3445 stackframes have been processed. By pushing zeros on the stack, GDB
3448 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3449 your C code, do the same - artifically push some zeros onto the stack,
3450 remember to pop them off when the ISR is done.
3452 @b{Also note:} If you have a multi-threaded operating system, they
3453 often do not @b{in the intrest of saving memory} waste these few
3457 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3458 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3460 This warning doesn't indicate any serious problem, as long as you don't want to
3461 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3462 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3463 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3464 independently. With this setup, it's not possible to halt the core right out of
3465 reset, everything else should work fine.
3467 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3468 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3469 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3470 quit with an error message. Is there a stability issue with OpenOCD?
3472 No, this is not a stability issue concerning OpenOCD. Most users have solved
3473 this issue by simply using a self-powered USB hub, which they connect their
3474 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3475 supply stable enough for the Amontec JTAGkey to be operated.
3477 @b{Laptops running on battery have this problem too...}
3479 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3480 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3481 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3482 What does that mean and what might be the reason for this?
3484 First of all, the reason might be the USB power supply. Try using a self-powered
3485 hub instead of a direct connection to your computer. Secondly, the error code 4
3486 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3487 chip ran into some sort of error - this points us to a USB problem.
3489 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3490 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3491 What does that mean and what might be the reason for this?
3493 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3494 has closed the connection to OpenOCD. This might be a GDB issue.
3496 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3497 are described, there is a parameter for specifying the clock frequency
3498 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3499 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3500 specified in kilohertz. However, I do have a quartz crystal of a
3501 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3502 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3505 No. The clock frequency specified here must be given as an integral number.
3506 However, this clock frequency is used by the In-Application-Programming (IAP)
3507 routines of the LPC2000 family only, which seems to be very tolerant concerning
3508 the given clock frequency, so a slight difference between the specified clock
3509 frequency and the actual clock frequency will not cause any trouble.
3511 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3513 Well, yes and no. Commands can be given in arbitrary order, yet the
3514 devices listed for the JTAG scan chain must be given in the right
3515 order (jtag newdevice), with the device closest to the TDO-Pin being
3516 listed first. In general, whenever objects of the same type exist
3517 which require an index number, then these objects must be given in the
3518 right order (jtag newtap, targets and flash banks - a target
3519 references a jtag newtap and a flash bank references a target).
3521 You can use the ``scan_chain'' command to verify and display the tap order.
3523 @item @b{JTAG Tap Order} JTAG tap order - command order
3525 Many newer devices have multiple JTAG taps. For example: ST
3526 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3527 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3528 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3529 connected to the boundary scan tap, which then connects to the
3530 Cortex-M3 tap, which then connects to the TDO pin.
3532 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3533 (2) The boundary scan tap. If your board includes an additional JTAG
3534 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3535 place it before or after the STM32 chip in the chain. For example:
3538 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3539 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3540 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3541 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3542 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3545 The ``jtag device'' commands would thus be in the order shown below. Note:
3548 @item jtag newtap Xilinx tap -irlen ...
3549 @item jtag newtap stm32 cpu -irlen ...
3550 @item jtag newtap stm32 bs -irlen ...
3551 @item # Create the debug target and say where it is
3552 @item target create stm32.cpu -chain-position stm32.cpu ...
3556 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3557 log file, I can see these error messages: Error: arm7_9_common.c:561
3558 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3564 @node Tcl Crash Course
3565 @chapter Tcl Crash Course
3568 Not everyone knows Tcl - this is not intended to be a replacement for
3569 learning Tcl, the intent of this chapter is to give you some idea of
3570 how the Tcl scripts work.
3572 This chapter is written with two audiences in mind. (1) OpenOCD users
3573 who need to understand a bit more of how JIM-Tcl works so they can do
3574 something useful, and (2) those that want to add a new command to
3577 @section Tcl Rule #1
3578 There is a famous joke, it goes like this:
3580 @item Rule #1: The wife is always correct
3581 @item Rule #2: If you think otherwise, See Rule #1
3584 The Tcl equal is this:
3587 @item Rule #1: Everything is a string
3588 @item Rule #2: If you think otherwise, See Rule #1
3591 As in the famous joke, the consequences of Rule #1 are profound. Once
3592 you understand Rule #1, you will understand Tcl.
3594 @section Tcl Rule #1b
3595 There is a second pair of rules.
3597 @item Rule #1: Control flow does not exist. Only commands
3598 @* For example: the classic FOR loop or IF statement is not a control
3599 flow item, they are commands, there is no such thing as control flow
3601 @item Rule #2: If you think otherwise, See Rule #1
3602 @* Actually what happens is this: There are commands that by
3603 convention, act like control flow key words in other languages. One of
3604 those commands is the word ``for'', another command is ``if''.
3607 @section Per Rule #1 - All Results are strings
3608 Every Tcl command results in a string. The word ``result'' is used
3609 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3610 Everything is a string}
3612 @section Tcl Quoting Operators
3613 In life of a Tcl script, there are two important periods of time, the
3614 difference is subtle.
3617 @item Evaluation Time
3620 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3621 three primary quoting constructs, the [square-brackets] the
3622 @{curly-braces@} and ``double-quotes''
3624 By now you should know $VARIABLES always start with a $DOLLAR
3625 sign. BTW: To set a variable, you actually use the command ``set'', as
3626 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3627 = 1'' statement, but without the equal sign.
3630 @item @b{[square-brackets]}
3631 @* @b{[square-brackets]} are command substitutions. It operates much
3632 like Unix Shell `back-ticks`. The result of a [square-bracket]
3633 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3634 string}. These two statements are roughly identical:
3638 echo "The Date is: $X"
3641 puts "The Date is: $X"
3643 @item @b{``double-quoted-things''}
3644 @* @b{``double-quoted-things''} are just simply quoted
3645 text. $VARIABLES and [square-brackets] are expanded in place - the
3646 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3650 puts "It is now \"[date]\", $x is in 1 hour"
3652 @item @b{@{Curly-Braces@}}
3653 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3654 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3655 'single-quote' operators in BASH shell scripts, with the added
3656 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3657 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3658 28/nov/2008, Jim/OpenOCD does not have a date command.
3661 @section Consequences of Rule 1/2/3/4
3663 The consequences of Rule 1 are profound.
3665 @subsection Tokenisation & Execution.
3667 Of course, whitespace, blank lines and #comment lines are handled in
3670 As a script is parsed, each (multi) line in the script file is
3671 tokenised and according to the quoting rules. After tokenisation, that
3672 line is immedatly executed.
3674 Multi line statements end with one or more ``still-open''
3675 @{curly-braces@} which - eventually - closes a few lines later.
3677 @subsection Command Execution
3679 Remember earlier: There are no ``control flow''
3680 statements in Tcl. Instead there are COMMANDS that simply act like
3681 control flow operators.
3683 Commands are executed like this:
3686 @item Parse the next line into (argc) and (argv[]).
3687 @item Look up (argv[0]) in a table and call its function.
3688 @item Repeat until End Of File.
3691 It sort of works like this:
3694 ReadAndParse( &argc, &argv );
3696 cmdPtr = LookupCommand( argv[0] );
3698 (*cmdPtr->Execute)( argc, argv );
3702 When the command ``proc'' is parsed (which creates a procedure
3703 function) it gets 3 parameters on the command line. @b{1} the name of
3704 the proc (function), @b{2} the list of parameters, and @b{3} the body
3705 of the function. Not the choice of words: LIST and BODY. The PROC
3706 command stores these items in a table somewhere so it can be found by
3709 @subsection The FOR command
3711 The most interesting command to look at is the FOR command. In Tcl,
3712 the FOR command is normally implemented in C. Remember, FOR is a
3713 command just like any other command.
3715 When the ascii text containing the FOR command is parsed, the parser
3716 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3720 @item The ascii text 'for'
3721 @item The start text
3722 @item The test expression
3727 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3728 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3729 Often many of those parameters are in @{curly-braces@} - thus the
3730 variables inside are not expanded or replaced until later.
3732 Remember that every Tcl command looks like the classic ``main( argc,
3733 argv )'' function in C. In JimTCL - they actually look like this:
3737 MyCommand( Jim_Interp *interp,
3739 Jim_Obj * const *argvs );
3742 Real Tcl is nearly identical. Although the newer versions have
3743 introduced a byte-code parser and intepreter, but at the core, it
3744 still operates in the same basic way.
3746 @subsection FOR command implementation
3748 To understand Tcl it is perhaps most helpful to see the FOR
3749 command. Remember, it is a COMMAND not a control flow structure.
3751 In Tcl there are two underlying C helper functions.
3753 Remember Rule #1 - You are a string.
3755 The @b{first} helper parses and executes commands found in an ascii
3756 string. Commands can be seperated by semicolons, or newlines. While
3757 parsing, variables are expanded via the quoting rules.
3759 The @b{second} helper evaluates an ascii string as a numerical
3760 expression and returns a value.
3762 Here is an example of how the @b{FOR} command could be
3763 implemented. The pseudo code below does not show error handling.
3765 void Execute_AsciiString( void *interp, const char *string );
3767 int Evaluate_AsciiExpression( void *interp, const char *string );
3770 MyForCommand( void *interp,
3775 SetResult( interp, "WRONG number of parameters");
3779 // argv[0] = the ascii string just like C
3781 // Execute the start statement.
3782 Execute_AsciiString( interp, argv[1] );
3786 i = Evaluate_AsciiExpression(interp, argv[2]);
3791 Execute_AsciiString( interp, argv[3] );
3793 // Execute the LOOP part
3794 Execute_AsciiString( interp, argv[4] );
3798 SetResult( interp, "" );
3803 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3804 in the same basic way.
3806 @section OpenOCD Tcl Usage
3808 @subsection source and find commands
3809 @b{Where:} In many configuration files
3810 @* Example: @b{ source [find FILENAME] }
3811 @*Remember the parsing rules
3813 @item The FIND command is in square brackets.
3814 @* The FIND command is executed with the parameter FILENAME. It should
3815 find the full path to the named file. The RESULT is a string, which is
3816 substituted on the orginal command line.
3817 @item The command source is executed with the resulting filename.
3818 @* SOURCE reads a file and executes as a script.
3820 @subsection format command
3821 @b{Where:} Generally occurs in numerous places.
3822 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3828 puts [format "The answer: %d" [expr $x * $y]]
3831 @item The SET command creates 2 variables, X and Y.
3832 @item The double [nested] EXPR command performs math
3833 @* The EXPR command produces numerical result as a string.
3835 @item The format command is executed, producing a single string
3836 @* Refer to Rule #1.
3837 @item The PUTS command outputs the text.
3839 @subsection Body or Inlined Text
3840 @b{Where:} Various TARGET scripts.
3843 proc someproc @{@} @{
3844 ... multiple lines of stuff ...
3846 $_TARGETNAME configure -event FOO someproc
3847 #2 Good - no variables
3848 $_TARGETNAME confgure -event foo "this ; that;"
3849 #3 Good Curly Braces
3850 $_TARGETNAME configure -event FOO @{
3853 #4 DANGER DANGER DANGER
3854 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3857 @item The $_TARGETNAME is an OpenOCD variable convention.
3858 @*@b{$_TARGETNAME} represents the last target created, the value changes
3859 each time a new target is created. Remember the parsing rules. When
3860 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3861 the name of the target which happens to be a TARGET (object)
3863 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3864 @*There are 4 examples:
3866 @item The TCLBODY is a simple string that happens to be a proc name
3867 @item The TCLBODY is several simple commands seperated by semicolons
3868 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3869 @item The TCLBODY is a string with variables that get expanded.
3872 In the end, when the target event FOO occurs the TCLBODY is
3873 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3874 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3876 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3877 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3878 and the text is evaluated. In case #4, they are replaced before the
3879 ``Target Object Command'' is executed. This occurs at the same time
3880 $_TARGETNAME is replaced. In case #4 the date will never
3881 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3882 Jim/OpenOCD does not have a date command@}
3884 @subsection Global Variables
3885 @b{Where:} You might discover this when writing your own procs @* In
3886 simple terms: Inside a PROC, if you need to access a global variable
3887 you must say so. See also ``upvar''. Example:
3889 proc myproc @{ @} @{
3890 set y 0 #Local variable Y
3891 global x #Global variable X
3892 puts [format "X=%d, Y=%d" $x $y]
3895 @section Other Tcl Hacks
3896 @b{Dynamic variable creation}
3898 # Dynamically create a bunch of variables.
3899 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3901 set vn [format "BIT%d" $x]
3905 set $vn [expr (1 << $x)]
3908 @b{Dynamic proc/command creation}
3910 # One "X" function - 5 uart functions.
3911 foreach who @{A B C D E@}
3912 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3916 @node Target Library
3917 @chapter Target Library
3918 @cindex Target Library
3920 OpenOCD comes with a target configuration script library. These scripts can be
3921 used as-is or serve as a starting point.
3923 The target library is published together with the OpenOCD executable and
3924 the path to the target library is in the OpenOCD script search path.
3925 Similarly there are example scripts for configuring the JTAG interface.
3927 The command line below uses the example parport configuration script
3928 that ship with OpenOCD, then configures the str710.cfg target and
3929 finally issues the init and reset commands. The communication speed
3930 is set to 10kHz for reset and 8MHz for post reset.
3933 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3936 To list the target scripts available:
3939 $ ls /usr/local/lib/openocd/target
3941 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3942 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3943 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3944 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3950 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3951 @comment case issue with ``Index.html'' and ``index.html''
3952 @comment Occurs when creating ``--html --no-split'' output
3953 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3954 @unnumbered OpenOCD Index