doc/manual/target/notarm.txt

   1 /** @page targetnotarm OpenOCD Non-ARM Targets
   2
   3 This page describes outstanding issues w.r.t. non-ARM targets.
   4
   5 @section targetnotarmflash Flash drivers
   6
   7 The flash drivers contain ARM32 code that is used
   8 to execute code on the target.
   9
  10 This needs to be handled in some CPU independent
  11 manner.
  12
  13 The ocl and ecos flash drivers compile the flash
  14 driver code to run on the target on the developer
  15 machine.
  16
  17 The ocl and ecos flash drivers should be unified
  18 and instructions should be written on how to
  19 compile the target flash drivers. Perhaps
  20 using automake?
  21
  22
  23 eCos has CFI driver that could probably be compiled
  24 for all targets. The trick is to figure out a
  25 way to make the compiled flash drivers work
  26 on all target memory maps + sort out all the
  27 little details
  28
  29 @section targetnotarm32v64 32 vs. 64 bit
  30
  31 Currently OpenOCD only supports 32 bit targets.
  32
  33 Adding 64 bit support would be nice but there
  34 hasn't been any call for it in the openocd development
  35 mailing list
  36
  37 @section targetnotarmsupport Target Support
  38
  39 target.h is relatively CPU agnostic and
  40 the intention is to move in the direction of less
  41 instruction set specific.
  42
  43 Non-CPU targets are also supported, but there isn't
  44 a lot of activity on it in the mailing list currently.
  45 An example is FPGA programming support via JTAG,
  46 but also flash chips can be programmed directly
  47 using JTAG.
  48
  49 @section targetnotarmphy non-JTAG physical layer
  50
  51 JTAG is not the only physical protocol used to talk to
  52 CPUs.
  53
  54 OpenOCD does not today have targets that use non-JTAG.
  55
  56 The actual physical layer is a relatively modest part
  57 of the total OpenOCD system.
  58
  59
  60 @section targetnotarmppc PowerPC
  61
  62 there exists open source implementations of PowerPC
  63 target manipulation, but there hasn't been a lot
  64 of activity in the mailing list.
  65
  66 @section targetnotarmmips MIPS
  67
  68 Currently OpenOCD has a MIPS target defined. This is the
  69 first non-ARM example of a CPU target
  70
  71  */