1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2014 by Angus Gratton *
5 * Derived from stm32f1x.S:
6 * Copyright (C) 2011 by Andreas Fritiofson *
7 * andreas.fritiofson@gmail.com *
8 * Copyright (C) 2013 by Roman Dmitrienko *
10 ***************************************************************************/
17 /* Written for NRF51822 (src/flash/nor/nrf51.c) however the NRF NVMC is
18 * very generic (CPU blocks during flash writes), so this is actually
19 * just a generic word-oriented copy routine for Cortex-M0 (also
20 * suitable for Cortex-M0+/M3/M4.)
23 * arm-none-eabi-gcc -c cortex-m0.S
26 * arm-none-eabi-objdump -o cortex-m0.o
28 * Thanks to Jens Bauer for providing advice on some of the tweaks.
32 * r0 - byte count (in)
42 ldr r5, [r1, #0] /* read wp */
43 cmp r5, #0 /* abort if wp == 0 */
45 ldr r4, [r1, #4] /* read rp */
46 cmp r4, r5 /* wait until rp != wp */
49 ldmia r4!, {r5} /* "*target_address++ = *rp++" */
52 cmp r4, r2 /* wrap rp at end of work area buffer */
55 adds r4, #8 /* skip rp,wp at start of work area */
57 str r4, [r1, #4] /* write back rp */
58 subs r0, #4 /* decrement byte count */
59 bne wait_fifo /* loop if not done */
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