tcl/target: stm32[fl]4x: document the settings for trace While reviewing on gerrit the change https://review.openocd.org/6932/ it get clear that the missing documentation on stm32f4x's code was triggering errors in the new change. OpenOCD is currently unable to read traces, but these can be hopefully be read with some other tool. Document the settings for enabling trace on stm32[fl]4x. Change-Id: Ibae77a53de16375d3d500e728678740095547009 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6945 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
tcl/target: replace event trace-config With commit dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code") the target's event "trace-config" has been deprecated. Create the TPIU device. Replace the target's event "trace-config" with tpiu's event "pre-enable" in the STM32 devices that require enabling the trace clock _before_ programming the TPIU. Make the script multi-instance-able in case it's used for JTAG chained devices. Uniform the code in STM32F4x with the other scripts. Remove the empty event from STM32WLx. Change-Id: Ifda219c3c5f37e03072a88168611cf505eb630b7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6681 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
tcl/target: add SPDX tag For historical reasons, no license information was added to the tcl files. This makes trivial adding the SPDX tag through script: fgrep -rL SPDX tcl/ target| while read a;do \ sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n }' $a;done With no specific license information from the author, let's extend the OpenOCD project license GPL-2.0-or-later to the files. Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7027 Tested-by: jenkins
tcl/target/stm32f4x: fix name Change-Id: I9baa79d8cf402991e6638c255a91728b8a77020c Signed-off-by: Markus Reiter <me@reitermark.us> Reviewed-on: https://review.openocd.org/c/openocd/+/6930 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
tcl/target/stm32f4x: fix hardcoded chip name Fixes: c945d6e61605 ("tcl/target: start using the new TPIU/SWO support") Change-Id: I4543c9a204f7b4b3b14e6eabc5042653106aff0e Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/6277 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
tcl/target: start using the new TPIU/SWO support Create the TPIU and SWO device in target config file. Replace the target event 'trace-config' with the TPIU/SWO event 'post-enable'. Extend the existing code in the event handler to properly set the gpio mode and speed to permit synchronous trace. This patch is not exhaustive of all the targets that have SWO, but has to be considered as an initial example. Change-Id: If4bbf364c0d2aef3ae49951e76507a3b1cfd58e7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5859 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface - write speed up to 150 kByte/s on STM32F469I-disco (due to SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in dual 4-line mode or STM32H73BI-Disco in octal mode - tested with STM32L476G-disco (64MBit flash, 3-byte addr), STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and STM32L476G-Disco (all 128Mbit flash, 3-byte addr), STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr) STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr) STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr) STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr) - suitable cfg for Discovery boards included - limited parsing of SFDP data if flash device not hardcoded (tested only in single/quad mode as most devices either don't support SFDP at all or have empty(!) SFDP memory) - 'set' command for auto detection override (e. g. for EEPROMs) - 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.) - makefile for creation of binary loader files - tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg - tcl/board/stm32f7discovery.cfg removed as name is ambiguous (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg) - dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI with two W25Q128FV, sample cfg files included and on STM32H745I-Disco, STM32H747I-Disco, STM32H750B-Disco - read/verify/erase_check uses indirect read mode to work around silicon bug in H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last bytes causes debug interface to hang) - octospi supported only in single/dual 1-line, 2-line, 4-line and single 8-line modes, (not in hyper flash mode) Requirements: GPIOs must be initialized appropriately, and SPI flash chip be configured appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip specific, cf. included cfg files. The driver infers most parameters from current setting in CR, CCR, ... registers. Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4321 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com>
tcl: replace the deprecated commands with "adapter ..." Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with commands sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Minor indentation issue fixed manually in tcl/board/at91sam9g20-ek.cfg tcl/target/at91sam9260_ext_RAM_ext_flash.cfg Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5284 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) support The OTP is part of the flash memory. It has 512 (1024 for F7) bytes and is organized in 16 sectors with 32 (64 for F7) bytes each. The OTP is exposed as separate flash bank 1 and can be used with the usual flash commands. Writing the OTP can be done as follows: > stm32f2x otp 1 enable > flash write bank 1 foo.bin 0 > mdw 0x1fff7800 4 > verify_image foo.bin 0x1fff7800 > stm32f2x otp 1 disable Note: This patch is largely a rebase/cleanup of a patch from 2012 by Laurent Charpentier and he did most of the work. No new Clang-Analyzer warnings. Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/829 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
target: restructure dap support - add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
cfg: Don't check BS TAP IDCODE in STM32 configs Instead of updating these regularly we can just accept any IDCODE for the boundary scan TAP. The only downside might be that it's not immediately obvious if you source a config for the wrong type of STM32. Change-Id: I96d4d81699a491b3a46de3f0d3fd078ffddad4e4 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3385 Tested-by: jenkins
target/stm32f4x.cfg: Add STM32F410/F412/F469. Taken from git://git.ac6.fr/openocd commit e8ed67c42227b7072a1e7 Change-Id: Iac106d4823123eaa96f16a975e7ecbcb24189924 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3377 Tested-by: jenkins Reviewed-by: Stian Skjelstad <stian@nixia.no> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
tcl/target/stm32f4x.cfg: Use Workareasize of smallest possible device. Increase workareasize when it is know we have a larger device. Change-Id: Ieaee92e7cd25cc201989f14de122349698871412 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3378 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
tcl/target/stm32f4: fix: reduce adapter speed before reset The reset-init hook for this target speeds up the CPU clock and JTAG adapter speed. When the target is reset running with high adapter speed, a series of warnings "DAP transaction stalled (WAIT) - slowing down" will be generated since the adapter speed is not reduced to fit the slower CPU speed. Fix: reduction of the adapter speed before a reset is performed. Change-Id: Iabfc8e3f70311e0e71c8eed09b8a37fcbed9c58d Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3365 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
tcl: Add default hooks for STM32F4x Set up PLL and increase clock at reset init. Change-Id: I611bc6fb7c0c5afd8ed3f4ad8e64f3c7b981d31c Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2609 Tested-by: jenkins Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
stm32xxx.cfg: Only touch IWDG and WWDG in DBGMCU_APB1_FZ. Change-Id: Ie0298c8e73bebeccc9346534d63aab4cae49e4f7 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3104 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
armv7m: add generic trace support (TPIU, ITM, etc.) This provides support for various trace-related subsystems in a generic and expandable way. Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2538 Tested-by: jenkins
cfg: add srst_nogate to the supported targets, remove from board configs It depends on the particular target whether it can work with SRST asserted or not, so this belongs to the target config rather than the board config. Also, this allows for simple openocd -f myboard.cfg -c "reset_config connect_assert_srst" command to be used whenever a user feels a need to connect to an unresponsive target. Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2459 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
target/stm32xx: Endian is not configurable. So remove it from all the configs, it's misleading, and leads to cargo culting of config files. Change-Id: I2b77e60d5e96f9759c7c9fc91b20e73be2e95d9a Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2446 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
tcl/target/stm32f4: ramp up JTAG speed, HSI is 16MHz there Since all F4 parts have an internal HSI providing 16MHz, it's safe to use 2MHz JTAG frequency by default. Change-Id: I2702d5a1d642d4acd4af2db54c028949132c6900 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2383 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>