X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32l.cfg;h=f9f7425b9a7bb9925a21b9921710e908220b176e;hb=1338cf60b91c582fa4b27d5226ab4374117be415;hp=eea082e65d80fbb78c69703a0ff3b6fedc124218;hpb=84043a95e1744884a9cd8132789c94e13b0312d2;p=openocd.git

diff --git a/tcl/target/stm32l.cfg b/tcl/target/stm32l.cfg
index eea082e65d..f9f7425b9a 100644
--- a/tcl/target/stm32l.cfg
+++ b/tcl/target/stm32l.cfg
@@ -1,5 +1,10 @@
 # script for stm32l
 
+#
+# stm32 devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
@@ -25,7 +30,9 @@ if { [info exists WORKAREASIZE] } {
 adapter_khz 100
 
 adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+if {$using_jtag} {
+ jtag_ntrst_delay 100
+}
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
@@ -35,7 +42,8 @@ if { [info exists CPUTAPID] } {
   # Section 24.6.3
    set _CPUTAPID 0x4ba00477
 }
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 if { [info exists BSTAPID] } {
    # FIXME this never gets used to override defaults...
@@ -45,21 +53,23 @@ if { [info exists BSTAPID] } {
   # Section 24.6.2
   set _BSTAPID 0x06416041
 }
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+
+if {$using_jtag} {
+ jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+}
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-
 # flash size will be probed
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
 
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
-cortex_m3 reset_config sysresetreq
+cortex_m reset_config sysresetreq
 
 proc stm32l_enable_HSI {} {
 	# Enable HSI as clock source