X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32f3x.cfg;h=0b3b7255f25829f415140c69cb973bdd3958566d;hb=494975747376cb5258d8d84d4304df5cad51b719;hp=ec5941bdef51b3383abd786ed8722abeaa4fb5d9;hpb=f8a6a07149d88737f3d466e7ce620cc1f0874c6a;p=openocd.git

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index ec5941bdef..0b3b7255f2 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -42,9 +42,13 @@ if {[using_jtag]} {
 if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # See STM Document RM0316
-  # Section 29.6.3 - corresponds to Cortex-M4 r0p1
-   set _CPUTAPID 0x4ba00477
+   if { [using_jtag] } {
+      # See STM Document RM0316
+      # Section 29.6.3 - corresponds to Cortex-M4 r0p1
+      set _CPUTAPID 0x4ba00477
+   } {
+      set _CPUTAPID 0x2ba01477
+   }
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
@@ -59,7 +63,7 @@ if { [info exists BSTAPID] } {
 }
 
 if {[using_jtag]} {
- jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
@@ -70,6 +74,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
 
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}