X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32.cfg;h=9879c0458f5c93eddd82950c39dba5043ded4ad4;hb=523c172280b10dea9e65ff726face6f0deed4736;hp=d3f60feb3f16b05dbc16858553cd53dc6b0a39b5;hpb=d3c77fdbb20042c9305dbf18a3ba73cfd65f67b6;p=openocd.git

diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index d3f60feb3f..9879c0458f 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -1,14 +1,14 @@
 # script for stm32
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME stm32
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
    set  _ENDIAN little
 }
 
@@ -21,14 +21,11 @@ if { [info exists WORKAREASIZE] } {
 }
 
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-jtag_khz 1000
+adapter_khz 1000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst
-
 #jtag scan chain
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
@@ -40,27 +37,39 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 if { [info exists BSTAPID ] } {
+   # FIXME this never gets used to override defaults...
    set _BSTAPID $BSTAPID
 } else {
   # See STM Document RM0008
-  # Section 26.6.2
+  # Section 29.6.2
   # Low density devices, Rev A
   set _BSTAPID1 0x06412041
   # Medium density devices, Rev A
   set _BSTAPID2 0x06410041
   # Medium density devices, Rev B and Rev Z
   set _BSTAPID3 0x16410041
+  set _BSTAPID4 0x06420041
   # High density devices, Rev A
-  set _BSTAPID4 0x06414041
-}   
-jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4
+  set _BSTAPID5 0x06414041
+  # Connectivity line devices, Rev A and Rev Z
+  set _BSTAPID6 0x06418041
+  # XL line devices, Rev A
+  set _BSTAPID7 0x06430041
+}
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+	-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+	-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
+	-expected-id $_BSTAPID6 -expected-id $_BSTAPID7
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-flash bank stm32x 0 0 0 0 0
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32x 0x08000000 0 0 0 $_TARGETNAME
 
-# For more information about the configuration files, take a look at:
-# openocd.texi
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m3 reset_config sysresetreq