X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32.cfg;h=217b79d9625c30975d15ce4e7ba9d65b409348d1;hb=5d43ffd5bc0ca281314f5ccda417cc7144c31144;hp=eef12699218962045fd2b71c1ad24a647fce9a37;hpb=3d834bdab782065ba736328d6f7f19ded8ba975a;p=openocd.git

diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index eef1269921..217b79d962 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -1,74 +1,3 @@
-# script for stm32
-
-if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
-} else {
-   set  _CHIPNAME stm32
-}
-
-if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
-} else {
-   set  _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 16kB
-if { [info exists WORKAREASIZE] } {
-   set  _WORKAREASIZE $WORKAREASIZE
-} else {
-   set  _WORKAREASIZE 0x4000
-}
-
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#jtag scan chain
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-  # See STM Document RM0008
-  # Section 26.6.3
-   set _CPUTAPID 0x3ba00477
-}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID ] } {
-   # FIXME this never gets used to override defaults...
-   set _BSTAPID $BSTAPID
-} else {
-  # See STM Document RM0008
-  # Section 29.6.2
-  # Low density devices, Rev A
-  set _BSTAPID1 0x06412041
-  # Medium density devices, Rev A
-  set _BSTAPID2 0x06410041
-  # Medium density devices, Rev B and Rev Z
-  set _BSTAPID3 0x16410041
-  # High density devices, Rev A
-  set _BSTAPID4 0x06414041
-  # Connectivity line devices, Rev A and Rev Z
-  set _BSTAPID5 0x06418041
-  # XL line devices, Rev A
-  set _BSTAPID6 0x06430041
-}
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-	-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-	-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
-	-expected-id $_BSTAPID6
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-# flash size will be probed
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32x 0x08000000 0 0 0 $_TARGETNAME
-
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m3 reset_config sysresetreq
+# deprecated cfg file
+echo "DEPRECATED! use script 'target/stm32f1x.cfg' not 'target/stm32.cfg'"
+source [find target/stm32f1x.cfg]