X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fpic32mx.cfg;h=efffd040b048bfc9b5d387b966832f623477390f;hb=d6c42bf312ec6cdf95c6837fdadcebf1b104fa4f;hp=d77c3a8c9ae95bce54324e1355909a6a9ded5563;hpb=de761e350ba8d89fab4fac6f14b1072f8369d778;p=openocd.git

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index d77c3a8c9a..efffd040b0 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
+   # force an error till we get a good number
    set _CPUTAPID 0x30938053
 }
 
@@ -26,12 +26,9 @@ if { [info exists WORKAREASIZE] } {
 }
 
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only
-
 #jtag scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
@@ -70,10 +67,14 @@ $_TARGETNAME configure -event reset-init {
 	mww 0xbf882030 $_PIC32MX_PROGSIZE
 }
 
-set _FLASHNAME $_CHIPNAME.flash
+set _FLASHNAME $_CHIPNAME.flash0
 flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
+# add virtual banks for kseg0 and kseg1
+flash bank vbank0 virtual 0xbfc00000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
 
-# For more information about the configuration files, take a look at:
-# openocd.texi
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
+# add virtual banks for kseg0 and kseg1
+flash bank vbank2 virtual 0xbd000000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank3 virtual 0x9d000000 0 0 0 $_TARGETNAME $_FLASHNAME