X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fpic32mx.cfg;h=d53b99a587cf82e3240ec7611e5ca8e52c749c4b;hb=1c021ed0afb5f9f7d9e8cbce53a4fe985a4c2235;hp=598c905cf49e4fdde71b3f9d70e0b2ceb6217247;hpb=35e7377160f75761ddab00c2a8e06d5cccf8f729;p=openocd.git

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 598c905cf4..d53b99a587 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -50,18 +50,31 @@ $_TARGETNAME configure -event reset-init {
 	# from reset the pic32 cannot execute code in ram - enable ram execution
 	# minimum offset from start of ram is 2k
 	#
-
 	global _PIC32MX_DATASIZE
 	global _WORKAREASIZE
 
-	# BMXCON
-	mww 0xbf882000 0x001f0040
+	# BMXCON	set 0 wait state option by clearing BMXWSDRM bit, bit 6
+	mww 0xbf882000 0x001f0000
 	# BMXDKPBA: 2k kernel data @ 0xa0000000
 	mww 0xbf882010 $_PIC32MX_DATASIZE
 	# BMXDUDBA: 14k kernel program @ 0xa0000800 - (BMXDUDBA - BMXDKPBA)
 	mww 0xbf882020 $_WORKAREASIZE
 	# BMXDUPBA: 0k user program - (BMXDUPBA - BMXDUDBA)
 	mww 0xbf882030 $_WORKAREASIZE
+
+	#
+	# Set system clock to 8Mhz if the default clock configuration is set
+	#
+
+	# SYSKEY register, make sure OSCCON is locked
+	mww 0xbf80f230 0x0
+	# SYSKEY register, write unlock sequence
+	mww 0xbf80f230 0xaa996655
+	mww 0xbf80f230 0x556699aa
+	# OSCCON register + 4, clear OSCCON FRCDIV bits: 24, 25 and 26, divided by 1
+	mww 0xbf80f004 0x07000000
+	# SYSKEY register, relock OSCCON
+	mww 0xbf80f230 0x0
 }
 
 set _FLASHNAME $_CHIPNAME.flash0