X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Flpc4350.cfg;h=2b728840ebe31417eff35d306efad04a42dfb5ed;hb=3605cb96252efb4644924f1c1357a1ea122c6390;hp=fae54f7763ebe38b23f519dc831754e451fa3a21;hpb=c7384117c66e8f18896ca09ab8095d6da16bb1e5;p=openocd.git

diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
index fae54f7763..2b728840eb 100644
--- a/tcl/target/lpc4350.cfg
+++ b/tcl/target/lpc4350.cfg
@@ -43,14 +43,25 @@ if { [info exists M0_JTAG_TAPID] } {
 
 swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
 				-expected-id $_M4_TAPID
-target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
+dap create $_CHIPNAME.m4.dap -chain-position $_CHIPNAME.m4
+target create $_CHIPNAME.m4 cortex_m -dap $_CHIPNAME.m4.dap
 
 if { [using_jtag] } {
 	swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
 				-expected-id $_M0_JTAG_TAPID
-	target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
+	dap create $_CHIPNAME.m0.dap -chain-position $_CHIPNAME.m0
+	target create $_CHIPNAME.m0 cortex_m -dap $_CHIPNAME.m0.dap
 }
 
+# LPC4350 has 96+32 KB SRAM
+if { [info exists WORKAREASIZE] } {
+	set _WORKAREASIZE $WORKAREASIZE
+} else {
+	set _WORKAREASIZE 0x20000
+}
+$_CHIPNAME.m4 configure -work-area-phys 0x10000000 \
+			-work-area-size $_WORKAREASIZE -work-area-backup 0
+
 if {![using_hla]} {
    # on this CPU we should use VECTRESET to perform a soft reset and
    # manually reset the periphery