X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Ffm3.cfg;h=e81fcc8948d7543aea222c1680c251fdfeabf1a6;hb=0f0545d6dc8e8bf1b472c9ef2afcb76739d22f80;hp=af7647d878d5217a8c42e24a1de75655fc2874e8;hpb=b5a324e63c066b97c148c72ecec2e0dfc6023c70;p=openocd.git

diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg
index af7647d878..e81fcc8948 100644
--- a/tcl/target/fm3.cfg
+++ b/tcl/target/fm3.cfg
@@ -2,25 +2,25 @@
 # Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
 
 if { [info exists CHIPNAME] } {
-	set  _CHIPNAME $CHIPNAME
+	set _CHIPNAME $CHIPNAME
 } else {
-	set  _CHIPNAME mb9bf500
+	set _CHIPNAME mb9bf500
 }
 
 if { [info exists ENDIAN] } {
-	set  _ENDIAN $ENDIAN
+	set _ENDIAN $ENDIAN
 } else {
-	set  _ENDIAN little
+	set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
 	set _CPUTAPID $CPUTAPID
 } else {
 	set _CPUTAPID 0x4ba00477
 }
 
 # delays on reset lines
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 # Fujitsu cortex-M3 reset configuration
@@ -29,7 +29,7 @@ reset_config trst_only
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # MB9BF506 has 64kB of SRAM on its main system bus 
 $_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
@@ -44,4 +44,4 @@ adapter_khz 500
 
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
-cortex_m3 reset_config sysresetreq
+cortex_m reset_config sysresetreq