X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam7sx.cfg;h=5cde979de0db9c364ef141fadc859fbeec807786;hb=54c16fc56edc0a7468279b03e333e6bf5abb4b2d;hp=80186eca8024192b5cc5c6e7504698465c3e5172;hpb=ce89c7bf6588c7b2800c4ca453278b6f94795130;p=openocd.git diff --git a/tcl/target/at91sam7sx.cfg b/tcl/target/at91sam7sx.cfg index 80186eca80..5cde979de0 100644 --- a/tcl/target/at91sam7sx.cfg +++ b/tcl/target/at91sam7sx.cfg @@ -1,15 +1,15 @@ #use combined on interfaces or targets that can't set TRST/SRST separately reset_config srst_only srst_pulls_trst -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { set _CHIPNAME at91sam7s } -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { set _ENDIAN little } @@ -24,26 +24,26 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi -$_TARGETNAME configure -event reset-init { +$_TARGETNAME configure -event reset-init { soft_reset_halt # RSTC_CR : Reset peripherals mww 0xfffffd00 0xa5000004 # disable watchdog - mww 0xfffffd44 0x00008000 + mww 0xfffffd44 0x00008000 # enable user reset - mww 0xfffffd08 0xa5000001 + mww 0xfffffd08 0xa5000001 # CKGR_MOR : enable the main oscillator - mww 0xfffffc20 0x00000601 + mww 0xfffffc20 0x00000601 sleep 10 # CKGR_PLLR: 96.1097 MHz - mww 0xfffffc2c 0x00481c0e + mww 0xfffffc2c 0x00481c0e sleep 10 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz - mww 0xfffffc30 0x00000007 + mww 0xfffffc30 0x00000007 sleep 10 # MC_FMR: flash mode (FWS=1,FMCN=73) - mww 0xffffff60 0x00490100 - sleep 100 + mww 0xffffff60 0x00490100 + sleep 100 } $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0