X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fam335x.cfg;h=ff92b5bf3a989ce1329923dd61bdef3dc68a37e5;hb=18d6c0b02bf5e1318d5f5484b5ba68b476a418f0;hp=99693dc03205e2e943ae2c9095df0f280ddbe33b;hpb=21a0f9b48b1694425244b1540012767c443dc16f;p=openocd.git

diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg
index 99693dc032..ff92b5bf3a 100644
--- a/tcl/target/am335x.cfg
+++ b/tcl/target/am335x.cfg
@@ -1,3 +1,4 @@
+source [find target/icepick.cfg]
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -5,26 +6,6 @@ if { [info exists CHIPNAME] } {
    set _CHIPNAME am335x
 }
 
-# This chip contains an IcePick-D JTAG router.  The IcePick-C configuration is almost
-# compatible, but it doesn't work.  For now, we will just embed the IcePick-D
-# routines here.
-proc icepick_d_tapenable {jrc port} {
-	# select router
-	irscan $jrc 7 -endstate IRPAUSE
-	drscan $jrc 8 0x89 -endstate DRPAUSE
-
-	# set ip control
-	irscan $jrc 2 -endstate IRPAUSE
-	drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE
-
-	# for icepick_D
-	irscan $jrc 2 -endstate IRPAUSE
-	drscan $jrc 32 0xe0002008 -endstate DRPAUSE
-
-	irscan $jrc 0x3F -endstate RUN/IDLE
-	runtest 10
-}
-
 #
 # M3 DAP
 #
@@ -39,7 +20,7 @@ jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNA
 #
 # Main DAP
 #
-if { [info exists DAP_TAPID ] } {
+if { [info exists DAP_TAPID] } {
    set _DAP_TAPID $DAP_TAPID
 } else {
    set _DAP_TAPID 0x4b6b902f
@@ -50,12 +31,12 @@ jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.
 #
 # ICEpick-D (JTAG route controller)
 #
-if { [info exists JRC_TAPID ] } {
+if { [info exists JRC_TAPID] } {
    set _JRC_TAPID $JRC_TAPID
 } else {
    set _JRC_TAPID 0x0b94402f
 }
-jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
+jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
 # some TCK tycles are required to activate the DEBUG power domain
 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
@@ -64,13 +45,7 @@ jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
 # Cortex A8 target
 #
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
+target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
 
 # SRAM: 64K at 0x4030.0000; use the first 16K
 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
-
-$_TARGETNAME configure -event gdb-attach {
-   cortex_a8 dbginit
-   halt
-}
-