X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Fboard%2Fcrossbow_tech_imote2.cfg;h=002b5372f721f1344ef52ff411226b70fa3af048;hb=058ed7a43f3253225649a552b09bb1f066ce467d;hp=7527bef8fa53bd7036fe22ce05b0b0227f67ceb1;hpb=dbbc9c41f7db210b0a4e226540a28e0a8a5019bf;p=openocd.git

diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index 7527bef8fa..002b5372f7 100644
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -1,46 +1,13 @@
 # Crossbow Technology iMote2
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
-   set  _CHIPNAME imote2
-}
+set  CHIPNAME imote2
+source [find target/pxa270.cfg]
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
-   set  _ENDIAN little
-}
+# longer-than-normal reset delay
+adapter_nsrst_delay 800
 
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-  # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
-}
-
-# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
-# 
-# Marvell/Intel PXA270 Script
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 800 
-# set the jtag_ntrst_delay to the delay introduced by a reset circuit
-# the rest of the needed delays are built into the openocd program
-jtag_ntrst_delay 0
-#use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst separate
-#jtag scan chain
-
-jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
-$_TARGETNAME configure -work-area-virt 0x0x5c000000 -work-area-phys 0x0x5c000000 -work-area-size 0x10000 -work-area-backup 1
-# maps to PXA internal RAM. If you are using a PXA255
-# you must initialize SDRAM or leave this option off
-
 
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
 # works for P30 flash
-flash bank cfi 0x00000000 0x2000000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME