X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=c0080b2b388c7c1b3d80e6ca0e7942e6c3e4dae5;hb=ee17d5c48eaca42438663405ff6d090a391fc9e6;hp=ed0eef35237ec62de9bc7c5c20eb494ffdf57998;hpb=4f1296d1510715b5504f39909dadae79698aa27a;p=openocd.git

diff --git a/src/target/xscale.c b/src/target/xscale.c
index ed0eef3523..c0080b2b38 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2002,25 +2002,33 @@ static int xscale_bulk_write_memory(struct target *target, uint32_t address,
 	return xscale_write_memory(target, address, 4, count, buffer);
 }
 
-static uint32_t xscale_get_ttb(struct target *target)
+static int xscale_get_ttb(struct target *target, uint32_t *result)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	uint32_t ttb;
+	int retval;
 
-	xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_TTB]);
+	retval = xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_TTB]);
+	if (retval != ERROR_OK)
+		return retval;
 	ttb = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_TTB].value, 0, 32);
 
-	return ttb;
+	*result = ttb;
+
+	return ERROR_OK;
 }
 
-static void xscale_disable_mmu_caches(struct target *target, int mmu,
+static int xscale_disable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	uint32_t cp15_control;
+	int retval;
 
 	/* read cp15 control register */
-	xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_CTRL]);
+	retval = xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_CTRL]);
+	if (retval !=ERROR_OK)
+		return retval;
 	cp15_control = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_CTRL].value, 0, 32);
 
 	if (mmu)
@@ -2029,11 +2037,17 @@ static void xscale_disable_mmu_caches(struct target *target, int mmu,
 	if (d_u_cache)
 	{
 		/* clean DCache */
-		xscale_send_u32(target, 0x50);
-		xscale_send_u32(target, xscale->cache_clean_address);
+		retval = xscale_send_u32(target, 0x50);
+		if (retval !=ERROR_OK)
+			return retval;
+		retval = xscale_send_u32(target, xscale->cache_clean_address);
+		if (retval !=ERROR_OK)
+			return retval;
 
 		/* invalidate DCache */
-		xscale_send_u32(target, 0x51);
+		retval = xscale_send_u32(target, 0x51);
+		if (retval !=ERROR_OK)
+			return retval;
 
 		cp15_control &= ~0x4U;
 	}
@@ -2041,25 +2055,33 @@ static void xscale_disable_mmu_caches(struct target *target, int mmu,
 	if (i_cache)
 	{
 		/* invalidate ICache */
-		xscale_send_u32(target, 0x52);
+		retval = xscale_send_u32(target, 0x52);
+		if (retval !=ERROR_OK)
+			return retval;
 		cp15_control &= ~0x1000U;
 	}
 
 	/* write new cp15 control register */
-	xscale_set_reg_u32(&xscale->reg_cache->reg_list[XSCALE_CTRL], cp15_control);
+	retval = xscale_set_reg_u32(&xscale->reg_cache->reg_list[XSCALE_CTRL], cp15_control);
+	if (retval !=ERROR_OK)
+		return retval;
 
 	/* execute cpwait to ensure outstanding operations complete */
-	xscale_send_u32(target, 0x53);
+	retval = xscale_send_u32(target, 0x53);
+	return retval;
 }
 
-static void xscale_enable_mmu_caches(struct target *target, int mmu,
+static int xscale_enable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	uint32_t cp15_control;
+	int retval;
 
 	/* read cp15 control register */
-	xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_CTRL]);
+	retval = xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_CTRL]);
+	if (retval !=ERROR_OK)
+		return retval;
 	cp15_control = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_CTRL].value, 0, 32);
 
 	if (mmu)
@@ -2072,10 +2094,13 @@ static void xscale_enable_mmu_caches(struct target *target, int mmu,
 		cp15_control |= 0x1000U;
 
 	/* write new cp15 control register */
-	xscale_set_reg_u32(&xscale->reg_cache->reg_list[XSCALE_CTRL], cp15_control);
+	retval = xscale_set_reg_u32(&xscale->reg_cache->reg_list[XSCALE_CTRL], cp15_control);
+	if (retval !=ERROR_OK)
+		return retval;
 
 	/* execute cpwait to ensure outstanding operations complete */
-	xscale_send_u32(target, 0x53);
+	retval = xscale_send_u32(target, 0x53);
+	return retval;
 }
 
 static int xscale_set_breakpoint(struct target *target,
@@ -3216,21 +3241,18 @@ static int xscale_virt2phys(struct target *target,
 		uint32_t virtual, uint32_t *physical)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
-	int type;
 	uint32_t cb;
-	int domain;
-	uint32_t ap;
 
 	if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
 		LOG_ERROR(xscale_not);
 		return ERROR_TARGET_INVALID;
 	}
 
-	uint32_t ret = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
-	if (type == -1)
-	{
-		return ret;
-	}
+	uint32_t ret;
+	int retval = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu,
+			virtual, &cb, &ret);
+	if (retval != ERROR_OK)
+		return retval;
 	*physical = ret;
 	return ERROR_OK;
 }