X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=bc79c7f74d4f258e1b4cbb8a5ede0073d4af7e1d;hb=c779387279e96f37c8049d81284cd07bf7238ac9;hp=898d080ef05adb23c6a29cb6ca122647d2703919;hpb=18c86b1c456e8623b5fb6df9fa110190abcadc9b;p=openocd.git
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 898d080ef0..bc79c7f74d 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -19,9 +19,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ * along with this program. If not, see . *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -61,7 +59,7 @@
/* forward declarations */
static int xscale_resume(struct target *, int current,
- uint32_t address, int handle_breakpoints, int debug_execution);
+ target_addr_t address, int handle_breakpoints, int debug_execution);
static int xscale_debug_entry(struct target *);
static int xscale_restore_banked(struct target *);
static int xscale_get_reg(struct reg *reg);
@@ -75,7 +73,7 @@ static int xscale_read_trace(struct target *);
* mini-ICache, which is 2K of code writable only via JTAG.
*/
static const uint8_t xscale_debug_handler[] = {
-#include "xscale_debug.inc"
+#include "../../contrib/loaders/debug/xscale/debug_handler.inc"
};
static const char *const xscale_reg_list[] = {
@@ -140,11 +138,11 @@ static int xscale_set_reg_u32(struct reg *reg, uint32_t value)
static const char xscale_not[] = "target is not an XScale";
-static int xscale_verify_pointer(struct command_context *cmd_ctx,
+static int xscale_verify_pointer(struct command_invocation *cmd,
struct xscale_common *xscale)
{
if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
- command_print(cmd_ctx, xscale_not);
+ command_print(cmd->ctx, xscale_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -214,8 +212,8 @@ static int xscale_read_dcsr(struct target *target)
return retval;
}
- xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0;
- xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true;
/* write the register with the value we just read
* on this second pass, only the first bit of field0 is guaranteed to be 0)
@@ -406,8 +404,7 @@ static int xscale_read_tx(struct target *target, int consume)
}
gettimeofday(&now, NULL);
- if ((now.tv_sec > timeout.tv_sec) ||
- ((now.tv_sec == timeout.tv_sec) && (now.tv_usec > timeout.tv_usec))) {
+ if (timeval_compare(&now, &timeout) > 0) {
LOG_ERROR("time out reading TX register");
return ERROR_TARGET_TIMEOUT;
}
@@ -627,8 +624,8 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br
return retval;
}
- xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0;
- xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true;
return ERROR_OK;
}
@@ -871,21 +868,21 @@ static int xscale_debug_entry(struct target *target)
/* move r0 from buffer to register cache */
buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, buffer[0]);
- arm->core_cache->reg_list[0].dirty = 1;
- arm->core_cache->reg_list[0].valid = 1;
+ arm->core_cache->reg_list[0].dirty = true;
+ arm->core_cache->reg_list[0].valid = true;
LOG_DEBUG("r0: 0x%8.8" PRIx32 "", buffer[0]);
/* move pc from buffer to register cache */
buf_set_u32(arm->pc->value, 0, 32, buffer[1]);
- arm->pc->dirty = 1;
- arm->pc->valid = 1;
+ arm->pc->dirty = true;
+ arm->pc->valid = true;
LOG_DEBUG("pc: 0x%8.8" PRIx32 "", buffer[1]);
/* move data from buffer to register cache */
for (i = 1; i <= 7; i++) {
buf_set_u32(arm->core_cache->reg_list[i].value, 0, 32, buffer[1 + i]);
- arm->core_cache->reg_list[i].dirty = 1;
- arm->core_cache->reg_list[i].valid = 1;
+ arm->core_cache->reg_list[i].dirty = true;
+ arm->core_cache->reg_list[i].valid = true;
LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, buffer[i + 1]);
}
@@ -923,7 +920,7 @@ static int xscale_debug_entry(struct target *target)
/* mark xscale regs invalid to ensure they are retrieved from the
* debug handler if requested */
for (i = 0; i < xscale->reg_cache->num_regs; i++)
- xscale->reg_cache->reg_list[i].valid = 0;
+ xscale->reg_cache->reg_list[i].valid = false;
/* examine debug reason */
xscale_read_dcsr(target);
@@ -1122,7 +1119,7 @@ static void xscale_free_trace_data(struct xscale_common *xscale)
}
static int xscale_resume(struct target *target, int current,
- uint32_t address, int handle_breakpoints, int debug_execution)
+ target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *arm = &xscale->arm;
@@ -1167,7 +1164,8 @@ static int xscale_resume(struct target *target, int current,
enum trace_mode saved_trace_mode;
/* there's a breakpoint at the current PC, we have to step over it */
- LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT "",
+ breakpoint->address);
xscale_unset_breakpoint(target, breakpoint);
/* calculate PC of next instruction */
@@ -1224,7 +1222,8 @@ static int xscale_resume(struct target *target, int current,
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);
- LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+ LOG_DEBUG("set breakpoint at " TARGET_ADDR_FMT "",
+ breakpoint->address);
xscale_set_breakpoint(target, breakpoint);
}
}
@@ -1386,7 +1385,7 @@ static int xscale_step_inner(struct target *target, int current,
}
static int xscale_step(struct target *target, int current,
- uint32_t address, int handle_breakpoints)
+ target_addr_t address, int handle_breakpoints)
{
struct arm *arm = target_to_arm(target);
struct breakpoint *breakpoint = NULL;
@@ -1446,6 +1445,13 @@ static int xscale_assert_reset(struct target *target)
{
struct xscale_common *xscale = target_to_xscale(target);
+ /* TODO: apply hw reset signal in not examined state */
+ if (!(target_was_examined(target))) {
+ LOG_WARNING("Reset is not asserted because the target is not examined.");
+ LOG_WARNING("Use a reset button or power cycle the target.");
+ return ERROR_TARGET_NOT_EXAMINED;
+ }
+
LOG_DEBUG("target->state: %s",
target_state_name(target));
@@ -1573,7 +1579,6 @@ static int xscale_deassert_reset(struct target *target)
address += buf_cnt;
}
- ;
retval = xscale_load_ic(target, 0x0,
xscale->low_vectors);
@@ -1621,7 +1626,7 @@ static int xscale_read_core_reg(struct target *target, struct reg *r,
}
static int xscale_write_core_reg(struct target *target, struct reg *r,
- int num, enum arm_mode mode, uint32_t value)
+ int num, enum arm_mode mode, uint8_t *value)
{
/** \todo add debug handler support for core register writes */
LOG_ERROR("not implemented");
@@ -1774,7 +1779,7 @@ dirty:
return ERROR_OK;
}
-static int xscale_read_memory(struct target *target, uint32_t address,
+static int xscale_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -1782,7 +1787,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
uint32_t i;
int retval;
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
+ LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
@@ -1860,7 +1865,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
return ERROR_OK;
}
-static int xscale_read_phys_memory(struct target *target, uint32_t address,
+static int xscale_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -1875,13 +1880,13 @@ static int xscale_read_phys_memory(struct target *target, uint32_t address,
return ERROR_FAIL;
}
-static int xscale_write_memory(struct target *target, uint32_t address,
+static int xscale_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
+ LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
@@ -1959,7 +1964,7 @@ static int xscale_write_memory(struct target *target, uint32_t address,
return ERROR_OK;
}
-static int xscale_write_phys_memory(struct target *target, uint32_t address,
+static int xscale_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -2418,8 +2423,8 @@ static int xscale_get_reg(struct reg *reg)
xscale_read_tx(target, 1);
buf_cpy(xscale->reg_cache->reg_list[XSCALE_TX].value, reg->value, 32);
- reg->dirty = 0;
- reg->valid = 1;
+ reg->dirty = false;
+ reg->valid = true;
}
return ERROR_OK;
@@ -2649,21 +2654,21 @@ static inline void xscale_branch_address(struct xscale_trace_data *trace_data,
static inline void xscale_display_instruction(struct target *target, uint32_t pc,
struct arm_instruction *instruction,
- struct command_context *cmd_ctx)
+ struct command_invocation *cmd)
{
int retval = xscale_read_instruction(target, pc, instruction);
if (retval == ERROR_OK)
- command_print(cmd_ctx, "%s", instruction->text);
+ command_print(cmd->ctx, "%s", instruction->text);
else
- command_print(cmd_ctx, "0x%8.8" PRIx32 "\t", pc);
+ command_print(cmd->ctx, "0x%8.8" PRIx32 "\t", pc);
}
-static int xscale_analyze_trace(struct target *target, struct command_context *cmd_ctx)
+static int xscale_analyze_trace(struct target *target, struct command_invocation *cmd)
{
struct xscale_common *xscale = target_to_xscale(target);
struct xscale_trace_data *trace_data = xscale->trace.data;
int i, retval;
- uint32_t breakpoint_pc;
+ uint32_t breakpoint_pc = 0;
struct arm_instruction instruction;
uint32_t current_pc = 0;/* initialized when address determined */
@@ -2766,7 +2771,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c
count = trace_data->entries[i].data & 0x0f;
for (j = 0; j < count; j++) {
xscale_display_instruction(target, current_pc, &instruction,
- cmd_ctx);
+ cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
@@ -2774,7 +2779,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c
* rollover and some exceptions: undef, swi, prefetch abort. */
if ((trace_msg_type == 15) || (exception > 0 && exception < 4)) {
xscale_display_instruction(target, current_pc, &instruction,
- cmd_ctx);
+ cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
@@ -2782,13 +2787,13 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c
continue;
if (exception) {
- command_print(cmd_ctx, "--- exception %i ---", exception);
+ command_print(cmd->ctx, "--- exception %i ---", exception);
continue;
}
/* not exception or rollover; next instruction is a branch and is
* not included in the count */
- xscale_display_instruction(target, current_pc, &instruction, cmd_ctx);
+ xscale_display_instruction(target, current_pc, &instruction, cmd);
/* for direct branches, extract branch destination from instruction */
if ((trace_msg_type == 8) || (trace_msg_type == 12)) {
@@ -2808,7 +2813,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c
}
if (current_pc == 0)
- command_print(cmd_ctx, "address unknown");
+ command_print(cmd->ctx, "address unknown");
continue;
}
@@ -2850,7 +2855,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c
/* display remaining instructions */
for (i = 0; i < gap_count; i++) {
- xscale_display_instruction(target, current_pc, &instruction, cmd_ctx);
+ xscale_display_instruction(target, current_pc, &instruction, cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
@@ -2885,8 +2890,8 @@ static void xscale_build_reg_cache(struct target *target)
for (i = 0; i < num_regs; i++) {
(*cache_p)->reg_list[i].name = xscale_reg_list[i];
(*cache_p)->reg_list[i].value = calloc(4, 1);
- (*cache_p)->reg_list[i].dirty = 0;
- (*cache_p)->reg_list[i].valid = 0;
+ (*cache_p)->reg_list[i].dirty = false;
+ (*cache_p)->reg_list[i].valid = false;
(*cache_p)->reg_list[i].size = 32;
(*cache_p)->reg_list[i].arch_info = &arch_info[i];
(*cache_p)->reg_list[i].type = &xscale_reg_type;
@@ -3027,7 +3032,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command)
}
xscale = target_to_xscale(target);
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3061,7 +3066,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command)
return ERROR_FAIL;
}
xscale = target_to_xscale(target);
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3081,7 +3086,7 @@ COMMAND_HANDLER(xscale_handle_cache_info_command)
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3089,7 +3094,7 @@ COMMAND_HANDLER(xscale_handle_cache_info_command)
}
static int xscale_virt2phys(struct target *target,
- uint32_t virtual, uint32_t *physical)
+ target_addr_t virtual, target_addr_t *physical)
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t cb;
@@ -3126,7 +3131,7 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3156,7 +3161,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
struct target *target = get_current_target(CMD_CTX);
struct xscale_common *xscale = target_to_xscale(target);
- int retval = xscale_verify_pointer(CMD_CTX, xscale);
+ int retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3217,7 +3222,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command)
uint32_t catch = 0;
struct reg *dcsr_reg = &xscale->reg_cache->reg_list[XSCALE_DCSR];
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3267,7 +3272,7 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
int err = 0;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3325,7 +3330,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
uint32_t dcsr_value;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3390,7 +3395,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3426,10 +3431,10 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
struct target *target = get_current_target(CMD_CTX);
struct xscale_common *xscale = target_to_xscale(target);
struct xscale_trace_data *trace_data;
- struct fileio file;
+ struct fileio *file;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3454,19 +3459,19 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
while (trace_data) {
int i;
- fileio_write_u32(&file, trace_data->chkpt0);
- fileio_write_u32(&file, trace_data->chkpt1);
- fileio_write_u32(&file, trace_data->last_instruction);
- fileio_write_u32(&file, trace_data->depth);
+ fileio_write_u32(file, trace_data->chkpt0);
+ fileio_write_u32(file, trace_data->chkpt1);
+ fileio_write_u32(file, trace_data->last_instruction);
+ fileio_write_u32(file, trace_data->depth);
for (i = 0; i < trace_data->depth; i++)
- fileio_write_u32(&file, trace_data->entries[i].data |
+ fileio_write_u32(file, trace_data->entries[i].data |
((trace_data->entries[i].type & 0xffff) << 16));
trace_data = trace_data->next;
}
- fileio_close(&file);
+ fileio_close(file);
return ERROR_OK;
}
@@ -3477,11 +3482,11 @@ COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command)
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
- xscale_analyze_trace(target, CMD_CTX);
+ xscale_analyze_trace(target, CMD);
return ERROR_OK;
}
@@ -3492,7 +3497,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
@@ -3572,6 +3577,7 @@ static const struct command_registration xscale_exec_command_handlers[] = {
.handler = xscale_handle_cache_info_command,
.mode = COMMAND_EXEC,
.help = "display information about CPU caches",
+ .usage = "",
},
{
.name = "mmu",
@@ -3698,6 +3704,7 @@ struct target_type xscale_target = {
.deassert_reset = xscale_deassert_reset,
/* REVISIT on some cores, allow exporting iwmmxt registers ... */
+ .get_gdb_arch = arm_get_gdb_arch,
.get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = xscale_read_memory,