X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fx86_32_common.h;h=14e6e35f77b6f2401e11be77b95543e0d22da7be;hb=db456e209feaecae53094051f3710fef73418a71;hp=83973b84a15cbdd2dfc747c3eef44f652e3a181f;hpb=74889cf4683211f96275d342df61c1dade126a5d;p=openocd.git diff --git a/src/target/x86_32_common.h b/src/target/x86_32_common.h index 83973b84a1..14e6e35f77 100644 --- a/src/target/x86_32_common.h +++ b/src/target/x86_32_common.h @@ -1,5 +1,5 @@ /* - * Copyright(c) 2013 Intel Corporation. + * Copyright(c) 2013-2016 Intel Corporation. * * Adrian Burns (adrian.burns@intel.com) * Thomas Faust (thomas.faust@intel.com) @@ -8,8 +8,9 @@ * Jeffrey Maxwell (jeffrey.r.maxwell@intel.com) * * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of @@ -17,8 +18,7 @@ * General Public License for more details. * * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * along with this program. If not, see . * * Contact Information: * Intel Corporation @@ -29,8 +29,8 @@ * This is the interface to the x86 32 bit memory and breakpoint operations. */ -#ifndef X86_32_COMMON_H -#define X86_32_COMMON_H +#ifndef OPENOCD_TARGET_X86_32_COMMON_H +#define OPENOCD_TARGET_X86_32_COMMON_H #include #include @@ -195,6 +195,11 @@ enum { WBINVD, }; +enum x86_core_type { + LMT1, + LMT3_5 +}; + struct swbp_mem_patch { uint8_t orig_byte; uint32_t swbp_unique_id; @@ -208,9 +213,11 @@ struct swbp_mem_patch { struct x86_32_common { uint32_t common_magic; void *arch_info; + enum x86_core_type core_type; struct reg_cache *cache; struct jtag_tap *curr_tap; uint32_t stored_pc; + int forced_halt_for_reset; int flush; /* pm_regs are for probemode save/restore state */ @@ -303,14 +310,14 @@ int x86_32_get_gdb_reg_list(struct target *t, int x86_32_common_init_arch_info(struct target *target, struct x86_32_common *x86_32); int x86_32_common_mmu(struct target *t, int *enabled); -int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physical); -int x86_32_common_read_phys_mem(struct target *t, uint32_t phys_address, +int x86_32_common_virt2phys(struct target *t, target_addr_t address, target_addr_t *physical); +int x86_32_common_read_phys_mem(struct target *t, target_addr_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer); -int x86_32_common_write_phys_mem(struct target *t, uint32_t phys_address, +int x86_32_common_write_phys_mem(struct target *t, target_addr_t phys_address, uint32_t size, uint32_t count, const uint8_t *buffer); -int x86_32_common_read_memory(struct target *t, uint32_t addr, +int x86_32_common_read_memory(struct target *t, target_addr_t addr, uint32_t size, uint32_t count, uint8_t *buf); -int x86_32_common_write_memory(struct target *t, uint32_t addr, +int x86_32_common_write_memory(struct target *t, target_addr_t addr, uint32_t size, uint32_t count, const uint8_t *buf); int x86_32_common_read_io(struct target *t, uint32_t addr, uint32_t size, uint8_t *buf); @@ -320,5 +327,6 @@ int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp); int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp); int x86_32_common_add_watchpoint(struct target *t, struct watchpoint *wp); int x86_32_common_remove_watchpoint(struct target *t, struct watchpoint *wp); +void x86_32_common_reset_breakpoints_watchpoints(struct target *t); -#endif /* X86_32_COMMON_H */ +#endif /* OPENOCD_TARGET_X86_32_COMMON_H */