X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Ftarget.h;h=5248d69ede172384f7c9f6e90691f3dc2b78bffc;hb=c8926d145795;hp=d6e7431e803cbb7daab66dcc70380219e87a8996;hpb=33a17fd35995a7f679f92600055a8f55ae380022;p=openocd.git diff --git a/src/target/target.h b/src/target/target.h index d6e7431e80..5248d69ede 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -8,6 +8,12 @@ * Copyright (C) 2008 by Spencer Oliver * * spen@spen-soft.co.uk * * * + * Copyright (C) 2011 by Broadcom Corporation * + * Evan Hunter - ehunter@broadcom.com * + * * + * Copyright (C) ST-Ericsson SA 2011 * + * michel.jaouen@stericsson.com : smp minimum support * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -35,7 +41,7 @@ struct breakpoint; struct watchpoint; struct mem_param; struct reg_param; - +struct target_list; /* * TARGET_UNKNOWN = 0: we don't know anything about the target yet @@ -99,6 +105,17 @@ struct working_area struct working_area **user; struct working_area *next; }; + +struct gdb_service +{ + struct target *target; + /* field for smp display */ + /* element 0 coreid currently displayed ( 1 till n) */ + /* element 1 coreid to be displayed at next resume 1 till n 0 means resume + * all cores + core displayed */ + int32_t core[2]; +}; // target_type.h contains the full definitionof struct targe_type struct target @@ -107,7 +124,7 @@ struct target const char *cmd_name; /* tcl Name of target */ int target_number; /* DO NOT USE! field to be removed in 2010 */ struct jtag_tap *tap; /* where on the jtag chain is this */ - int coreid; /* which device on the TAP? */ + int32_t coreid; /* which device on the TAP? */ const char *variant; /* what variant of this chip is it? */ /** @@ -155,6 +172,28 @@ struct target * lots of halted/resumed info when stepping in debugger. */ bool halt_issued; /* did we transition to halted state? */ long long halt_issued_time; /* Note time when halt was issued */ + + bool dbgbase_set; /* By default the debug base is not set */ + uint32_t dbgbase; /* Really a Cortex-A specific option, but there is no + system in place to support target specific options + currently. */ + struct rtos *rtos; /* Instance of Real Time Operating System support */ + bool rtos_auto_detect; /* A flag that indicates that the RTOS has been specified as "auto" + * and must be detected when symbols are offered */ + + int smp; /* add some target attributes for smp support */ + struct target_list *head; + /* the gdb service is there in case of smp , we have only one gdb server + * for all smp target + * the target attached to the gdb is changing dynamically by changing + * gdb_service->target pointer */ + struct gdb_service *gdb_service; +}; + + +struct target_list { + struct target *target; + struct target_list *next; }; /** Returns the instance-specific name of the specified target. */ @@ -329,11 +368,26 @@ static inline void target_set_examined(struct target *target) */ int target_add_breakpoint(struct target *target, struct breakpoint *breakpoint); +/** + * Add the @a ContextID breakpoint for @a target. + * + * This routine is a wrapper for target->type->add_context_breakpoint. + */ +int target_add_context_breakpoint(struct target *target, + struct breakpoint *breakpoint); +/** + * Add the @a ContextID & IVA breakpoint for @a target. + * + * This routine is a wrapper for target->type->add_hybrid_breakpoint. + */ +int target_add_hybrid_breakpoint(struct target *target, + struct breakpoint *breakpoint); /** * Remove the @a breakpoint for @a target. * * This routine is a wrapper for target->type->remove_breakpoint. */ + int target_remove_breakpoint(struct target *target, struct breakpoint *breakpoint); /** @@ -403,7 +457,7 @@ int target_read_memory(struct target *target, * This routine is wrapper for target->type->write_memory. */ int target_write_memory(struct target *target, - uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); + uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer); /** * Write @a count items of 4 bytes to the memory of @a target at @@ -413,7 +467,7 @@ int target_write_memory(struct target *target, * This routine is wrapper for target->type->bulk_write_memory. */ int target_bulk_write_memory(struct target *target, - uint32_t address, uint32_t count, uint8_t *buffer); + uint32_t address, uint32_t count, const uint8_t *buffer); /* * Write to target memory using the virtual address. @@ -440,7 +494,7 @@ int target_bulk_write_memory(struct target *target, * peripheral registers which do not support byte operations. */ int target_write_buffer(struct target *target, - uint32_t address, uint32_t size, uint8_t *buffer); + uint32_t address, uint32_t size, const uint8_t *buffer); int target_read_buffer(struct target *target, uint32_t address, uint32_t size, uint8_t *buffer); int target_checksum_memory(struct target *target, @@ -485,6 +539,11 @@ void target_buffer_set_u32(struct target *target, uint8_t *buffer, uint32_t valu void target_buffer_set_u24(struct target *target, uint8_t *buffer, uint32_t value); void target_buffer_set_u16(struct target *target, uint8_t *buffer, uint16_t value); +void target_buffer_get_u32_array(struct target *target, const uint8_t *buffer, uint32_t count, uint32_t *dstbuf); +void target_buffer_get_u16_array(struct target *target, const uint8_t *buffer, uint32_t count, uint16_t *dstbuf); +void target_buffer_set_u32_array(struct target *target, uint8_t *buffer, uint32_t count, uint32_t *srcbuf); +void target_buffer_set_u16_array(struct target *target, uint8_t *buffer, uint32_t count, uint16_t *srcbuf); + int target_read_u32(struct target *target, uint32_t address, uint32_t *value); int target_read_u16(struct target *target, uint32_t address, uint16_t *value); int target_read_u8(struct target *target, uint32_t address, uint8_t *value);