X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Friscv%2Friscv.c;h=de2f095be21592990c77a3de4102a67efefb7dfd;hb=HEAD;hp=dfd6a3e3d4fd15029ee2e4e7f315563700ee3b73;hpb=fd2a44ab55e7c54ee9e594717aba72d04e85e716;p=openocd.git diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index dfd6a3e3d4..9cd4922d20 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1744,7 +1744,7 @@ static int riscv_write_memory(struct target *target, target_addr_t address, return tt->write_memory(target, address, size, count, buffer); } -static const char *riscv_get_gdb_arch(struct target *target) +static const char *riscv_get_gdb_arch(const struct target *target) { switch (riscv_xlen(target)) { case 32: @@ -1830,7 +1830,7 @@ static int riscv_arch_state(struct target *target) static int riscv_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, target_addr_t entry_point, - target_addr_t exit_point, int timeout_ms, void *arch_info) + target_addr_t exit_point, unsigned int timeout_ms, void *arch_info) { RISCV_INFO(info); @@ -1840,7 +1840,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params, } if (target->state != TARGET_HALTED) { - LOG_WARNING("target not halted"); + LOG_TARGET_ERROR(target, "not halted (run target algo)"); return ERROR_TARGET_NOT_HALTED; } @@ -2052,7 +2052,7 @@ static int riscv_checksum_memory(struct target *target, buf_set_u64(reg_params[1].value, 0, xlen, count); /* 20 second timeout/megabyte */ - int timeout = 20000 * (1 + (count / (1024 * 1024))); + unsigned int timeout = 20000 * (1 + (count / (1024 * 1024))); retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address, @@ -2187,7 +2187,6 @@ int riscv_openocd_poll(struct target *target) int halted_hart = -1; if (target->smp) { - unsigned halts_discovered = 0; unsigned should_remain_halted = 0; unsigned should_resume = 0; struct target_list *list; @@ -2203,7 +2202,6 @@ int riscv_openocd_poll(struct target *target) t->debug_reason = DBG_REASON_NOTHALTED; break; case RPH_DISCOVERED_HALTED: - halts_discovered++; t->state = TARGET_HALTED; enum riscv_halt_reason halt_reason = riscv_halt_reason(t, r->current_hartid); @@ -2367,37 +2365,6 @@ COMMAND_HANDLER(riscv_set_reset_timeout_sec) return ERROR_OK; } -COMMAND_HANDLER(riscv_set_prefer_sba) -{ - struct target *target = get_current_target(CMD_CTX); - RISCV_INFO(r); - bool prefer_sba; - LOG_WARNING("`riscv set_prefer_sba` is deprecated. Please use `riscv set_mem_access` instead."); - if (CMD_ARGC != 1) { - LOG_ERROR("Command takes exactly 1 parameter"); - return ERROR_COMMAND_SYNTAX_ERROR; - } - COMMAND_PARSE_ON_OFF(CMD_ARGV[0], prefer_sba); - if (prefer_sba) { - /* Use system bus with highest priority */ - r->mem_access_methods[0] = RISCV_MEM_ACCESS_SYSBUS; - r->mem_access_methods[1] = RISCV_MEM_ACCESS_PROGBUF; - r->mem_access_methods[2] = RISCV_MEM_ACCESS_ABSTRACT; - } else { - /* Use progbuf with highest priority */ - r->mem_access_methods[0] = RISCV_MEM_ACCESS_PROGBUF; - r->mem_access_methods[1] = RISCV_MEM_ACCESS_SYSBUS; - r->mem_access_methods[2] = RISCV_MEM_ACCESS_ABSTRACT; - } - - /* Reset warning flags */ - r->mem_access_progbuf_warn = true; - r->mem_access_sysbus_warn = true; - r->mem_access_abstract_warn = true; - - return ERROR_OK; -} - COMMAND_HANDLER(riscv_set_mem_access) { struct target *target = get_current_target(CMD_CTX); @@ -2666,27 +2633,25 @@ COMMAND_HANDLER(riscv_authdata_write) uint32_t value; unsigned int index = 0; - if (CMD_ARGC == 0) { - /* nop */ - } else if (CMD_ARGC == 1) { + if (CMD_ARGC == 0 || CMD_ARGC > 2) + return ERROR_COMMAND_SYNTAX_ERROR; + + if (CMD_ARGC == 1) { COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], value); - } else if (CMD_ARGC == 2) { + } else { COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], index); COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); - } else { - LOG_ERROR("Command takes at most 2 arguments"); - return ERROR_COMMAND_SYNTAX_ERROR; } struct target *target = get_current_target(CMD_CTX); RISCV_INFO(r); - if (r->authdata_write) { - return r->authdata_write(target, value, index); - } else { + if (!r->authdata_write) { LOG_ERROR("authdata_write is not implemented for this target."); return ERROR_FAIL; } + + return r->authdata_write(target, value, index); } COMMAND_HANDLER(riscv_dmi_read) @@ -2744,35 +2709,6 @@ COMMAND_HANDLER(riscv_dmi_write) } } -COMMAND_HANDLER(riscv_test_sba_config_reg) -{ - if (CMD_ARGC != 4) { - LOG_ERROR("Command takes exactly 4 arguments"); - return ERROR_COMMAND_SYNTAX_ERROR; - } - - struct target *target = get_current_target(CMD_CTX); - RISCV_INFO(r); - - target_addr_t legal_address; - uint32_t num_words; - target_addr_t illegal_address; - bool run_sbbusyerror_test; - - COMMAND_PARSE_NUMBER(target_addr, CMD_ARGV[0], legal_address); - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], num_words); - COMMAND_PARSE_NUMBER(target_addr, CMD_ARGV[2], illegal_address); - COMMAND_PARSE_ON_OFF(CMD_ARGV[3], run_sbbusyerror_test); - - if (r->test_sba_config_reg) { - return r->test_sba_config_reg(target, legal_address, num_words, - illegal_address, run_sbbusyerror_test); - } else { - LOG_ERROR("test_sba_config_reg is not implemented for this target."); - return ERROR_FAIL; - } -} - COMMAND_HANDLER(riscv_reset_delays) { int wait = 0; @@ -2947,14 +2883,6 @@ static const struct command_registration riscv_exec_command_handlers[] = { .usage = "[sec]", .help = "Set the wall-clock timeout (in seconds) after reset is deasserted" }, - { - .name = "set_prefer_sba", - .handler = riscv_set_prefer_sba, - .mode = COMMAND_ANY, - .usage = "on|off", - .help = "When on, prefer to use System Bus Access to access memory. " - "When off (default), prefer to use the Program Buffer to access memory." - }, { .name = "set_mem_access", .handler = riscv_set_mem_access, @@ -3020,19 +2948,6 @@ static const struct command_registration riscv_exec_command_handlers[] = { .usage = "address value", .help = "Perform a 32-bit DMI write of value at address." }, - { - .name = "test_sba_config_reg", - .handler = riscv_test_sba_config_reg, - .mode = COMMAND_ANY, - .usage = "legal_address num_words " - "illegal_address run_sbbusyerror_test[on/off]", - .help = "Perform a series of tests on the SBCS register. " - "Inputs are a legal, 128-byte aligned address and a number of words to " - "read/write starting at that address (i.e., address range [legal address, " - "legal_address+word_size*num_words) must be legally readable/writable), " - "an illegal, 128-byte aligned address for error flag/handling cases, " - "and whether sbbusyerror test should be run." - }, { .name = "reset_delays", .handler = riscv_reset_delays, @@ -3936,7 +3851,7 @@ int riscv_init_registers(struct target *target) .type = REG_TYPE_ARCH_DEFINED, .id = "FPU_FD", .type_class = REG_TYPE_CLASS_UNION, - .reg_type_union = &single_double_union + { .reg_type_union = &single_double_union } }; static struct reg_data_type type_uint8 = { .type = REG_TYPE_UINT8, .id = "uint8" }; static struct reg_data_type type_uint16 = { .type = REG_TYPE_UINT16, .id = "uint16" };