X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=fc2a3f808a27e6175cbb2c0e1288c09f3c91c108;hb=a6863e9a52c227086d874ef033de2499005ae318;hp=a055696b04ec9fa2003e7d1e7a113f284e7c4510;hpb=74db7f9681c960c18c1ce2e3d317d931aaefe713;p=openocd.git

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a055696b04..fc2a3f808a 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -22,7 +22,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -46,6 +46,8 @@ static int mips_m4k_internal_restore(struct target *target, int current,
 		uint32_t address, int handle_breakpoints,
 		int debug_execution);
 static int mips_m4k_halt(struct target *target);
+static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
+		uint32_t count, const uint8_t *buffer);
 
 static int mips_m4k_examine_debug_reason(struct target *target)
 {
@@ -87,11 +89,11 @@ static int mips_m4k_debug_entry(struct target *target)
 	struct mips32_common *mips32 = target_to_mips32(target);
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
+	mips32_save_context(target);
+
 	/* make sure stepping disabled, SSt bit in CP0 debug register cleared */
 	mips_ejtag_config_step(ejtag_info, 0);
 
-	mips32_save_context(target);
-
 	/* make sure break unit configured */
 	mips32_configure_break_unit(target);
 
@@ -978,6 +980,13 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address,
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
+	if (size == 4 && count > 32) {
+		int retval = mips_m4k_bulk_write_memory(target, address, count, buffer);
+		if (retval == ERROR_OK)
+			return ERROR_OK;
+		LOG_WARNING("Falling back to non-bulk write");
+	}
+
 	/* sanitize arguments */
 	if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1098,11 +1107,6 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
 
 	LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count);
 
-	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
-		return ERROR_TARGET_NOT_HALTED;
-	}
-
 	/* check alignment */
 	if (address & 0x3u)
 		return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -1116,8 +1120,8 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
 				MIPS32_FASTDATA_HANDLER_SIZE,
 				&mips32->fast_data_area);
 		if (retval != ERROR_OK) {
-			LOG_WARNING("No working area available, falling back to non-bulk write");
-			return mips_m4k_write_memory(target, address, 4, count, buffer);
+			LOG_ERROR("No working area available");
+			return retval;
 		}
 
 		/* reset fastadata state so the algo get reloaded */
@@ -1141,11 +1145,8 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
 	if (t != NULL)
 		free(t);
 
-	if (retval != ERROR_OK) {
-		/* FASTDATA access failed, try normal memory write */
-		LOG_DEBUG("Fastdata access Failed, falling back to non-bulk write");
-		retval = mips_m4k_write_memory(target, address, 4, count, buffer);
-	}
+	if (retval != ERROR_OK)
+		LOG_ERROR("Fastdata access Failed");
 
 	return retval;
 }
@@ -1186,7 +1187,6 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
 
 		if (CMD_ARGC == 2) {
 			uint32_t value;
-
 			retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
 			if (retval != ERROR_OK) {
 				command_print(CMD_CTX,
@@ -1273,6 +1273,29 @@ COMMAND_HANDLER(mips_m4k_handle_smp_gdb_command)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
+{
+	struct target *target = get_current_target(CMD_CTX);
+	struct mips_m4k_common *mips_m4k = target_to_m4k(target);
+	struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
+
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ejtag_info->scan_delay);
+	else if (CMD_ARGC > 1)
+			return ERROR_COMMAND_SYNTAX_ERROR;
+
+	command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+	if (ejtag_info->scan_delay >= 20000000) {
+		ejtag_info->mode = 0;
+		command_print(CMD_CTX, "running in legacy mode");
+	} else {
+		ejtag_info->mode = 1;
+		command_print(CMD_CTX, "running in fast queued mode");
+	}
+
+	return ERROR_OK;
+}
+
 static const struct command_registration mips_m4k_exec_command_handlers[] = {
 	{
 		.name = "cp0",
@@ -1302,6 +1325,13 @@ static const struct command_registration mips_m4k_exec_command_handlers[] = {
 		.help = "display/fix current core played to gdb",
 		.usage = "",
 	},
+	{
+		.name = "scan_delay",
+		.handler = mips_m4k_handle_scan_delay_command,
+		.mode = COMMAND_ANY,
+		.help = "display/set scan delay in nano seconds",
+		.usage = "[value]",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -1339,7 +1369,6 @@ struct target_type mips_m4k_target = {
 
 	.read_memory = mips_m4k_read_memory,
 	.write_memory = mips_m4k_write_memory,
-	.bulk_write_memory = mips_m4k_bulk_write_memory,
 	.checksum_memory = mips32_checksum_memory,
 	.blank_check_memory = mips32_blank_check_memory,