X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=d69a0a0aa3c5aa9d83d5125b37c2b4c120f4d792;hb=d86100261252805215282b17d214c48021ef7f79;hp=a16590c812704978880fc97db0425ceb5fa6c5ad;hpb=b6db182c0020051e0dc642ca0b1040ea7453dcd0;p=openocd.git

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a16590c812..d69a0a0aa3 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -26,6 +26,7 @@
 #include "mips32.h"
 #include "mips_m4k.h"
 #include "mips32_dmaacc.h"
+#include "target_type.h"
 
 
 /* cli handling */
@@ -160,7 +161,7 @@ int mips_m4k_poll(target_t *target)
 	u32 ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
 	/* read ejtag control reg */
-	jtag_add_end_state(TAP_IDLE);
+	jtag_set_end_state(TAP_IDLE);
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -170,7 +171,7 @@ int mips_m4k_poll(target_t *target)
 	{
 		/* we have detected a reset, clear flag
 		 * otherwise ejtag will not work */
-		jtag_add_end_state(TAP_IDLE);
+		jtag_set_end_state(TAP_IDLE);
 		ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
 
 		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -183,7 +184,7 @@ int mips_m4k_poll(target_t *target)
 	{
 		if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
 		{
-			jtag_add_end_state(TAP_IDLE);
+			jtag_set_end_state(TAP_IDLE);
 			mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
 
 			target->state = TARGET_HALTED;
@@ -275,12 +276,12 @@ int mips_m4k_assert_reset(target_t *target)
 	if (target->reset_halt)
 	{
 		/* use hardware to catch reset */
-		jtag_add_end_state(TAP_IDLE);
+		jtag_set_end_state(TAP_IDLE);
 		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL);
 	}
 	else
 	{
-		jtag_add_end_state(TAP_IDLE);
+		jtag_set_end_state(TAP_IDLE);
 		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
 	}
 
@@ -617,7 +618,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 			}
 			if (current_instr == MIPS32_SDBBP)
 			{
-				if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+				if((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
 				{
 					return retval;
 				}
@@ -635,7 +636,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 			
 			if (current_instr == MIPS16_SDBBP)
 			{
-				if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+				if((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
 				{
 					return retval;
 				}
@@ -854,9 +855,9 @@ int mips_m4k_examine(struct target_s *target)
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 	u32 idcode = 0;
 
-	if (!target->type->examined)
+	if (!target_was_examined(target))
 	{
-		mips_ejtag_get_idcode(ejtag_info, &idcode, NULL);
+		mips_ejtag_get_idcode(ejtag_info, &idcode);
 		ejtag_info->idcode = idcode;
 		
 		if (((idcode >> 1) & 0x7FF) == 0x29)