X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.c;h=68a39faf3d6a81c732d9e2f0612f7d0a96db4956;hb=068626fde4590a3d3e5e7a80a3ac07adb53b9b48;hp=eebd5fb79a63c845be748d7115c02b02ae7f4533;hpb=19a678834d4cf88e006318dfeda6f97333c13925;p=openocd.git diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index eebd5fb79a..68a39faf3d 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -27,38 +27,34 @@ #include "mips_ejtag.h" -int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch) +int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr, void *delete_me_and_submit_patch) { - jtag_tap_t *tap; + struct jtag_tap *tap; tap = ejtag_info->tap; - if (tap==NULL) + if (tap == NULL) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) { - scan_field_t field; + struct scan_field field; uint8_t t[4]; field.tap = tap; field.num_bits = tap->ir_length; field.out_value = t; buf_set_u32(field.out_value, 0, field.num_bits, new_instr); - field.in_value = NULL; - - - - + jtag_add_ir_scan(1, &field, jtag_get_end_state()); } return ERROR_OK; } -int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode) +int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode) { - scan_field_t field; + struct scan_field field; jtag_set_end_state(TAP_IDLE); @@ -67,12 +63,8 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode) field.tap = ejtag_info->tap; field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)idcode; - - - - + jtag_add_dr_scan(1, &field, jtag_get_end_state()); if (jtag_execute_queue() != ERROR_OK) @@ -83,9 +75,9 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode) return ERROR_OK; } -int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode) +int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode) { - scan_field_t field; + struct scan_field field; jtag_set_end_state(TAP_IDLE); @@ -94,12 +86,8 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode) field.tap = ejtag_info->tap; field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)impcode; - - - - + jtag_add_dr_scan(1, &field, jtag_get_end_state()); if (jtag_execute_queue() != ERROR_OK) @@ -110,14 +98,14 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode) return ERROR_OK; } -int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data) +int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) { - jtag_tap_t *tap; + struct jtag_tap *tap; tap = ejtag_info->tap; - if (tap==NULL) + if (tap == NULL) return ERROR_FAIL; - scan_field_t field; + struct scan_field field; uint8_t t[4], r[4]; int retval; @@ -125,12 +113,8 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data) field.num_bits = 32; field.out_value = t; buf_set_u32(field.out_value, 0, field.num_bits, *data); - field.in_value = r; - - - - + jtag_add_dr_scan(1, &field, jtag_get_end_state()); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -146,7 +130,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data) return ERROR_OK; } -int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info) +int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info) { uint32_t code[] = { MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */ @@ -159,12 +143,12 @@ int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info) MIPS32_NOP, }; - mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \ + mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ 0, NULL, 0, NULL, 1); return ERROR_OK; } -int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info) +int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info) { uint32_t code[] = { MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */ @@ -185,20 +169,20 @@ int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info) MIPS32_NOP, }; - mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \ + mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ 0, NULL, 0, NULL, 1); return ERROR_OK; } -int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step) +int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step) { if (enable_step) return mips_ejtag_step_enable(ejtag_info); return mips_ejtag_step_disable(ejtag_info); } -int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info) +int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) { uint32_t ejtag_ctrl; jtag_set_end_state(TAP_IDLE); @@ -212,24 +196,24 @@ int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info) ejtag_ctrl = ejtag_info->ejtag_ctrl; mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl); - if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) + if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) LOG_DEBUG("Failed to enter Debug Mode!"); return ERROR_OK; } -int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info) +int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info) { uint32_t inst; inst = MIPS32_DRET; - + /* execute our dret instruction */ mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0); return ERROR_OK; } -int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, uint32_t* debug_reg) +int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg) { /* read ejtag ECR */ uint32_t code[] = { @@ -250,13 +234,13 @@ int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, uint32_t* debug_reg) MIPS32_NOP, }; - mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \ + mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ 0, NULL, 1, debug_reg, 1); return ERROR_OK; } -int mips_ejtag_init(mips_ejtag_t *ejtag_info) +int mips_ejtag_init(struct mips_ejtag *ejtag_info) { uint32_t ejtag_version; @@ -285,16 +269,16 @@ int mips_ejtag_init(mips_ejtag_t *ejtag_info) break; } LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s", - ejtag_info->impcode & (1<<28) ? " R3k": " R4k", - ejtag_info->impcode & (1<<24) ? " DINT": "", - ejtag_info->impcode & (1<<22) ? " ASID_8": "", - ejtag_info->impcode & (1<<21) ? " ASID_6": "", - ejtag_info->impcode & (1<<16) ? " MIPS16": "", - ejtag_info->impcode & (1<<14) ? " noDMA": " DMA", - ejtag_info->impcode & (1<<0) ? " MIPS64": " MIPS32" - ); - - if((ejtag_info->impcode & (1<<14)) == 0) + ejtag_info->impcode & (1 << 28) ? " R3k": " R4k", + ejtag_info->impcode & (1 << 24) ? " DINT": "", + ejtag_info->impcode & (1 << 22) ? " ASID_8": "", + ejtag_info->impcode & (1 << 21) ? " ASID_6": "", + ejtag_info->impcode & (1 << 16) ? " MIPS16": "", + ejtag_info->impcode & (1 << 14) ? " noDMA": " DMA", + ejtag_info->impcode & (1 << 0) ? " MIPS64": " MIPS32" +); + + if ((ejtag_info->impcode & (1 << 14)) == 0) LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled"); /* set initial state for ejtag control reg */