X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_pracc.c;h=c08e3249aa1f42e0d7ee4d4c9230e7b5cf9cf212;hb=7660c15f02c5a9cf4ac350457283dea0740b9317;hp=e2b40c4c65bd448ebbb084a132810a6e3b4eab9c;hpb=6cadbadb3763101a495fddfedec52781a3ac6af7;p=openocd.git

diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index e2b40c4c65..c08e3249aa 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -160,19 +160,22 @@ int mips32_pracc_clean_text_jump(struct mips_ejtag *ejtag_info)
 			return retval;
 	}
 
-	if (ejtag_info->mode != 0)	/* done, queued mode won't work with lexra cores */
+	if (ejtag_info->mode != 0)	/* async mode support only for MIPS ... */
 		return ERROR_OK;
 
-	retval = mips32_pracc_read_ctrl_addr(ejtag_info);
-	if (retval != ERROR_OK)
-		return retval;
-
-	if (ejtag_info->pa_addr != MIPS32_PRACC_TEXT) {			/* LEXRA/BMIPS ?, shift out another NOP */
-		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
-		mips_ejtag_drscan_32_out(ejtag_info, MIPS32_NOP);
-		retval = mips32_pracc_finish(ejtag_info);
+	for (int i = 0; i != 2; i++) {
+		retval = mips32_pracc_read_ctrl_addr(ejtag_info);
 		if (retval != ERROR_OK)
 			return retval;
+
+		if (ejtag_info->pa_addr != MIPS32_PRACC_TEXT) {		/* LEXRA/BMIPS ?, shift out another NOP, max 2 */
+			mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
+			mips_ejtag_drscan_32_out(ejtag_info, MIPS32_NOP);
+			retval = mips32_pracc_finish(ejtag_info);
+			if (retval != ERROR_OK)
+				return retval;
+		} else
+			break;
 	}
 
 	return ERROR_OK;
@@ -212,7 +215,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
 		if (ejtag_info->pa_ctrl & EJTAG_CTRL_PRNW) {						/* write/store access */
 			/* Check for pending store from a previous store instruction at dmseg */
 			if (store_pending == 0) {
-				LOG_DEBUG("unexpected write at address %x", ejtag_info->pa_addr);
+				LOG_DEBUG("unexpected write at address %" PRIx32, ejtag_info->pa_addr);
 				if (code_count < 2) {	/* allow for restart */
 					restart = 1;
 					continue;
@@ -222,7 +225,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
 				/* check address */
 				if (ejtag_info->pa_addr < MIPS32_PRACC_PARAM_OUT || ejtag_info->pa_addr > max_store_addr) {
 
-					LOG_DEBUG("writing at unexpected address %x", ejtag_info->pa_addr);
+					LOG_DEBUG("writing at unexpected address %" PRIx32, ejtag_info->pa_addr);
 					return ERROR_JTAG_DEVICE_ERROR;
 				}
 			}
@@ -241,7 +244,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
 			 if (!final_check) {			/* executing function code */
 				/* check address */
 				if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) {
-					LOG_DEBUG("reading at unexpected address %x, expected %x",
+					LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x",
 							ejtag_info->pa_addr, MIPS32_PRACC_TEXT + code_count * 4);
 
 					/* restart code execution only in some cases */
@@ -283,7 +286,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
 					}
 				} else {
 					if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) {
-						LOG_DEBUG("unexpected read address in final check: %x, expected: %x",
+						LOG_DEBUG("unexpected read address in final check: %" PRIx32 ", expected: %x",
 							  ejtag_info->pa_addr, MIPS32_PRACC_TEXT + code_count * 4);
 						return ERROR_JTAG_DEVICE_ERROR;
 					}