X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_dmaacc.c;h=d756928a09a6a4a915939f92fab70a9ce95b0aa5;hb=f0c0256b1f05a04a58d857e9d865a0be0dd1680d;hp=9a38084106ed1a53b5e8c4ad2940e67a0cd8c975;hpb=2e779198535580515dfa9c8bfe1f3fe08abdb84b;p=openocd.git

diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index 9a38084106..d756928a09 100644
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -28,6 +28,19 @@
 
 #include "mips32_dmaacc.h"
 
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint8_t *buf);
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint16_t *buf);
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint32_t *buf);
+
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint8_t *buf);
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint16_t *buf);
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
+		uint32_t addr, int count, uint32_t *buf);
 
 /*
  * The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
@@ -39,7 +52,7 @@
  * displaying/modifying memory and memory mapped registers.
  */
 
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
+static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -49,11 +62,11 @@ begin_ejtag_dma_read:
 
 	/* Setup Address */
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Read & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -64,11 +77,11 @@ begin_ejtag_dma_read:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, data);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -85,7 +98,7 @@ begin_ejtag_dma_read:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
+static int ejtag_dma_read_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint16_t *data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -95,11 +108,11 @@ begin_ejtag_dma_read_h:
 
 	/* Setup Address */
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Read & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -110,11 +123,11 @@ begin_ejtag_dma_read_h:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -137,7 +150,7 @@ begin_ejtag_dma_read_h:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
+static int ejtag_dma_read_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint8_t *data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -147,11 +160,11 @@ begin_ejtag_dma_read_b:
 
 	/* Setup Address */
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Read & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -162,11 +175,11 @@ begin_ejtag_dma_read_b:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -199,7 +212,7 @@ begin_ejtag_dma_read_b:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -209,16 +222,16 @@ begin_ejtag_dma_write:
 
 	/* Setup Address */
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Setup Data */
 	v = data;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Write & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -229,7 +242,7 @@ begin_ejtag_dma_write:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -246,7 +259,7 @@ begin_ejtag_dma_write:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -260,16 +273,16 @@ begin_ejtag_dma_write_h:
 
 	/* Setup Address */
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Setup Data */
 	v = data;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Write & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -280,7 +293,7 @@ begin_ejtag_dma_write_h:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -297,7 +310,7 @@ begin_ejtag_dma_write_h:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
 	uint32_t v;
 	uint32_t ejtag_ctrl;
@@ -312,16 +325,16 @@ begin_ejtag_dma_write_b:
 
 	/*  Setup Address*/
 	v = addr;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Setup Data */
 	v = data;
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 	mips_ejtag_drscan_32(ejtag_info, &v);
 
 	/* Initiate DMA Write & set DSTRT */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -332,7 +345,7 @@ begin_ejtag_dma_write_b:
 	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
-	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	if (ejtag_ctrl & EJTAG_CTRL_DERR)
@@ -349,7 +362,7 @@ begin_ejtag_dma_write_b:
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
 	switch (size)
 	{
@@ -364,7 +377,7 @@ int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, in
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
 	int i;
 	int	retval;
@@ -377,7 +390,7 @@ int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count,
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
 	int i;
 	int retval;
@@ -390,7 +403,7 @@ int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count,
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
 	int i;
 	int retval;
@@ -403,7 +416,7 @@ int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count,
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
 	switch (size)
 	{
@@ -418,7 +431,7 @@ int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, i
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
 	int i;
 	int retval;
@@ -431,7 +444,7 @@ int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
 	int i;
 	int retval;
@@ -444,7 +457,7 @@ int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
 	int i;
 	int retval;