X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.h;h=7ffe95fc0ff5a72e0871afac54882f0cd4839ac3;hb=015bf559444edd9e7c524e951aad183fdaab9156;hp=7cecb7542b62cc4326abbb65339ed3a7a0d18a82;hpb=74d09617b927ed7011098d5a65087dee1ef1e87a;p=openocd.git

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 7cecb7542b..7ffe95fc0f 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -24,10 +24,8 @@
 #define MIPS32_H
 
 #include "target.h"
-#include "register.h"
 #include "mips32_pracc.h"
 
-
 #define MIPS32_COMMON_MAGIC		0xB320B320
 
 /* offsets into mips32 core register cache */
@@ -37,10 +35,15 @@ enum
 	MIPS32NUMCOREREGS
 };
 
+enum mips32_isa_mode
+{
+	MIPS32_ISA_MIPS32 = 0,
+	MIPS32_ISA_MIPS16E = 1,
+};
+
 struct mips32_comparator
 {
 	int used;
-	//int type;
 	uint32_t bp_value;
 	uint32_t reg_address;
 };
@@ -52,6 +55,7 @@ struct mips32_common
 	struct reg_cache *core_cache;
 	struct mips_ejtag ejtag_info;
 	uint32_t core_regs[MIPS32NUMCOREREGS];
+	enum mips32_isa_mode isa_mode;
 
 	int bp_scanned;
 	int num_inst_bpoints;
@@ -62,22 +66,35 @@ struct mips32_common
 	struct mips32_comparator *data_break_list;
 
 	/* register cache to processor synchronization */
-	int (*read_core_reg)(struct target_s *target, int num);
-	int (*write_core_reg)(struct target_s *target, int num);
+	int (*read_core_reg)(struct target *target, int num);
+	int (*write_core_reg)(struct target *target, int num);
 };
 
+static inline struct mips32_common *
+target_to_mips32(struct target *target)
+{
+	return target->arch_info;
+}
+
 struct mips32_core_reg
 {
 	uint32_t num;
-	struct target_s *target;
+	struct target *target;
 	struct mips32_common *mips32_common;
 };
 
+struct mips32_algorithm
+{
+	int common_magic;
+	enum mips32_isa_mode isa_mode;
+};
+
 #define MIPS32_OP_BEQ	0x04
 #define MIPS32_OP_BNE	0x05
 #define MIPS32_OP_ADDI	0x08
 #define MIPS32_OP_AND	0x24
 #define MIPS32_OP_COP0	0x10
+#define MIPS32_OP_JR	0x08
 #define MIPS32_OP_LUI	0x0F
 #define MIPS32_OP_LW	0x23
 #define MIPS32_OP_LBU	0x24
@@ -104,6 +121,7 @@ struct mips32_core_reg
 #define MIPS32_B(off)				MIPS32_BEQ(0, 0, off)
 #define MIPS32_BEQ(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off)
 #define MIPS32_BNE(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off)
+#define MIPS32_JR(reg)				MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR)
 #define MIPS32_MFC0(gpr, cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel)
 #define MIPS32_MTC0(gpr,cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel)
 #define MIPS32_LBU(reg, off, base)	MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off)
@@ -122,34 +140,37 @@ struct mips32_core_reg
 /* ejtag specific instructions */
 #define MIPS32_DRET					0x4200001F
 #define MIPS32_SDBBP				0x7000003F
-#define MIPS16_SDBBP 				0xE801
+#define MIPS16_SDBBP				0xE801
 
-int mips32_arch_state(struct target_s *target);
+int mips32_arch_state(struct target *target);
 
-int mips32_init_arch_info(target_t *target,
+int mips32_init_arch_info(struct target *target,
 		struct mips32_common *mips32, struct jtag_tap *tap);
 
-int mips32_restore_context(target_t *target);
-int mips32_save_context(target_t *target);
+int mips32_restore_context(struct target *target);
+int mips32_save_context(struct target *target);
 
-struct reg_cache *mips32_build_reg_cache(target_t *target);
+struct reg_cache *mips32_build_reg_cache(struct target *target);
 
-int mips32_run_algorithm(struct target_s *target,
+int mips32_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_params,
 		uint32_t entry_point, uint32_t exit_point,
 		int timeout_ms, void *arch_info);
 
-int mips32_configure_break_unit(struct target_s *target);
+int mips32_configure_break_unit(struct target *target);
 
-int mips32_enable_interrupts(struct target_s *target, int enable);
+int mips32_enable_interrupts(struct target *target, int enable);
 
-int mips32_examine(struct target_s *target);
+int mips32_examine(struct target *target);
 
-int mips32_register_commands(struct command_context_s *cmd_ctx);
+int mips32_register_commands(struct command_context *cmd_ctx);
 
-int mips32_invalidate_core_regs(target_t *target);
-int mips32_get_gdb_reg_list(target_t *target,
-		reg_t **reg_list[], int *reg_list_size);
+int mips32_get_gdb_reg_list(struct target *target,
+		struct reg **reg_list[], int *reg_list_size);
+int mips32_checksum_memory(struct target *target, uint32_t address,
+		uint32_t count, uint32_t* checksum);
+int mips32_blank_check_memory(struct target *target,
+		uint32_t address, uint32_t count, uint32_t* blank);
 
 #endif	/*MIPS32_H*/