X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.c;h=5bb4104e1d618fd08d0d93dd074a0b1265eef43a;hb=d44f1aaeff45d26348826bdff07caf3d097eca15;hp=6cec7f01a403c849dadecec7ce13e7478ec930fa;hpb=3b7aee21b50f4bd0014878f29129ac33812faea3;p=openocd.git diff --git a/src/target/mips32.c b/src/target/mips32.c index 6cec7f01a4..5bb4104e1d 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -27,7 +27,7 @@ #endif #include "mips32.h" - +#include "register.h" char* mips32_core_reg_list[] = { @@ -38,7 +38,12 @@ char* mips32_core_reg_list[] = "status", "lo", "hi", "badvaddr", "cause", "pc" }; -mips32_core_reg_t mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = +const char *mips_isa_strings[] = +{ + "MIPS32", "MIPS16e" +}; + +struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = { {0, NULL, NULL}, {1, NULL, NULL}, @@ -88,19 +93,22 @@ mips32_core_reg_t mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0}; -reg_t mips32_gdb_dummy_fp_reg = +struct reg mips32_gdb_dummy_fp_reg = { - "GDB dummy floating-point register", mips32_gdb_dummy_fp_value, 0, 1, 32, NULL, 0, NULL, 0 + .name = "GDB dummy floating-point register", + .value = mips32_gdb_dummy_fp_value, + .dirty = 0, + .valid = 1, + .size = 32, + .arch_info = NULL, }; -int mips32_core_reg_arch_type = -1; - -int mips32_get_core_reg(reg_t *reg) +int mips32_get_core_reg(struct reg *reg) { int retval; - mips32_core_reg_t *mips32_reg = reg->arch_info; - target_t *target = mips32_reg->target; - struct mips32_common *mips32_target = target->arch_info; + struct mips32_core_reg *mips32_reg = reg->arch_info; + struct target *target = mips32_reg->target; + struct mips32_common *mips32_target = target_to_mips32(target); if (target->state != TARGET_HALTED) { @@ -112,10 +120,10 @@ int mips32_get_core_reg(reg_t *reg) return retval; } -int mips32_set_core_reg(reg_t *reg, uint8_t *buf) +int mips32_set_core_reg(struct reg *reg, uint8_t *buf) { - mips32_core_reg_t *mips32_reg = reg->arch_info; - target_t *target = mips32_reg->target; + struct mips32_core_reg *mips32_reg = reg->arch_info; + struct target *target = mips32_reg->target; uint32_t value = buf_get_u32(buf, 0, 32); if (target->state != TARGET_HALTED) @@ -130,13 +138,13 @@ int mips32_set_core_reg(reg_t *reg, uint8_t *buf) return ERROR_OK; } -int mips32_read_core_reg(struct target_s *target, int num) +int mips32_read_core_reg(struct target *target, int num) { uint32_t reg_value; - mips32_core_reg_t *mips_core_reg; + struct mips32_core_reg *mips_core_reg; /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); if ((num < 0) || (num >= MIPS32NUMCOREREGS)) return ERROR_INVALID_ARGUMENTS; @@ -150,13 +158,13 @@ int mips32_read_core_reg(struct target_s *target, int num) return ERROR_OK; } -int mips32_write_core_reg(struct target_s *target, int num) +int mips32_write_core_reg(struct target *target, int num) { uint32_t reg_value; - mips32_core_reg_t *mips_core_reg; + struct mips32_core_reg *mips_core_reg; /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); if ((num < 0) || (num >= MIPS32NUMCOREREGS)) return ERROR_INVALID_ARGUMENTS; @@ -171,30 +179,15 @@ int mips32_write_core_reg(struct target_s *target, int num) return ERROR_OK; } -int mips32_invalidate_core_regs(target_t *target) +int mips32_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size) { /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; - int i; - - for (i = 0; i < mips32->core_cache->num_regs; i++) - { - mips32->core_cache->reg_list[i].valid = 0; - mips32->core_cache->reg_list[i].dirty = 0; - } - - return ERROR_OK; -} - -int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size) -{ - /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); int i; /* include floating point registers */ *reg_list_size = MIPS32NUMCOREREGS + MIPS32NUMFPREGS; - *reg_list = malloc(sizeof(reg_t*) * (*reg_list_size)); + *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size)); for (i = 0; i < MIPS32NUMCOREREGS; i++) { @@ -210,13 +203,13 @@ int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_ return ERROR_OK; } -int mips32_save_context(target_t *target) +int mips32_save_context(struct target *target) { int i; /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target_to_mips32(target); + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; /* read core registers */ mips32_pracc_read_regs(ejtag_info, mips32->core_regs); @@ -232,13 +225,13 @@ int mips32_save_context(target_t *target) return ERROR_OK; } -int mips32_restore_context(target_t *target) +int mips32_restore_context(struct target *target) { int i; /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target_to_mips32(target); + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; for (i = 0; i < MIPS32NUMCOREREGS; i++) { @@ -254,38 +247,35 @@ int mips32_restore_context(target_t *target) return ERROR_OK; } -int mips32_arch_state(struct target_s *target) +int mips32_arch_state(struct target *target) { - struct mips32_common *mips32 = target->arch_info; - - if (mips32->common_magic != MIPS32_COMMON_MAGIC) - { - LOG_ERROR("BUG: called for a non-MIPS32 target"); - exit(-1); - } + struct mips32_common *mips32 = target_to_mips32(target); - LOG_USER("target halted due to %s, pc: 0x%8.8" PRIx32 "", - Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name , + LOG_USER("target halted in %s mode due to %s, pc: 0x%8.8" PRIx32 "", + mips_isa_strings[mips32->isa_mode], + debug_reason_name(target), buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32)); return ERROR_OK; } -reg_cache_t *mips32_build_reg_cache(target_t *target) +static const struct reg_arch_type mips32_reg_type = { + .get = mips32_get_core_reg, + .set = mips32_set_core_reg, +}; + +struct reg_cache *mips32_build_reg_cache(struct target *target) { /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); int num_regs = MIPS32NUMCOREREGS; - reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); - reg_cache_t *cache = malloc(sizeof(reg_cache_t)); - reg_t *reg_list = malloc(sizeof(reg_t) * num_regs); - mips32_core_reg_t *arch_info = malloc(sizeof(mips32_core_reg_t) * num_regs); + struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache); + struct reg_cache *cache = malloc(sizeof(struct reg_cache)); + struct reg *reg_list = malloc(sizeof(struct reg) * num_regs); + struct mips32_core_reg *arch_info = malloc(sizeof(struct mips32_core_reg) * num_regs); int i; - if (mips32_core_reg_arch_type == -1) - mips32_core_reg_arch_type = register_reg_arch_type(mips32_get_core_reg, mips32_set_core_reg); - register_init_dummy(&mips32_gdb_dummy_fp_reg); /* Build the process context cache */ @@ -306,16 +296,14 @@ reg_cache_t *mips32_build_reg_cache(target_t *target) reg_list[i].value = calloc(1, 4); reg_list[i].dirty = 0; reg_list[i].valid = 0; - reg_list[i].bitfield_desc = NULL; - reg_list[i].num_bitfields = 0; - reg_list[i].arch_type = mips32_core_reg_arch_type; + reg_list[i].type = &mips32_reg_type; reg_list[i].arch_info = &arch_info[i]; } return cache; } -int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct jtag_tap *tap) +int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, struct jtag_tap *tap) { target->arch_info = mips32; mips32->common_magic = MIPS32_COMMON_MAGIC; @@ -331,20 +319,15 @@ int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct return ERROR_OK; } -int mips32_register_commands(struct command_context_s *cmd_ctx) -{ - return ERROR_OK; -} - -int mips32_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info) +int mips32_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info) { /*TODO*/ return ERROR_OK; } -int mips32_examine(struct target_s *target) +int mips32_examine(struct target *target) { - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); if (!target_was_examined(target)) { @@ -361,10 +344,10 @@ int mips32_examine(struct target_s *target) return ERROR_OK; } -int mips32_configure_break_unit(struct target_s *target) +int mips32_configure_break_unit(struct target *target) { /* get pointers to arch-specific information */ - struct mips32_common *mips32 = target->arch_info; + struct mips32_common *mips32 = target_to_mips32(target); int retval; uint32_t dcr, bpinfo; int i; @@ -376,7 +359,7 @@ int mips32_configure_break_unit(struct target_s *target) if ((retval = target_read_u32(target, EJTAG_DCR, &dcr)) != ERROR_OK) return retval; - if (dcr & (1 << 16)) + if (dcr & EJTAG_DCR_IB) { /* get number of inst breakpoints */ if ((retval = target_read_u32(target, EJTAG_IBS, &bpinfo)) != ERROR_OK) @@ -395,7 +378,7 @@ int mips32_configure_break_unit(struct target_s *target) return retval; } - if (dcr & (1 << 17)) + if (dcr & EJTAG_DCR_DB) { /* get number of data breakpoints */ if ((retval = target_read_u32(target, EJTAG_DBS, &bpinfo)) != ERROR_OK) @@ -421,7 +404,7 @@ int mips32_configure_break_unit(struct target_s *target) return ERROR_OK; } -int mips32_enable_interrupts(struct target_s *target, int enable) +int mips32_enable_interrupts(struct target *target, int enable) { int retval; int update = 0; @@ -433,19 +416,19 @@ int mips32_enable_interrupts(struct target_s *target, int enable) if (enable) { - if (!(dcr & (1 << 4))) + if (!(dcr & EJTAG_DCR_INTE)) { /* enable interrupts */ - dcr |= (1 << 4); + dcr |= EJTAG_DCR_INTE; update = 1; } } else { - if (dcr & (1 << 4)) + if (dcr & EJTAG_DCR_INTE) { /* disable interrupts */ - dcr &= ~(1 << 4); + dcr &= ~EJTAG_DCR_INTE; update = 1; } }