X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.c;h=2547b011a9914354283b825bd878886362136b97;hb=a7315891eff5ed84dbd88e950321c6ff2a58e867;hp=b0cb79ccd5ab16ef47c50f4058c14a83210714e1;hpb=b8d8953ae9995829a61ce7b34e544f004bb23c55;p=openocd.git diff --git a/src/target/mips32.c b/src/target/mips32.c index b0cb79ccd5..2547b011a9 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -31,7 +31,7 @@ #include "algorithm.h" #include "register.h" -char* mips32_core_reg_list[] = +static char* mips32_core_reg_list[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", @@ -40,12 +40,12 @@ char* mips32_core_reg_list[] = "status", "lo", "hi", "badvaddr", "cause", "pc" }; -const char *mips_isa_strings[] = +static const char *mips_isa_strings[] = { "MIPS32", "MIPS16e" }; -struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = +static struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = { {0, NULL, NULL}, {1, NULL, NULL}, @@ -93,9 +93,9 @@ struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = #define MIPS32NUMFPREGS 34 + 18 -uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0}; +static uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0}; -struct reg mips32_gdb_dummy_fp_reg = +static struct reg mips32_gdb_dummy_fp_reg = { .name = "GDB dummy floating-point register", .value = mips32_gdb_dummy_fp_value, @@ -105,7 +105,7 @@ struct reg mips32_gdb_dummy_fp_reg = .arch_info = NULL, }; -int mips32_get_core_reg(struct reg *reg) +static int mips32_get_core_reg(struct reg *reg) { int retval; struct mips32_core_reg *mips32_reg = reg->arch_info; @@ -122,7 +122,7 @@ int mips32_get_core_reg(struct reg *reg) return retval; } -int mips32_set_core_reg(struct reg *reg, uint8_t *buf) +static int mips32_set_core_reg(struct reg *reg, uint8_t *buf) { struct mips32_core_reg *mips32_reg = reg->arch_info; struct target *target = mips32_reg->target; @@ -140,7 +140,7 @@ int mips32_set_core_reg(struct reg *reg, uint8_t *buf) return ERROR_OK; } -int mips32_read_core_reg(struct target *target, int num) +static int mips32_read_core_reg(struct target *target, int num) { uint32_t reg_value; struct mips32_core_reg *mips_core_reg; @@ -160,7 +160,7 @@ int mips32_read_core_reg(struct target *target, int num) return ERROR_OK; } -int mips32_write_core_reg(struct target *target, int num) +static int mips32_write_core_reg(struct target *target, int num) { uint32_t reg_value; struct mips32_core_reg *mips_core_reg; @@ -388,7 +388,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params, } /* refresh core register cache */ - for (unsigned i = 0; i < MIPS32NUMCOREREGS; i++) + for (i = 0; i < MIPS32NUMCOREREGS; i++) { if (!mips32->core_cache->reg_list[i].valid) mips32->read_core_reg(target, i); @@ -404,7 +404,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params, } } - for (int i = 0; i < num_reg_params; i++) + for (i = 0; i < num_reg_params; i++) { struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0); @@ -662,8 +662,10 @@ int mips32_checksum_memory(struct target *target, uint32_t address, init_reg_param(®_params[1], "a1", 32, PARAM_OUT); buf_set_u32(reg_params[1].value, 0, 32, count); + int timeout = 20000 * (1 + (count / (1024 * 1024))); + if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params, - crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), 10000, + crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), timeout, &mips32_info)) != ERROR_OK) { destroy_reg_param(®_params[0]);