X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fhla_target.c;h=4564d46c9effb9ca2a978c7227a1a4c0af27cdec;hb=f43c23090e05f3344b0e65c735096ffb36be82b2;hp=73b7ca3d0e8a005a4be1a28607f0cea5f3c38c7d;hpb=85ed6ea59fdc3cc15de33f95f04441b75b9439bf;p=openocd.git diff --git a/src/target/hla_target.c b/src/target/hla_target.c index 73b7ca3d0e..4564d46c9e 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -176,7 +176,7 @@ static int adapter_store_core_reg_u32(struct target *target, struct reg *r; LOG_ERROR("JTAG failure"); - r = armv7m->core_cache->reg_list + num; + r = armv7m->arm.core_cache->reg_list + num; r->dirty = r->valid; return ERROR_JTAG_DEVICE_ERROR; } @@ -311,11 +311,13 @@ static int adapter_target_create(struct target *target, static int adapter_load_context(struct target *target) { struct armv7m_common *armv7m = target_to_armv7m(target); - int num_regs = armv7m->core_cache->num_regs; + int num_regs = armv7m->arm.core_cache->num_regs; for (int i = 0; i < num_regs; i++) { - if (!armv7m->core_cache->reg_list[i].valid) - armv7m->read_core_reg(target, i); + + struct reg *r = &armv7m->arm.core_cache->reg_list[i]; + if (!r->valid) + armv7m->arm.read_core_reg(target, r, i, ARM_MODE_ANY); } return ERROR_OK; @@ -339,7 +341,7 @@ static int adapter_debug_entry(struct target *target) /* make sure we clear the vector catch bit */ adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA); - r = armv7m->core_cache->reg_list + ARMV7M_xPSR; + r = arm->core_cache->reg_list + ARMV7M_xPSR; xPSR = buf_get_u32(r->value, 0, 32); /* Are we in an exception handler */ @@ -379,6 +381,7 @@ static int adapter_poll(struct target *target) enum target_state state; struct hl_interface_s *adapter = target_to_adapter(target); struct armv7m_common *armv7m = target_to_armv7m(target); + enum target_state prev_target_state = target->state; state = adapter->layout->api->state(adapter->fd); @@ -397,10 +400,15 @@ static int adapter_poll(struct target *target) if (retval != ERROR_OK) return retval; - if (arm_semihosting(target, &retval) != 0) - return retval; + if (prev_target_state == TARGET_DEBUG_RUNNING) { + target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED); + } else { + if (arm_semihosting(target, &retval) != 0) + return retval; + + target_call_event_callbacks(target, TARGET_EVENT_HALTED); + } - target_call_event_callbacks(target, TARGET_EVENT_HALTED); LOG_DEBUG("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32)); } @@ -420,7 +428,8 @@ static int adapter_assert_reset(struct target *target) bool srst_asserted = false; - if (jtag_reset_config & RESET_SRST_NO_GATING) { + if ((jtag_reset_config & RESET_HAS_SRST) && + (jtag_reset_config & RESET_SRST_NO_GATING)) { jtag_add_reset(0, 1); res = adapter->layout->api->assert_srst(adapter->fd, 0); srst_asserted = true; @@ -458,7 +467,7 @@ static int adapter_assert_reset(struct target *target) return res; /* registers are now invalid */ - register_cache_invalidate(armv7m->core_cache); + register_cache_invalidate(armv7m->arm.core_cache); if (target->reset_halt) { target->state = TARGET_RESET; @@ -575,7 +584,7 @@ static int adapter_resume(struct target *target, int current, armv7m_restore_context(target); /* registers are now invalid */ - register_cache_invalidate(armv7m->core_cache); + register_cache_invalidate(armv7m->arm.core_cache); /* the front-end may request us not to handle breakpoints */ if (handle_breakpoints) { @@ -601,10 +610,15 @@ static int adapter_resume(struct target *target, int current, if (res != ERROR_OK) return res; - target->state = TARGET_RUNNING; target->debug_reason = DBG_REASON_NOTHALTED; - target_call_event_callbacks(target, TARGET_EVENT_RESUMED); + if (!debug_execution) { + target->state = TARGET_RUNNING; + target_call_event_callbacks(target, TARGET_EVENT_RESUMED); + } else { + target->state = TARGET_DEBUG_RUNNING; + target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED); + } return ERROR_OK; } @@ -655,7 +669,7 @@ static int adapter_step(struct target *target, int current, return res; /* registers are now invalid */ - register_cache_invalidate(armv7m->core_cache); + register_cache_invalidate(armv7m->arm.core_cache); if (breakpoint) cortex_m3_set_breakpoint(target, breakpoint); @@ -764,13 +778,6 @@ static int adapter_write_memory(struct target *target, uint32_t address, return ERROR_OK; } -static int adapter_bulk_write_memory(struct target *target, - uint32_t address, uint32_t count, - const uint8_t *buffer) -{ - return adapter_write_memory(target, address, 4, count, buffer); -} - static const struct command_registration adapter_command_handlers[] = { { .chain = arm_command_handlers, @@ -802,7 +809,6 @@ struct target_type hla_target = { .read_memory = adapter_read_memory, .write_memory = adapter_write_memory, - .bulk_write_memory = adapter_bulk_write_memory, .checksum_memory = armv7m_checksum_memory, .blank_check_memory = armv7m_blank_check_memory,