X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fferoceon.c;h=d64b53f5cc18dd48eceb956cdc4bdabc76591e7b;hb=0f1163e823c6ca3c2a81fa296157f5dde0635fea;hp=0439f813d2e756e2a009f88a1e9cb61f6cd19472;hpb=056fcdb540f0ab9a404f3b5de72fd707eb146603;p=openocd.git diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 0439f813d2..d64b53f5cc 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -56,9 +56,9 @@ #include "arm966e.h" #include "target_type.h" -int feroceon_assert_reset(target_t *target) +int feroceon_assert_reset(struct target *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; int ud = arm7_9->use_dbgrq; @@ -108,9 +108,9 @@ int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr) return ERROR_OK; } -void feroceon_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) +void feroceon_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -154,10 +154,10 @@ void feroceon_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) *pc -= (12 + 4); } -void feroceon_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +void feroceon_read_core_regs(struct target *target, uint32_t mask, uint32_t* core_regs[16]) { int i; - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -173,10 +173,10 @@ void feroceon_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) +void feroceon_read_core_regs_target_buffer(struct target *target, uint32_t mask, void* buffer, int size) { int i; - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; @@ -210,9 +210,9 @@ void feroceon_read_core_regs_target_buffer(target_t *target, uint32_t mask, void arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) +void feroceon_read_xpsr(struct target *target, uint32_t *xpsr, int spsr) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -233,9 +233,9 @@ void feroceon_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_xpsr(target_t *target, uint32_t xpsr, int spsr) +void feroceon_write_xpsr(struct target *target, uint32_t xpsr, int spsr) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -274,9 +274,9 @@ void feroceon_write_xpsr(target_t *target, uint32_t xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) +void feroceon_write_xpsr_im8(struct target *target, uint8_t xpsr_im, int rot, int spsr) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -291,10 +291,10 @@ void feroceon_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +void feroceon_write_core_regs(struct target *target, uint32_t mask, uint32_t core_regs[16]) { int i; - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -311,9 +311,9 @@ void feroceon_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_branch_resume(target_t *target) +void feroceon_branch_resume(struct target *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -326,11 +326,11 @@ void feroceon_branch_resume(target_t *target) arm7_9->need_bypass_before_restart = 1; } -void feroceon_branch_resume_thumb(target_t *target) +void feroceon_branch_resume_thumb(struct target *target) { LOG_DEBUG("-"); - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; uint32_t r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32); @@ -361,9 +361,9 @@ void feroceon_branch_resume_thumb(target_t *target) arm7_9->need_bypass_before_restart = 1; } -int feroceon_read_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +int feroceon_read_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; int err; @@ -383,9 +383,9 @@ int feroceon_read_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CR return jtag_execute_queue(); } -int feroceon_write_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +int feroceon_write_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; @@ -402,19 +402,19 @@ int feroceon_write_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t C return arm7_9_execute_sys_speed(target); } -void feroceon_set_dbgrq(target_t *target) +void feroceon_set_dbgrq(struct target *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; - reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; + struct reg *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; buf_set_u32(dbg_ctrl->value, 0, 8, 2); embeddedice_store_reg(dbg_ctrl); } -void feroceon_enable_single_step(target_t *target, uint32_t next_pc) +void feroceon_enable_single_step(struct target *target, uint32_t next_pc) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; /* set a breakpoint there */ @@ -425,9 +425,9 @@ void feroceon_enable_single_step(target_t *target, uint32_t next_pc) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], 0xf7); } -void feroceon_disable_single_step(target_t *target) +void feroceon_disable_single_step(struct target *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE]); @@ -437,7 +437,7 @@ void feroceon_disable_single_step(target_t *target) embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE]); } -int feroceon_examine_debug_reason(target_t *target) +int feroceon_examine_debug_reason(struct target *target) { /* the MOE is not implemented */ if (target->debug_reason != DBG_REASON_SINGLESTEP) @@ -448,10 +448,10 @@ int feroceon_examine_debug_reason(target_t *target) return ERROR_OK; } -int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer) +int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; enum armv4_5_state core_state = armv4_5->core_state; uint32_t x, flip, shift, save[7]; @@ -577,15 +577,15 @@ int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t coun return retval; } -int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int feroceon_init_target(struct command_context_s *cmd_ctx, struct target *target) { arm9tdmi_init_target(cmd_ctx, target); return ERROR_OK; } -void feroceon_common_setup(struct target_s *target) +void feroceon_common_setup(struct target *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; /* override some insn sequence functions */ @@ -616,7 +616,7 @@ void feroceon_common_setup(struct target_s *target) arm7_9->wp1_used_default = -1; } -int feroceon_target_create(struct target_s *target, Jim_Interp *interp) +int feroceon_target_create(struct target *target, Jim_Interp *interp) { struct arm926ejs_common *arm926ejs = calloc(1,sizeof(struct arm926ejs_common)); @@ -630,7 +630,7 @@ int feroceon_target_create(struct target_s *target, Jim_Interp *interp) return ERROR_OK; } -int dragonite_target_create(struct target_s *target, Jim_Interp *interp) +int dragonite_target_create(struct target *target, Jim_Interp *interp) { struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common)); @@ -640,9 +640,9 @@ int dragonite_target_create(struct target_s *target, Jim_Interp *interp) return ERROR_OK; } -int feroceon_examine(struct target_s *target) +int feroceon_examine(struct target *target) { - armv4_5_common_t *armv4_5; + struct arm *armv4_5; struct arm7_9_common *arm7_9; int retval; @@ -674,7 +674,7 @@ int feroceon_examine(struct target_s *target) return ERROR_OK; } -target_type_t feroceon_target = +struct target_type feroceon_target = { .name = "feroceon", @@ -712,7 +712,7 @@ target_type_t feroceon_target = .examine = feroceon_examine, }; -target_type_t dragonite_target = +struct target_type dragonite_target = { .name = "dragonite",