X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fetm.h;h=6a78b75641538399e1cd2cf0ac5ac0db0a4ef155;hb=9527d1e595e316a4155c808fafa3a0ea6baa72f2;hp=e4d468528d584379c8315e27893927314db8bb2c;hpb=e25819645ee2beb0818a79006eed9c9cedaaf5bb;p=openocd.git

diff --git a/src/target/etm.h b/src/target/etm.h
index e4d468528d..6a78b75641 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -16,12 +16,11 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
-#ifndef ETM_H
-#define ETM_H
+
+#ifndef OPENOCD_TARGET_ETM_H
+#define OPENOCD_TARGET_ETM_H
 
 #include "trace.h"
 #include "arm_jtag.h"
@@ -29,8 +28,7 @@
 struct image;
 
 /* ETM registers (JTAG protocol) */
-enum
-{
+enum {
 	ETM_CTRL = 0x00,
 	ETM_CONFIG = 0x01,
 	ETM_TRIG_EVENT = 0x02,
@@ -71,9 +69,8 @@ enum
 	ETM_ID = 0x79,
 };
 
-struct etm_reg
-{
-	uint32_t value;
+struct etm_reg {
+	uint8_t value[4];
 	const struct etm_reg_info *reg_info;
 	struct arm_jtag *jtag_info;
 };
@@ -84,12 +81,14 @@ struct etm_reg
  *
  * NOTE that these have evolved since the ~v1.3 defns ...
  */
-enum
-{
+enum {
 	ETM_CTRL_POWERDOWN	= (1 << 0),
 	ETM_CTRL_MONITOR_CPRT	= (1 << 1),
 
-	// bits 3:2 == trace type (ETMV1_TRACE_* << 2)
+	/* bits 3:2 == trace type */
+	ETM_CTRL_TRACE_DATA	= (1 << 2),
+	ETM_CTRL_TRACE_ADDR	= (2 << 2),
+	ETM_CTRL_TRACE_MASK	= (3 << 2),
 
 	/* Port width (bits 21 and 6:4) */
 	ETM_PORT_4BIT		= 0x00,
@@ -115,8 +114,12 @@ enum
 	ETM_PORT_HALF_CLOCK	= (1 << 13),
 	ETM_PORT_CLOCK_MASK	= (1 << 13),
 
-	// bits 15:14 == context ID size used in tracing
-	// ETMV1_CONTEXTID_* << 8
+	/* bits 15:14 == context ID size used in tracing */
+	ETM_CTRL_CONTEXTID_NONE	= (0 << 14),
+	ETM_CTRL_CONTEXTID_8	= (1 << 14),
+	ETM_CTRL_CONTEXTID_16	= (2 << 14),
+	ETM_CTRL_CONTEXTID_32	= (3 << 14),
+	ETM_CTRL_CONTEXTID_MASK	= (3 << 14),
 
 	/* Port modes -- bits 17:16, tied to clocking mode */
 	ETM_PORT_NORMAL		= (0 << 16),
@@ -124,33 +127,14 @@ enum
 	ETM_PORT_DEMUXED	= (2 << 16),
 	ETM_PORT_MODE_MASK	= (3 << 16),
 
-	// bits 31:18 defined in v3.0 and later (e.g. ARM11+)
-};
-
-enum
-{
-	/* Data trace */
-	ETMV1_TRACE_NONE	 = 0x00,
-	ETMV1_TRACE_DATA     = 0x01,
-	ETMV1_TRACE_ADDR     = 0x02,
-	ETMV1_TRACE_MASK     = 0x03,
-	/* ContextID */
-	ETMV1_CONTEXTID_NONE = 0x00,
-	ETMV1_CONTEXTID_8    = 0x10,
-	ETMV1_CONTEXTID_16   = 0x20,
-	ETMV1_CONTEXTID_32   = 0x30,
-	ETMV1_CONTEXTID_MASK = 0x30,
-	/* Misc */
-	ETMV1_CYCLE_ACCURATE = 0x100,
-	ETMV1_BRANCH_OUTPUT = 0x200
+	/* bits 31:18 defined in v3.0 and later (e.g. ARM11+) */
 };
 
 /* forward-declare ETM context */
 struct etm_context;
 
-struct etm_capture_driver
-{
-	char *name;
+struct etm_capture_driver {
+	const char *name;
 	const struct command_registration *commands;
 	int (*init)(struct etm_context *etm_ctx);
 	trace_status_t (*status)(struct etm_context *etm_ctx);
@@ -159,14 +143,12 @@ struct etm_capture_driver
 	int (*stop_capture)(struct etm_context *etm_ctx);
 };
 
-enum
-{
+enum {
 	ETMV1_TRACESYNC_CYCLE = 0x1,
 	ETMV1_TRIGGER_CYCLE = 0x2,
 };
 
-struct etmv1_trace_data
-{
+struct etmv1_trace_data {
 	uint8_t pipestat;	/* bits 0-2 pipeline status */
 	uint16_t packet;		/* packet data (4, 8 or 16 bit) */
 	int flags;		/* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */
@@ -177,8 +159,7 @@ struct etmv1_trace_data
  * this will have to be split into version independent elements
  * and a version specific part
  */
-struct etm_context
-{
+struct etm_context {
 	struct target *target;		/* target this ETM is connected to */
 	struct reg_cache *reg_cache;		/* ETM register cache */
 	struct etm_capture_driver *capture_driver;	/* driver used to access ETM data */
@@ -187,7 +168,6 @@ struct etm_context
 	struct etmv1_trace_data *trace_data;	/* trace data */
 	uint32_t trace_depth;		/* number of cycles to be analyzed, 0 if no data available */
 	uint32_t control;	/* shadow of ETM_CTRL */
-	uint32_t tracemode;	/* type of info trace contains */
 	int /*arm_state*/ core_state;	/* current core state */
 	struct image *image;		/* source for target opcodes */
 	uint32_t pipe_index;		/* current trace cycle */
@@ -206,8 +186,7 @@ struct etm_context
 };
 
 /* PIPESTAT values */
-typedef enum
-{
+typedef enum {
 	STAT_IE = 0x0,
 	STAT_ID = 0x1,
 	STAT_IN = 0x2,
@@ -219,8 +198,7 @@ typedef enum
 } etmv1_pipestat_t;
 
 /* branch reason values */
-typedef enum
-{
+typedef enum {
 	BR_NORMAL  = 0x0, /* Normal PC change : periodic synchro (ETMv1.1) */
 	BR_ENABLE  = 0x1, /* Trace has been enabled */
 	BR_RESTART = 0x2, /* Trace restarted after a FIFO overflow */
@@ -231,7 +209,7 @@ typedef enum
 	BR_RSVD7   = 0x7, /* reserved */
 } etmv1_branch_reason_t;
 
-struct reg_cache* etm_build_reg_cache(struct target *target,
+struct reg_cache *etm_build_reg_cache(struct target *target,
 		struct arm_jtag *jtag_info, struct etm_context *etm_ctx);
 
 int etm_setup(struct target *target);
@@ -243,4 +221,4 @@ extern const struct command_registration etm_command_handlers[];
 #define ERROR_ETM_CAPTURE_INIT_FAILED	(-1302)
 #define ERROR_ETM_ANALYSIS_FAILED	(-1303)
 
-#endif /* ETM_H */
+#endif /* OPENOCD_TARGET_ETM_H */