X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fetb.c;h=6ad283c65b6b12f16c8448d5913dab5aed0a847e;hb=56504fdd7353732525e34f1e3fbd44346588f979;hp=74c0e952262f1798fa50073f2043ea1598a824b6;hpb=cee9970c980090b30c07436c3b69a2db94159709;p=openocd.git diff --git a/src/target/etb.c b/src/target/etb.c index 74c0e95226..6ad283c65b 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -21,20 +21,9 @@ #include "config.h" #endif -#include - #include "arm7_9_common.h" #include "etb.h" -#include "etm.h" - -#include "log.h" -#include "types.h" -#include "binarybuffer.h" -#include "target.h" -#include "register.h" -#include "jtag.h" -#include static char* etb_reg_list[] = { @@ -58,6 +47,7 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm static int etb_set_instr(etb_t *etb, u32 new_instr) { jtag_tap_t *tap; + tap = etb->tap; if (tap==NULL) return ERROR_FAIL; @@ -73,10 +63,6 @@ static int etb_set_instr(etb_t *etb, u32 new_instr) field.in_value = NULL; - - field.in_handler = NULL; - - jtag_add_ir_scan(1, &field, TAP_INVALID); free(field.out_value); @@ -87,7 +73,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr) static int etb_scann(etb_t *etb, u32 new_scan_chain) { - if(etb->cur_scan_chain != new_scan_chain) + if (etb->cur_scan_chain != new_scan_chain) { scan_field_t field; @@ -98,10 +84,6 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain) field.in_value = NULL; - - field.in_handler = NULL; - - /* select INTEST instruction */ etb_set_instr(etb, 0x2); jtag_add_dr_scan(1, &field, TAP_INVALID); @@ -159,6 +141,7 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb) static int etb_get_reg(reg_t *reg) { int retval; + if ((retval = etb_read_reg(reg)) != ERROR_OK) { LOG_ERROR("BUG: error scheduling etm register read"); @@ -188,25 +171,21 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) fields[0].out_value = NULL; u8 tmp[4]; fields[0].in_value = tmp; - fields[0].in_handler = NULL; fields[1].tap = etb->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, 4); fields[1].in_value = NULL; - fields[1].in_handler = NULL; fields[2].tap = etb->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); fields[2].in_value = NULL; - fields[2].in_handler = NULL; jtag_add_dr_scan(3, fields, TAP_INVALID); - for (i = 0; i < num_frames; i++) { /* ensure nR/W reamins set to read */ @@ -246,35 +225,20 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[0].tap = etb_reg->etb->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].in_value = NULL; - - fields[0].in_handler = NULL; - - fields[1].tap = etb_reg->etb->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].in_value = NULL; - - fields[1].in_handler = NULL; - - fields[2].tap = etb_reg->etb->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].in_value = NULL; - - fields[2].in_handler = NULL; - - jtag_add_dr_scan(3, fields, TAP_INVALID); /* read the identification register in the second run, to make sure we @@ -283,10 +247,10 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) buf_set_u32(fields[1].out_value, 0, 7, 0x0); fields[0].in_value = reg->value; - jtag_set_check_value(fields+0, check_value, check_mask, NULL); - jtag_add_dr_scan(3, fields, TAP_INVALID); + jtag_check_value_mask(fields+0, check_value, check_mask); + free(fields[1].out_value); free(fields[2].out_value); @@ -301,6 +265,7 @@ int etb_read_reg(reg_t *reg) int etb_set_reg(reg_t *reg, u32 value) { int retval; + if ((retval = etb_write_reg(reg, value)) != ERROR_OK) { LOG_ERROR("BUG: error scheduling etm register write"); @@ -317,6 +282,7 @@ int etb_set_reg(reg_t *reg, u32 value) int etb_set_reg_w_exec(reg_t *reg, u8 *buf) { int retval; + etb_set_reg(reg, buf_get_u32(buf, 0, reg->size)); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -343,24 +309,14 @@ int etb_write_reg(reg_t *reg, u32 value) fields[0].num_bits = 32; fields[0].out_value = malloc(4); buf_set_u32(fields[0].out_value, 0, 32, value); - fields[0].in_value = NULL; - - fields[0].in_handler = NULL; - - fields[1].tap = etb_reg->etb->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].in_value = NULL; - - fields[1].in_handler = NULL; - - fields[2].tap = etb_reg->etb->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); @@ -368,12 +324,6 @@ int etb_write_reg(reg_t *reg, u32 value) fields[2].in_value = NULL; - - fields[2].in_handler = NULL; - - - jtag_add_dr_scan(3, fields, TAP_INVALID); - free(fields[0].out_value); free(fields[1].out_value); free(fields[2].out_value); @@ -424,12 +374,12 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm } tap = jtag_TapByString( args[1] ); - if( tap == NULL ){ + if (tap == NULL) + { command_print(cmd_ctx, "Tap: %s does not exist", args[1] ); return ERROR_FAIL; } - if (arm7_9->etm_ctx) { etb_t *etb = malloc(sizeof(etb_t));