X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=92aee2b330e3d9c7024edbbefa69ed3df8d9d2bd;hb=3dd0884989fd36d13cd1907c3ca8ccd38eed763f;hp=20cf2b4e7238d0915dd693d339ca59fc26328aad;hpb=01a5d87d5f5788542c5d26da1c19fa4e634adc10;p=openocd.git diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 20cf2b4e72..92aee2b330 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -2,6 +2,12 @@ * Copyright (C) 2005, 2006 by Dominic Rath * * Dominic.Rath@gmx.de * * * + * Copyright (C) 2007,2008 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -49,7 +55,7 @@ enum enum { EICE_DBG_CONTROL_ICEDIS = 5, - EICE_DBG_CONTROL_MONEN = 4, + EICE_DBG_CONTROL_MONEN = 4, EICE_DBG_CONTROL_INTDIS = 2, EICE_DBG_CONTROL_DBGRQ = 1, EICE_DBG_CONTROL_DBGACK = 0, @@ -91,80 +97,37 @@ typedef struct embeddedice_reg_s } embeddedice_reg_t; extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9); +extern int embeddedice_setup(target_t *target); extern int embeddedice_read_reg(reg_t *reg); -extern int embeddedice_write_reg(reg_t *reg, u32 value); +extern void embeddedice_write_reg(reg_t *reg, u32 value); extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); -extern int embeddedice_store_reg(reg_t *reg); -extern int embeddedice_set_reg(reg_t *reg, u32 value); +extern void embeddedice_store_reg(reg_t *reg); +extern void embeddedice_set_reg(reg_t *reg, u32 value); extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf); extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size); extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size); extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout); -/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of +/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of * embeddedice_write_reg */ +static const int embeddedice_num_bits[]={32,5,1}; static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value) { -#if 1 u32 values[3]; - int num_bits[3]; - + values[0]=value; - num_bits[0]=32; values[1]=reg_addr; - num_bits[1]=5; values[2]=1; - num_bits[2]=1; - - jtag_add_dr_out(chain_pos, + + jtag_add_dr_out(chain_pos, 3, - num_bits, + embeddedice_num_bits, values, -1); -#else - scan_field_t fields[3]; - u8 field0_out[4]; - u8 field1_out[1]; - u8 field2_out[1]; - - fields[0].device = ice_reg->jtag_info->chain_pos; - fields[0].num_bits = 32; - fields[0].out_value = field0_out; - buf_set_u32(fields[0].out_value, 0, 32, value); - fields[0].out_mask = NULL; - fields[0].in_value = NULL; - fields[0].in_check_value = NULL; - fields[0].in_check_mask = NULL; - fields[0].in_handler = NULL; - fields[0].in_handler_priv = NULL; - - fields[1].device = ice_reg->jtag_info->chain_pos; - fields[1].num_bits = 5; - fields[1].out_value = field1_out; - buf_set_u32(fields[1].out_value, 0, 5, reg_addr); - fields[1].out_mask = NULL; - fields[1].in_value = NULL; - fields[1].in_check_value = NULL; - fields[1].in_check_mask = NULL; - fields[1].in_handler = NULL; - fields[1].in_handler_priv = NULL; - - fields[2].device = ice_reg->jtag_info->chain_pos; - fields[2].num_bits = 1; - fields[2].out_value = field2_out; - buf_set_u32(fields[2].out_value, 0, 1, 1); - fields[2].out_mask = NULL; - fields[2].in_value = NULL; - fields[2].in_check_value = NULL; - fields[2].in_check_mask = NULL; - fields[2].in_handler = NULL; - fields[2].in_handler_priv = NULL; - - jtag_add_dr_scan(3, fields, -1); - -#endif } +void embeddedice_write_dcc(int chain_pos, int reg_addr, u8 *buffer, int little, int count); + #endif /* EMBEDDED_ICE_H */