X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=62c5b78b728568e89f0470760e608d5b84b1b1b9;hb=da767f48da13464b6bd03b08270b529273c995f4;hp=e038f92d06cd13bd88ce9a7814875b5258f4f29c;hpb=fbf5bec7f3ea9f4a9584099a12e71681cb55ce35;p=openocd.git

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index e038f92d06..62c5b78b72 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -1,5 +1,5 @@
 /***************************************************************************
- *   Copyright (C) 2005 by Dominic Rath                                    *
+ *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -23,6 +23,7 @@
 #include "target.h"
 #include "register.h"
 #include "arm_jtag.h"
+#include "arm7_9_common.h"
 
 enum
 {
@@ -41,7 +42,8 @@ enum
 	EICE_W1_DATA_VALUE = 12,
 	EICE_W1_DATA_MASK = 13,
 	EICE_W1_CONTROL_VALUE = 14,
-	EICE_W1_CONTROL_MASK = 15
+	EICE_W1_CONTROL_MASK = 15,
+	EICE_VEC_CATCH = 16
 };
 
 enum
@@ -55,6 +57,7 @@ enum
 
 enum
 {
+	EICE_DBG_STATUS_IJBIT = 5,
 	EICE_DBG_STATUS_ITBIT = 4,
 	EICE_DBG_STATUS_SYSCOMP = 3,
 	EICE_DBG_STATUS_IFEN = 2,
@@ -87,12 +90,28 @@ typedef struct embeddedice_reg_s
 	arm_jtag_t *jtag_info;
 } embeddedice_reg_t;
 
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, int extra_reg);
+extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
 extern int embeddedice_read_reg(reg_t *reg);
 extern int embeddedice_write_reg(reg_t *reg, u32 value);
 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
 extern int embeddedice_store_reg(reg_t *reg);
 extern int embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u32 value);
+extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
+extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
+
+/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of 
+ * embeddedice_write_reg
+ */
+static __inline void embeddedice_write_reg_inner(reg_t *reg, u32 value)
+{
+	embeddedice_reg_t *ice_reg = reg->arch_info;
+	u8 reg_addr = ice_reg->addr & 0x1f;
+	jtag_add_shift(TAP_SD, TAP_PD, 32, value);
+	jtag_add_shift(TAP_SD, TAP_PD, 5, reg_addr);
+	jtag_add_shift(TAP_SD, TAP_RTI, 1, 1);
+}
+
 
 #endif /* EMBEDDED_ICE_H */