X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.c;h=a705d7dd15f911567d3fc4f12ca419bf77c52827;hb=fccb812f829e55940e26466c4cda8c25765d4f6c;hp=cca9cc06269a3281c468aa8e3297d64d215d6b92;hpb=b715a81f5b95144118d8f946d4191f1dc844783a;p=openocd.git

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index cca9cc0626..a705d7dd15 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -35,7 +35,8 @@
  *
  * This provides lowlevel glue to the EmbeddedICE (or EmbeddedICE-RT)
  * module found on scan chain 2 in ARM7, ARM9, and some other families
- * of ARM cores.
+ * of ARM cores.  The module is called "EmbeddedICE-RT" if it has
+ * monitor mode support.
  *
  * EmbeddedICE provides basic watchpoint/breakpoint hardware and a Debug
  * Communications Channel (DCC) used to read or write 32-bit words to
@@ -289,6 +290,9 @@ embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9)
 				buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
 	}
 
+	LOG_INFO("%s: hardware has 2 breakpoints or watchpoints",
+			target_name(target));
+
 	return reg_cache;
 }