X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.h;h=11d70524bcc7f219cc068e6ca8944670fc36c2d6;hb=2a8a89edcba49051315f59cea05834b5b704ee61;hp=789e8530f8066f7dd8d6bd94ae15958ec3ae6a00;hpb=54f820e8d8891a3296c38aa135dd7c1689d77fe0;p=openocd.git

diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 789e8530f8..11d70524bc 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -23,12 +23,12 @@
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
+
 #ifndef CORTEX_M3_H
 #define CORTEX_M3_H
 
 #include "armv7m.h"
 
-
 #define CORTEX_M3_COMMON_MAGIC 0x1A451A45
 
 #define SYSTEM_CONTROL_BASE 0x400FE000
@@ -59,6 +59,11 @@
 #define FP_COMP6	0xE0002020
 #define FP_COMP7	0xE0002024
 
+#define FPU_CPACR	0xE000ED88
+#define FPU_FPCCR	0xE000EF34
+#define FPU_FPCAR	0xE000EF38
+#define FPU_FPDSCR	0xE000EF3C
+
 /* DCB_DHCSR bit and field definitions */
 #define DBGKEY		(0xA05F << 16)
 #define C_DEBUGEN	(1 << 0)
@@ -73,15 +78,15 @@
 #define S_RESET_ST	(1 << 25)
 
 /* DCB_DEMCR bit and field definitions */
-#define	TRCENA			(1 << 24)
-#define	VC_HARDERR		(1 << 10)
-#define	VC_INTERR		(1 << 9)
-#define	VC_BUSERR		(1 << 8)
-#define	VC_STATERR		(1 << 7)
-#define	VC_CHKERR		(1 << 6)
-#define	VC_NOCPERR		(1 << 5)
-#define	VC_MMERR		(1 << 4)
-#define	VC_CORERESET	(1 << 0)
+#define TRCENA			(1 << 24)
+#define VC_HARDERR		(1 << 10)
+#define VC_INTERR		(1 << 9)
+#define VC_BUSERR		(1 << 8)
+#define VC_STATERR		(1 << 7)
+#define VC_CHKERR		(1 << 6)
+#define VC_NOCPERR		(1 << 5)
+#define VC_MMERR		(1 << 4)
+#define VC_CORERESET	(1 << 0)
 
 #define NVIC_ICTR		0xE000E004
 #define NVIC_ISE0		0xE000E100
@@ -117,16 +122,14 @@
 #define FPCR_REPLACE_BKPT_HIGH  (2 << 30)
 #define FPCR_REPLACE_BKPT_BOTH  (3 << 30)
 
-struct cortex_m3_fp_comparator
-{
+struct cortex_m3_fp_comparator {
 	int used;
 	int type;
 	uint32_t fpcr_value;
 	uint32_t fpcr_address;
 };
 
-struct cortex_m3_dwt_comparator
-{
+struct cortex_m3_dwt_comparator {
 	int used;
 	uint32_t comp;
 	uint32_t mask;
@@ -134,21 +137,18 @@ struct cortex_m3_dwt_comparator
 	uint32_t dwt_comparator_address;
 };
 
-enum cortex_m3_soft_reset_config
-{
+enum cortex_m3_soft_reset_config {
 	CORTEX_M3_RESET_SYSRESETREQ,
 	CORTEX_M3_RESET_VECTRESET,
 };
 
-enum cortex_m3_isrmasking_mode
-{
+enum cortex_m3_isrmasking_mode {
 	CORTEX_M3_ISRMASK_AUTO,
 	CORTEX_M3_ISRMASK_OFF,
 	CORTEX_M3_ISRMASK_ON,
 };
 
-struct cortex_m3_common
-{
+struct cortex_m3_common {
 	int common_magic;
 	struct arm_jtag jtag_info;
 
@@ -185,6 +185,7 @@ target_to_cm3(struct target *target)
 			struct cortex_m3_common, armv7m);
 }
 
+int cortex_m3_examine(struct target *target);
 int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
 int cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint);
 int cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint);
@@ -193,6 +194,7 @@ int cortex_m3_set_watchpoint(struct target *target, struct watchpoint *watchpoin
 int cortex_m3_unset_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m3_remove_watchpoint(struct target *target, struct watchpoint *watchpoint);
+void cortex_m3_enable_breakpoints(struct target *target);
 void cortex_m3_enable_watchpoints(struct target *target);
 void cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target *target);