X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.c;h=6fba9259b8fd65acc4f11a177e3cd3e1e1ba4bdd;hb=2aada5b8d9869ebc69984223710253ba905d61cd;hp=1d645c67eee6d39f42016929308b1a51709c2048;hpb=927e53f8d5e6ebaf52be82cb7300cbbb471a92bb;p=openocd.git

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 1d645c67ee..6fba9259b8 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1664,12 +1664,6 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
 	return retval;
 }
 
-static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
-	uint32_t count, const uint8_t *buffer)
-{
-	return cortex_m3_write_memory(target, address, 4, count, buffer);
-}
-
 static int cortex_m3_init_target(struct command_context *cmd_ctx,
 	struct target *target)
 {
@@ -1802,6 +1796,9 @@ fail1:
 		for (j = 0; j < 3; j++, reg++)
 			cortex_m3_dwt_addreg(target, cache->reg_list + reg,
 				dwt_comp + 3 * i + j);
+
+		/* make sure we clear any watchpoints enabled on the target */
+		target_write_u32(target, comparator->dwt_comparator_address + 8, 0);
 	}
 
 	*register_get_last_cache_p(&target->reg_cache) = cache;
@@ -1893,6 +1890,9 @@ int cortex_m3_examine(struct target *target)
 			cortex_m3->fp_comparator_list[i].type =
 				(i < cortex_m3->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
 			cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
+
+			/* make sure we clear any breakpoints enabled on the target */
+			target_write_u32(target, cortex_m3->fp_comparator_list[i].fpcr_address, 0);
 		}
 		LOG_DEBUG("FPB fpcr 0x%" PRIx32 ", numcode %i, numlit %i",
 			fpcr,
@@ -2256,9 +2256,9 @@ static const struct command_registration cortex_m3_command_handlers[] = {
 		.chain = armv7m_command_handlers,
 	},
 	{
-		.name = "cortex_m3",
+		.name = "cortex_m",
 		.mode = COMMAND_EXEC,
-		.help = "Cortex-M3 command group",
+		.help = "Cortex-M command group",
 		.usage = "",
 		.chain = cortex_m3_exec_command_handlers,
 	},
@@ -2266,7 +2266,8 @@ static const struct command_registration cortex_m3_command_handlers[] = {
 };
 
 struct target_type cortexm3_target = {
-	.name = "cortex_m3",
+	.name = "cortex_m",
+	.deprecated_name = "cortex_m3",
 
 	.poll = cortex_m3_poll,
 	.arch_state = armv7m_arch_state,
@@ -2285,7 +2286,6 @@ struct target_type cortexm3_target = {
 
 	.read_memory = cortex_m3_read_memory,
 	.write_memory = cortex_m3_write_memory,
-	.bulk_write_memory = cortex_m3_bulk_write_memory,
 	.checksum_memory = armv7m_checksum_memory,
 	.blank_check_memory = armv7m_blank_check_memory,